[分享] C6678多核应用的cache小测试

C6678多核之间在MSMC中交互数据，默认会用到L1D cache
数据一致性问题是很令人困扰的。
小测试验证了关于L1D cache 的linesize 是64Byte
初始化：
if(DNUM == 0)
{
(unsigned int)(0x0C330600) = 0x00;
(unsigned int)(0x0C330604) = 0x100;
(unsigned int)(0x0C330644) = 0x100;
WritebackCache((void *)((unsigned int)(0x0C330600)), 128);
}
然后在多核同步中断程序中：
//test

if(DNUM == 0)
{
    InvalidCache((void *)(0x0C330600), 64);
    (*(unsigned int*)(0x0C330600))++;
    WritebackCache((void *)((unsigned int)(0x0C330600)), 4);
}
else
{

    InvalidCache((void *)(0x0C330640), 64);
    (*(unsigned int*)(0x0C330644))++;
    WritebackCache((void *)((unsigned int)(0x0C330644)), 4);
    /*
    InvalidCache((void *)(0x0C330600), 64);
    (*(unsigned int*)(0x0C330604))++;
    WritebackCache((void *)((unsigned int)(0x0C330604)), 4);
    */
}

如此测试条件下，两个数据始终相差0x100，但若替换成注释部分的代码，则会破坏数据完整性。

也可以利用XMC来配置SL2，这样不用反复的InvalidCache和WritebackCache操作。