LTspice可以直接拉进去
具体如何生成库可以参考以下
1.TL494
2.uc3825
3.sg3525
4.uc3527a
5.hcpl3180
6.k554ud2
7.moc3082
8.moc3052
* ----------------------------------------------------------
* Библиотека личных моделей Валентина Яковлевича Володина
* email: valvolodin@narod.ru
* ----------------------------------------------------------
* Модель ШИМ контроллера TL494
* Создана 1 Февраля 2008 года
*
.subckt tl494 IN1 -IN1 IN2 -IN2 FB DTC Vref OCT CT1 ET1 CT2 ET2 Ct Rt GND Vcc
A1 N005 0 N006 0 0 N005 N011 0 DFLOP Vhigh=5 Trise=50n Rout=30
A2 0 0 0 N009 N011 0 N007 0 AND Vhigh=5 Trise=50n Rout=30
A3 N005 N009 0 0 0 0 N013 0 AND Vhigh=5 Trise=50n Rout=30
A4 N006 N007 0 0 0 N004 0 0 OR Vhigh=5 Trise=300n Rout=30
A5 N006 N013 0 0 0 N015 0 0 OR Vhigh=5 Trise=300n Rout=30
G1 N002 ET1 N004 0 table=(1 0,4 250m)
G3 N014 ET2 N015 0 table=(1 0,4 250m)
A6 N008 N012 0 0 0 0 N006 0 OR Vhigh=5 Trise=50n Rout=30
A7 N010 Ct 0 0 0 0 N008 0 SCHMITT Vt=0 Vh=0.1m Vhigh=5
A8 FB N016 0 0 0 0 N012 0 SCHMITT Vt=0 Vh=0.1m Vhigh=5
V4 N016 Ct 0.7
V5 N010 DTC 0.1
D5 N020 FB IDEAL
D6 N024 FB IDEAL
R1 N017 N018 1meg
R3 N021 N022 1meg
C4 N019 0 15.9n
C5 N023 0 15.9n
D1 ET1 N002 IDEALZ
E1 N020 0 N019 0 table=(0,0 5,5)
E2 N024 0 N023 0 table=(0,0 5,5)
R5 -IN1 0 5meg
R6 IN1 0 5meg
R7 -IN2 0 5meg
R8 IN2 0 5meg
I1 FB 0 0.7m
V2 N001 0 3.65
F1 0 Ct V2 -1
S1 0 Ct N003 0 OSC
D3 CT1 N002 IDEAL1
D7 CT1 N002 IDEAL2
G2 ET1 N002 Vcc ET1 table=(0 250m,1.42 243m,1.46 150m,1.57 0)
D2 ET2 N014 IDEALZ
D4 CT2 N014 IDEAL1
D8 CT2 N014 IDEAL2
G4 ET2 N014 Vcc ET2 table=(0 250m,1.42 243m,1.46 150m,1.57 0)
C7 N002 ET1 5p
C8 N014 ET2 5p
D9 N001 Rt IDEAL
R14 Ct 0 5meg
R15 ET2 0 5meg
R16 ET1 0 5meg
G5 Vcc 0 Vcc 0 TABLE=(1 0,5 4.5m,6.85 7.6m,40 8.4m)
I2 0 Vref 25m
D10 0 Vref IDEAL5
B1 Vcc 0 I=I(D10)+25m
R9 N009 OCT 1k
R10 Ct N003 5k
C1 N003 0 10p
I3 N018 N019 10m load
I4 N019 N018 10m load
I5 N022 N023 10m load
I6 N023 N022 10m load
E3 N017 0 IN1 -IN1 100000
E4 N021 0 IN2 -IN2 100000
D11 0 N019 DAMP
D12 0 N023 DAMP
C2 N018 0 0.2p
C3 N022 0 0.2p
.MODEL IDEALZ D(Ron=0 Roff=20meg Vfwd=0 Vrev=41)
.MODEL IDEAL D(Ron=0 Roff=1G Vfwd=0)
.model OSC SW(Ron=10 Vt=1.51 Vh=1.49 Ilimit=20m)
.MODEL IDEAL1 D(Ron=2 Roff=1G Vfwd=0.66)
.MODEL IDEAL2 D(Ron=175 Roff=1G Vfwd=0)
.MODEL IDEAL5 D(Ron=0 Roff=1G Vfwd=0 Vrev=5)
.model DAMP D(Ron=0 Rrev=500 Roff=1Meg Vfwd=0 Vrev=3.5 Revepsilon=1)
.ends tl494
*
*
* Макромодель ШИМ контроллера UC3825
* Создана для книги, описывающей программу LTspice/SwCAD III
.subckt uc3825 CLK RT CT RAMP EAOUT NI INV SS ILIM VCC 0 VC OUTA OUTB PGND VREF
A7 N031 N013 0 0 0 0 N032 0 OR Vhigh=5.1 Trise=20n Rout=30
A8 N026 N013 0 0 0 0 N027 0 OR Vhigh=5.1 Trise=20n Rout=30
A9 N025 0 0 0 N019 0 N026 0 AND Vhigh=5.1 Trise=20n Rout=30
A11 N032 N038 0 0 0 N030 N019 0 SRFLOP Vhigh=5.1 Trise=20n Rout=30
A12 N027 N030 0 0 0 0 N029 0 SRFLOP Vhigh=5.1 Trise=20n Rout=30
G1 VCC 0 VCC 0 table=(0 0,1 0.5m,8 1.5m,9 2.5m,10 22m)
G2 SS 0 N029 0 49µ
I1 0 SS 9µ
A3 N009 N010 0 0 0 N014 0 0 OR Vhigh=5.1 Trise=20n Rout=30
A10 N009 N002 0 0 0 0 N022 0 AND Vhigh=5.1 Trise=20n Rout=30
A13 N002 N010 0 0 0 0 N023 0 AND Vhigh=5.1 Trise=20n Rout=30
A14 N001 0 0 N014 0 0 N011 0 AND Vhigh=5.1 Trise=20n Rout=30
A15 N022 N023 N019 N013 0 0 N024 0 OR Vhigh=5.1 Trise=20n Rout=30
A16 N011 N024 0 0 0 N018 0 0 SRFLOP Vhigh=5.1 Trise=20n Rout=30
A17 N001 N018 N019 0 0 0 N012 0 OR Vhigh=5.1 Trise=20n Rout=30
A18 N007 0 N012 0 0 N007 N015 0 DFLOP Vhigh=5.1 Trise=20n Rout=30
A19 0 0 N012 N013 N015 N004 N008 0 OR Vhigh=5.1 Trise=400n Rout=30
A20 N007 N012 N013 0 0 N021 N020 0 OR Vhigh=5.1 Trise=400n Rout=30
A21 N017 EAOUT 0 0 0 0 N009 0 SCHMITT Vt=0 Vh=0 Vhigh=5.1 Trise=20n Rout=30
V1 N017 RAMP 1.25
V3 N005 0 3
F1 0 CT V3 -1
S1 0 CT N001 0 OSC
A2 SS 0 0 0 0 N038 0 0 BUF Ref=0.2 Vhigh=5.1 Trise=20n Rout=30
A1 ILIM 0 0 0 0 0 N031 0 BUF Ref=1.2 Vhigh=5.1 Trise=20n Rout=30
A6 ILIM 0 0 0 0 0 N010 0 BUF Ref=1.0 Vhigh=5.1 Trise=20n Rout=30
A5 SS 0 0 0 0 0 N025 0 BUF Ref=5.0 Vhigh=5.1 Trise=20n Rout=30
A22 CT 0 0 0 0 0 N001 0 SCHMITT Vhigh=5.1 Trise=10n Rout=30 Vt=1.9 Vh=0.9
S2 CLK VREF N001 0 LEB
E3 N028 0 SS 0 1
D1 EAOUT N028 IDEAL
A4 VCC 0 0 0 0 N013 N039 0 SCHMITT Vhigh=5.1 Trise=20n Rout=30 Vt=8.8 Vh=0.4
A23 CLK 0 0 0 0 N002 0 0 SCHMITT Vhigh=5.1 Trise=10n Rout=30 Vt=2.8 Vh=0.1
I2 CLK 0 400µ
V5 N006 0 2.3
D4 N006 CLK IDEAL
D5 N005 RT IDEAL
S3 OUTA N003 N004 0 HOUT
S4 PGND P001 N008 0 LOUT
S5 OUTB N016 N021 0 HOUT
S6 PGND P002 N020 0 LOUT
R15 EAOUT N037 500
D3 0 SS Z5_1
D7 VC N003 IDEAL
D8 VC N016 IDEAL
D9 OUTA P001 IDEAL
D10 OUTB P002 IDEAL
D11 0 VREF Z5_1
G3 0 VREF N039 0 10m
R2 N034 N035 1meg
C1 N036 0 1.58n
E2 N037 0 N036 0 table=(0,0 5,5)
I3 N035 N036 16m load
I4 N036 N035 16m load
E1 N033 0 NI INV 56234
D2 0 N036 DAMP
R1 N033 N034 1k
C2 N034 0 15.9p
R4 INV 0 5meg
R5 INV 0 5meg
C3 N035 0 0.01p
.MODEL Z5_1 D(Ron=0 Roff=1G Vfwd=0 Vrev=5.1)
.model OSC SW(Ron=100 Roff=1meg Vt=2.5 Vh=-1.5 Ilimit=10m)
.model LEB SW(Ron=10 Roff=1meg Vt=2.5 Vh=-1.5 Vser=0.6 Ilimit=5m)
.MODEL IDEAL D(Ron=0 Roff=1G Vfwd=0)
.model HOUT SW(Ron=0.75 Roff=250k Vt=3.25 Vh=-0.7 Vser=1.4 Ilimit=2)
.model LOUT SW(Ron=2 Roff=250k Vt=3.25 Vh=-0.7 Vser=0.2 Ilimit=2)
.MODEL IDEALIS D(Ron=100 Roff=1G Vfwd=0.6)
.model DAMP D(Ron=0 Rrev=500 Roff=1G Vfwd=0 Vrev=4 Revepsilon=1)
.ends uc3825
*
*
* Модель ШИМ контроллера SG3525
* создана 4 Марта 2009 года
*
.subckt sg3525a INV NI SYN OSC CT RT DCH SS CMP SHD OUA GND VC OUB VIN VRF
A1 N017 0 N009 0 0 N017 N020 0 DFLOP Vhigh=5.1 Trise=20n Rout=30
A2 N018 N019 N009 0 N020 N005 N011 0 OR Vhigh=5.1 Trise=400n Rout=30
A3 N017 N009 0 N019 N018 N023 N022 0 OR Vhigh=5.1 Trise=400n Rout=30
S1 OUA N004 N005 0 HOUT
S2 N012 OUA N011 0 LOUT
S3 OUB N021 N023 0 HOUT
S4 N028 OUB N022 0 LOUT
I1 N031 0 21m
D1 0 N031 IDEAL
R1 N029 N031 8.93
R2 N029 0 22.6
D2 N029 N032 D1_75
D3 0 N032 IDEAL
I2 N032 0 188m
R3 N032 0 2.28
D4 N028 N029 IDEAL
I3 N014 0 21m
D5 0 N014 IDEAL
R4 N013 N014 8.93
R5 N013 0 22.6
D6 N013 N015 D1_75
D7 0 N015 IDEAL
I4 N015 0 188m
R6 N015 0 2.28
D8 N012 N013 IDEAL
D9 VC N021 IDEAL
D10 VC N004 IDEAL
G1 0 N024 NI N027 table=(-70m -100u,0 0,70m 100u)
R7 N024 0 4meg
C1 N024 0 100p
R8 N024 CMP 30
R9 INV 0 1meg
R10 NI 0 1meg
I7 0 VRF 80m
R11 VRF 0 170
D11 0 VRF Z5_1
D12 0 VC Z40
A4 VIN 0 0 0 0 N001 0 0 SCHMITT Vhigh=5.1 Vlow=0.45 Trise=20n Vt=7.25 Vh=0.25
I8 VIN 0 TBL(0 0 3 3.8m 7 19m 8 20m 40 24.1m)
D13 N030 N024 Z5_6
V1 N030 0 0.2
R12 N036 0 5k
R13 SHD N002 5k
Q1 SS N002 N036 0 NPN
D14 N002 0 D1_2
R14 N001 N002 60k
D15 0 SS Z5_1
I9 0 SS 50µ
A5 N002 0 0 0 0 0 N019 0 SCHMITT Vhigh=5.1 Trise=400n Vt=634m Vh=1m
A6 N026 N009 0 0 0 0 N018 0 SRFLOP Vhigh=5.1 Trise=20n Rout=30
A7 0 N025 N019 0 0 0 N026 0 OR Vhigh=5.1 Trise=20n Rout=30
A8 CT N034 0 0 0 0 N025 0 SCHMITT Vhigh=5.1 Trise=20n Vt=0 Vh=10m
E1 N033 0 N024 0 1
E2 N035 0 SS 0 1
R15 N033 N034 500
D16 N034 N035 IDEAL
R16 INV N027 1k
C2 NI N027 40p
R17 SYN 0 2k
R18 OSC N016 250
V2 N003 0 3.64
F1 0 CT V2 -1
D17 N003 RT IDEAL
R19 N016 0 3k
D18 N009 N016 D1_6
S5 0 DCH N009 0 LSW
D19 0 CT Z5_1
A9 N008 N010 0 0 0 0 N009 0 SRFLOP Vhigh=5.1 Ref=0.9 Trise=150n Tfall=250n
A10 N006 N007 0 0 0 0 N008 0 OR Vhigh=5.1 Trise=20n
A11 CT 0 0 0 0 0 N006 0 BUF Vhigh=5.1 Ref=3.2 Trise=20n
A12 CT 0 0 0 0 N010 0 0 BUF Vhigh=5.1 Ref=0.9 Trise=20n
A13 SYN 0 0 0 0 0 N007 0 BUF Vhigh=5.1 Ref=2 Trise=20n
.model NPN NPN
.model PNP PNP
.model HOUT SW(Ron=2.7 Roff=175k Vt=2.8 Vh=-2.1 Vser=1.1 Ilimit=0.6)
.model LOUT SW(Ron=10m Roff=175k Vt=2.8 Vh=-2.1 Vser=0 Ilimit=0.6)
.model IDEAL D(Ron=0 Roff=1G Vfwd=0)
.model D1_75 D(Ron=1.57 Roff=1G Vfwd=1.75)
.model D1_6 D(Ron=0 Roff=1G Vfwd=1.6)
.model Z5_1 D(Ron=1 Roff=1G Vrev=5.075)
.model Z40 D(Ron=0 Roff=175k Vrev=40)
.model Z5_6 D(Ron=1 Roff=1G Vrev=5.6)
.model D1_2 D(Ron=0 Roff=1G Vfwd=1.2)
.model LSW SW(Vt=2.55 Vh=-0.5 Ron=50 Roff=1meg Vser=0.3 Ilimit=50ma)
.ends sg3525a
*
*
* Модель ШИМ контроллера UC3527
* создана из модели SG3525, 17 Января 2010 года
*
.subckt uc3527a INV NI SYN OSC CT RT DCH SS CMP SHD OUA GND VC OUB VIN VRF
A2 N017 0 N009 0 0 N017 N020 0 DFLOP Vhigh=5.1 Trise=20n Rout=30
A3 N018 N019 N009 0 N020 N011 N005 0 OR Vhigh=5.1 Trise=400n Rout=30
A4 N017 N009 0 N019 N018 N023 N022 0 OR Vhigh=5.1 Trise=400n Rout=30
S1 OUA N004 N005 0 HOUT
S2 N012 OUA N011 0 LOUT
S3 OUB N021 N022 0 HOUT
S4 N028 OUB N023 0 LOUT
I1 N031 0 21m
D1 0 N031 IDEAL
R2 N029 N031 8.93
R3 N029 0 22.6
D3 N029 N032 D1_75
D4 0 N032 IDEAL
I2 N032 0 188m
R4 N032 0 2.28
D5 N028 N029 IDEAL
I3 N014 0 21m
D2 0 N014 IDEAL
R1 N013 N014 8.93
R5 N013 0 22.6
D6 N013 N015 D1_75
D7 0 N015 IDEAL
I4 N015 0 188m
R6 N015 0 2.28
D8 N012 N013 IDEAL
D9 VC N021 IDEAL
D10 VC N004 IDEAL
G2 0 N024 NI N027 table=(-70m -100u,0 0,70m 100u)
R16 N024 0 4meg
C3 N024 0 100p
R17 N024 CMP 30
R7 INV 0 1meg
R11 NI 0 1meg
I7 0 VRF 80m
R19 VRF 0 170
D19 0 VRF Z5_1
D20 0 VC Z40
A6 VIN 0 0 0 0 N001 0 0 SCHMITT Vhigh=5.1 Vlow=0.45 Trise=20n Vt=7.25 Vh=0.25
I8 VIN 0 TBL(0 0 3 3.8m 7 19m 8 20m 40 24.1m)
D21 N030 N024 Z5_6
V1 N030 0 0.2
R20 N036 0 5k
R21 SHD N002 5k
Q1 SS N002 N036 0 NPN
D22 N002 0 D1_2
R22 N001 N002 60k
D23 0 SS Z5_1
I9 0 SS 50µ
A7 N002 0 0 0 0 0 N019 0 SCHMITT Vhigh=5.1 Trise=400n Vt=634m Vh=1m
A8 N026 N009 0 0 0 0 N018 0 SRFLOP Vhigh=5.1 Trise=20n Rout=30
A9 0 N025 N019 0 0 0 N026 0 OR Vhigh=5.1 Trise=20n Rout=30
A10 CT N034 0 0 0 0 N025 0 SCHMITT Vhigh=5.1 Trise=20n Vt=0 Vh=10m
E1 N033 0 N024 0 1
E2 N035 0 SS 0 1
R23 N033 N034 500
D24 N034 N035 IDEAL
R24 INV N027 1k
C1 NI N027 40p
R8 SYN 0 2k
R9 OSC N016 250
V2 N003 0 3.64
F1 0 CT V1 -1
D11 N003 RT IDEAL
R10 N016 0 3k
D12 N009 N016 D1_6
S5 0 DCH N009 0 LSW
D13 0 CT Z5_1
A1 N008 N010 0 0 0 0 N009 0 SRFLOP Vhigh=5.1 Ref=0.9 Trise=150n Tfall=250n
A5 N006 N007 0 0 0 0 N008 0 OR Vhigh=5.1 Trise=20n
A11 CT 0 0 0 0 0 N006 0 BUF Vhigh=5.1 Ref=3.2 Trise=20n
A12 CT 0 0 0 0 N010 0 0 BUF Vhigh=5.1 Ref=0.9 Trise=20n
A13 SYN 0 0 0 0 0 N007 0 BUF Vhigh=5.1 Ref=2 Trise=20n
.model NPN NPN
.model PNP PNP
.model HOUT SW(Ron=2.7 Roff=175k Vt=2.8 Vh=-2.1 Vser=1.1 Ilimit=0.5)
.model LOUT SW(Ron=10m Roff=175k Vt=2.8 Vh=-2.1 Vser=0 Ilimit=0.5)
.model IDEAL D(Ron=0 Roff=1G Vfwd=0)
.model D1_75 D(Ron=1.57 Roff=1G Vfwd=1.75)
.model D1_6 D(Ron=0 Roff=1G Vfwd=1.6)
.model Z5_1 D(Ron=1 Roff=1G Vrev=5.075)
.model Z40 D(Ron=0 Roff=175k Vrev=40)
.model Z5_6 D(Ron=1 Roff=1G Vrev=5.6)
.model D1_2 D(Ron=0 Roff=1G Vfwd=1.2)
.model LSW SW(Vt=2.55 Vh=-0.5 Ron=1 Roff=1meg Vser=0.35 Ilimit=40ma)
.ends uc3527a
*
*
* MODEL HCPL3180
* Моделирует входные и выходные параметры,
* а также временные задержки
* Создана 10 Ноября 2008 года
*
.subckt hcpl3180 NC AN CA NC Vee Vo1 Vo Vcc
V1 N005 CA 0
D1 AN N005 DINP
D2 Vcc N002 DOUT
W1 N001 N004 V1 SWON
W2 N004 Vee V1 SWOFF
V2 Vee N001 5
R1 N004 N003 1k
C1 N003 Vee 250p
S1 N002 Vo Vee N003 SWUP ON
S2 Vo Vee Vee N003 SWDN OFF
R2 NC 0 5meg
R3 Vo Vo1 1m
.model DINP D(Ron=5 Roff=10meg Vfwd=1.1 Vrev=5)
.model DOUT D(Ron=0 Roff=10meg Vfwd=2)
.model SWON CSW(It=2.9m Ih=-0,1m Ron=1 Roff=10meg)
.model SWUP SW(Vt=2.5 Vh=-0,5 Ron=1.2 Roff=10meg)
.model SWDN SW(Vt=2.5 Vh=-0,5 Ron=10meg Roff=2)
.model SWOFF CSW(It=2.9m Ih=-0,1m Ron=10meg Roff=1)
.ends hcpl3180
*
* MODEL HCPL316
* Моделирует входные и выходные параметры,
* а также временные задержки
* Создана 15 Июня 2010 года
*
.subckt HCPL316 Vin+ Vin- Vcc1 GN1 RESET FAULT Vled1+ Vled1- Vee Vee1 Vout Vc Vcc2 DESAT Vled2+ Ve
A1 N005 N008 GN1 GN1 N013 N011 N009 GN1 AND Vhigh=5 Trise=50n Rout=10 tripdt=50n
A4 N023 N027 GN1 GN1 GN1 N028 N026 GN1 SRFLOP Vhigh=5 Trise=50n Rout=10 tripdt=50n
R1 Vcc1 GN1 820
R2 N016 Vcc1 430
D1 N016 N011 Ideal
E1 N004 Ve Vled1+ Vled1- 16
E2 N023 GN1 Vled2+ Ve 2.7
D2 FAULT N028 Ideal
R3 N012 Vcc1 10k
C1 N012 GN1 390p
D3 N012 N026 Ideal
A2 N012 GN1 GN1 GN1 GN1 N013 GN1 GN1 SCHMITT Vhigh=5 Vt=1.4 Vh=0.6 Trise=50n Rout=10 tripdt=50n
A3 Vin- GN1 GN1 GN1 GN1 N008 GN1 GN1 SCHMITT Vhigh=5 Vt=1.4 Vh=0.6 Trise=50n Rout=10 tripdt=50n
A5 RESET GN1 GN1 GN1 GN1 N027 GN1 GN1 SCHMITT Vhigh=5 Vt=1.4 Vh=0.6 Trise=50n Rout=10 tripdt=50n
A6 Vin+ GN1 GN1 GN1 GN1 GN1 N005 GN1 SCHMITT Vhigh=5 Vt=1.4 Vh=0.6 Trise=50n Rout=10 tripdt=50n
A7 N002 N004 Ve Ve Ve Ve N001 Ve AND Vhigh=30 Trise=50n Rout=10 tripdt=50n
A8 N001 N003 Ve Ve Ve Ve N002 Ve OR Vhigh=30 Trise=50n Rout=10 tripdt=50n
A9 Ve Ve N007 Ve N001 Ve N006 Ve OR Vhigh=30 Trise=50n Rout=10 tripdt=50n
A10 N004 Ve Ve Ve Ve N007 Ve Ve BUF Vhigh=30 Trise=50n Rout=10 tripdt=50n
A13 N014 N004 Ve N019 N024 N020 N018 Ve AND Vhigh=30 Trise=50n Rout=10 tripdt=50n
A15 N001 Ve Ve Ve Ve N019 Ve Ve BUF Vhigh=30 Trise=50n Rout=10 tripdt=50n
A17 N021 Ve N001 Ve Ve N029 Ve Ve AND Vhigh=30 Trise=50n Rout=10 tripdt=50n
A18 N020 N029 N031 Ve Ve N024 N030 Ve AND Vhigh=30 Trise=50n Rout=10 tripdt=50n
A21 N015 Ve N032 Ve N001 Ve N031 Ve OR Vhigh=30 Trise=50n Rout=10 tripdt=50n
A22 N004 Ve Ve Ve Ve N032 Ve Ve BUF Vhigh=30 Trise=50n Rout=10 tripdt=50n
I1 Ve DESAT 250µ
A11 DESAT Ve Ve Ve Ve Ve N003 Ve BUF Vhigh=30 Ref=7 Trise=50n Rout=10 tripdt=50n
A12 Vcc2 Ve Ve Ve Ve N015 N014 Ve SCHMITT Vhigh=30 Vt=11.7 Vh=0.6 Trise=50n Rout=10 tripdt=50n
S1 Ve DESAT N006 Ve 50m
S2 Vout N025 N018 Ve darl
S3 Vee Vout N030 Ve 50x
S4 Vee Vout N001 Ve 1x
D4 Vc N025 2V
R4 Vc N025 20
D5 Vee Vout SWD
R5 Vee Vee1 1m
R6 N021 N022 10k
R7 Vcc2 N022 10k
D6 N022 Vout Ideal
D7 Ve N021 Ideal
R8 Ve Vcc2 6k
R9 Vc Vee 50k
D8 N001 N017 Ideal
R10 N017 Vled2+ 10k
D9 Vled2+ Ve 2V
D10 N009 N010 Ideal
R11 N010 Vled1+ 10k
D11 Vled1+ Vled1- 2V
R12 Vcc1 RESET 10k
D12 Ve DESAT SWD
.model Ideal D(Ron=1m Roff=1Meg Vfwd=0)
.model 50m SW(Ron=0.1 Roff=10Meg Vt=15 Vh=-5 Ilimit=50m)
.model 2V D(Ron=0.1 Roff=1Meg Vfwd=1.8)
.model darl SW(Ron=1m Roff=10Meg Vt=15 Vh=-5)
.model 50x SW(Ron=1 Roff=10Meg Vt=15 Vh=-5)
.model 1x SW(Ron=50 Roff=10Meg Vt=15 Vh=-5 Ilimit=170m)
.model SWD D(Ron=0.1 Roff=1Meg Vfwd=0.6)
.ends HCPL316
*
*
* Модель операционного усилителя К544УД2.
* Эта модель позимствована из библиотеки r-opamp.lib Micro-Cap
* created using Parts version 1.04 on 10/11/90 at 10:58
*
* connections: non-inverting input
* | inverting input
* | | positive power supply
* | | | negative power supply
* | | | | output
* | | | | | compensation
* | | | | | / \
.subckt k544ud2 1 2 3 4 5 6 7
*
c1 11 12 174.6E-15
dc 5 53 dx
de 54 5 dx
dlp 90 91 dx
dln 92 90 dx
dp 4 3 dx
egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5
fb 7 99 poly(5) vb vc ve vlp vln 0 127.3E6 -100E6 100E6 100E6 -100E6
ga 6 0 11 12 1.885E-3
gcm 0 6 10 99 188.5E-9
iss 3 10 dc 400.0E-6
hlim 90 0 vlim 1K
j1 11 2 10 jx
j2 12 1 10 jx
r2 6 9 100.0E3
rd1 4 11 530.5
rd2 4 12 530.5
ro1 8 5 50
ro2 7 99 25
rp 3 4 9.000E3
rss 10 99 500.0E3
vb 9 0 dc 0
vc 3 53 dc 2
ve 54 4 dc 2
vlim 7 8 dc 0
vlp 91 0 dc 20
vln 0 92 dc 20
.model dx D(Is=800.0E-18)
.model jx PJF(Is=15.00E-12 Beta=17.77E-3 Vto=-1)
.ends
* Тестовый узел для снятия траектории перемагничивания
* сердечника гистерезисной модели нелинейной индуктивности.
* Для настройки необходимо ввести параметры:
* A, N и Lm тестируемой индуктивности.
* Модель создал 30 Января 2010 года
* Володин Валентин Яковлевич
* e-mail: valvolodin@narod.ru
*
.subckt g_loop L I1 I2 B COM H
G1 COM N001 L I1 {1µ/(A*N)}
C1 N001 COM 1µ
E1 B COM N001 COM 1
V1 I1 I2 0
H1 H COM V1 {N/Lm}
.ends g_loop
*
* MODEL MOC3082
* Моделирует входные и выходные параметры
* Создана 15 Июня 2010 года
*
.subckt MOC3082 A C T2 T1
D1 A C Led
R3 N015 T2 1
E1 N006 T2 A C 2.366864
D2 N005 T1 Dout
A1 N009 N012 T2 T2 T2 T2 N010 T2 SRFLOP Vhigh=5 Trise=2.5u
E2 N014 T2 N015 T2 table=(-0.0003 0,-0.00025 5,0.00025 5,0.0003 0)
R2 N013 N014 1k
E3 N002 T2 T1 T2 table=(-801 5,-800 0,800 0,801 5)
A2 N001 N008 T2 T2 T2 N011 N009 T2 OR Vhigh=5 Trise=15u
R1 N006 N007 1k
R4 N001 N002 1k
A3 N004 N007 T2 T2 T2 T2 N008 T2 AND Vhigh=5 Trise=1u
E4 N003 T2 T1 T2 table=(-20 0,-12 5,12 5,20 0)
R5 N004 N003 1k
S1 N015 N005 N010 T2 SW1
A4 N011 N013 T2 T2 T2 T2 N012 T2 AND Vhigh=5 Trise=1u
.model Led D(Ron=6.25 Roff=1Meg Vfwd=1.05)
.model SW1 SW(Ron=1 Roff=1G Vt=2.5 Vh=-1)
.model Dout D(Ron=3 Roff=1g Vfwd=1 Vrev=1)
.ends MOC3082
*
* MODEL MOC3052
* Моделирует входные и выходные параметры
* Создана 15 Июня 2010 года
*
.subckt MOC3052 A C T2 T1
D1 A C Led
R3 N012 T2 1
E1 N004 T2 A C 2.366864
D2 N003 T1 Dout
A1 N006 N009 T2 T2 T2 T2 N007 T2 SRFLOP Vhigh=5 Trise=2.5u
E2 N011 T2 N012 T2 table=(-0.0003 0,-0.00025 5,0.00025 5,0.0003 0)
R2 N010 N011 1k
E3 N002 T2 T1 T2 table=(-601 5,-600 0,600 0,601 5)
A2 N001 N005 T2 T2 T2 N008 N006 T2 OR Vhigh=5 Trise=15u
R1 N004 N005 1k
R4 N001 N002 1k
S1 N012 N003 N007 T2 SW1
A4 N008 N010 T2 T2 T2 T2 N009 T2 AND Vhigh=5 Trise=1u
.model Led D(Ron=6.25 Roff=1Meg Vfwd=1.05)
.model SW1 SW(Ron=1 Roff=1G Vt=2.5 Vh=-1)
.model Dout D(Ron=3 Roff=1g Vfwd=1 Vrev=1)
.ends MOC3052
*
**$ENCRYPTED_LIB
**$INTERFACE
* PSpice Model Editor - Version 16.2.0
*$
*LM5106
*****************************************************************************
* (C) Copyright 2017, 2014 Texas Instruments Incorporated. All rights reserved.
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose. The model is
** provided solely on an "as is" basis. The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
** Released by: WEBENCH Design Center,Texas Instruments Inc.
* Part: LM5106
* Date: 03MAR2017
* Model Type: TRANSIENT
* Simulator: PSPICE
* Simulator Version: 16.2.0.p001
* EVM Order Number:
* EVM Users Guide:
* Datasheet: SNVS424B-JANUARY 2006-REVISED OCTOBER 2009
*
*
* Model Version: Final 1.2
*
*****************************************************************************
*
* Updates:
* Final 1.20
*<Made this change to the model>
* 1. Internal boot diode has been removed.
*
*
* Final 1.10
*<Made this change to the model>
* 1. Added VSS as internal reference to IN,EN and VDD as per datasheet
*
* Final 1.00
* Release to Web
*
*****************************************************************************
.SUBCKT LM5106_TRANS VDD HB HO HS RDT EN IN VSS LO
*Input side pull down resistor
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
4422d4d8fccede2036c99ade498f4ae423f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafe6010778b2d3aa384e298a26a8109b449e57f60eeb0e4b28
*non-inverting schmitt trigger
50d2d08c437291362b1776c90e2cbf888d58e00aa5e4b23216e621de13fd46a48f60d9f40c8454845d432a3addaca5aea9c1124efa3d36f531c82df76a39528c
*inverter
0a6ee70dcacb9cf9bc33cf4b9a8e35a167ba26a8801dd0570ce81077b4b2d266a8a1e324630994b423f363b602b1468c65b7a7a8b7c9c3cc93384b78005b6cbe
* vdd internal voltage
6cb4e74fdac0811b454515a6a31f5641a9862457b1f12ff64c18fbdce03c350323f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafa0ce8fb433de2d31
*Enable side pull down resistor
3d189e89dcc9ca0421892b0385b0514b87181f27e59112cafe48a02b6c14cfa446ca5b4a444b059e6c943f00085f5cf5f960e21b5b5206859385af0f7b82eadd
* Enable Input
6ad3147ebcb02c0c8010c4d6ac50aadaccff27c83c082f3d36bf9301a7fbbeddc1c856d9a9e4cc71a162d5cf2011be4a23f363b602b1468c8cc56ae3d60d6eb0
0a51007a9adb5452149869a96e63feff8010c4d6ac50aadaf778cbe23a8e82f127b10d4e3564b768d88b123ce771c3989f0aadf1b0ed053017bf97a9defd412c
c4341f4404fad2a7149869a96e63feffd9a92cf44831ca67fe48a02b6c14cfa446ca5b4a444b059e6c943f00085f5cf5f960e21b5b5206859385af0f7b82eadd
*uvlo for vdd supply voltage
ee168ce818c764aea4d8de77656c5c829437bff5876d80b5a889bb0b943fd66e8a67d1df29cee5a6f97ad83ac8f02e28ec0d543c9bed6d34421269ddd39232a9
* High and Low side data
cc4c750adc3fb1c8b2649c5d9239fa39293b32b574626957730e44749538384eb953301b37b45c08fb067ed56f1395bb11b68fed0c01b7dc455a8ae455fa9e64
b77d9a0e757baf9cf97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1bd92f1751424f96a58017133e3c0aa22337bc3ea9fc7653a7
570da4e0d503e10694d7f4c5060af153293b32b574626957705a14f2f0837d40b953301b37b45c08fb067ed56f1395bb11b68fed0c01b7dc455a8ae455fa9e64
c2356fa0b0fe3ea992a96aa8aba2a4a5b0774b05b69a98dc1a6e1ec8a3fd5622c5e7406100813095e88fd96043438a13ca73fe88e945bbb848b776b482843c85
*bootstrap diode** This internal boot diode is removed as it is not connected internally
*dbst vdd hb dboot
*.model dboot d (is=6.304P n=1.392 rs=0.8)
fb3f3a7d1e0a5c318bf6a49cb5ad34cdfe48a02b6c14cfa446ca5b4a444b059e6c943f00085f5cf5f960e21b5b520685cc63f01ce9290e596e2cf81ce3770a21
59d69f61ead4b6f82151824e6f7f47a00764b46485b4430bc679759ae010152bf97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90613e2a5ceb49d3d2a9
*uvlo for bootstrap
7a9b2772ec53cf5ebfbfcd46d6b93227fa07acc7123ae2c924f365b61f8ba8d6bdfa4435a160867cac729c6091ca15a7049ddd1aa119e91a2562bb693a86a32b
*input to the high side gate driver
81935cb9a6393d4a2151824e6f7f47a0978d1614863125410082fe96c8daafe21de662d873deeaf47f67a916fb9a17166e3bfdaf47f237d282d021902886a9e0
d7c636b6c8a188c45cff240ec26f133bce12c80be18166120447cee7779e63fed88b123ce771c3989f0aadf1b0ed05304411c61bcdd5d4502636c4c80633cf7f
425b3ec9ffb3b1ffd4c3a16c1e041ca323f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafe6010778b2d3aa384e298a26a8109b449e57f60eeb0e4b28
*** high side driver
e1baa41ca2926036d2c6d2a086fab44e23f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafe6010778b2d3aa384e298a26a8109b449e57f60eeb0e4b28
03c231969296cacb73b75adce572832bd7419e01aabb5d2df97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1be00c686c1d1868c1
3248d99624d6e5a8e96e0fd0719864b7b3ac11f07892dac963fada395437076bfbb16a63131dd9e723f363b602b1468c65b7a7a8b7c9c3cc93384b78005b6cbe
58a26970bff0cef3f67fd7390ee4a4ada51a2be7624ab18ee4306ec5773c6a03d7b884e2f676d8783265aab34de4afbbf97ad83ac8f02e28dc7e8a0a8ab6f659
*input to the lo side gate driver
7338bb30d75950dd2151824e6f7f47a0789ba35b46b82f0e9cf177efb8b5cdc4243f6298660481f08af2d651367c1619fe48a02b6c14cfa45901e3b6978ef395
bacc77806636c9144d576a46877e7ce071d8de11d4421e94730c706a980a6942a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
96dd321192b7c34ed4c3a16c1e041ca323f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafe6010778b2d3aa384e298a26a8109b449e57f60eeb0e4b28
*** low side driver
bbe304a9aac0011f59781a4f01028e6185af9833c50021c2b61514791f5b2f7b59a013b5b3f9f5dc4dc748e5d2f02104d6b09113dddd205662dce88a9a3b4ef9
*Leading Edge Delay
1681fcdcfb96ec7603648bdd601c16208aa892b7901820c1f003ede6cbc38bcc40a1cf63d8908dddac729c6091ca15a7049ddd1aa119e91a2562bb693a86a32b
$CDNENCFINISH
.ENDS LM5106_TRANS
*$
.SUBCKT COMPHYST_VD IN OUT
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
2932f2004574ed4a800d98744678c7f881985988eda0444f6cdbb77195001ce15cee60cb1370eaf1343470a6fb3a6fd11e0e9d9a6dec85be08d933832306078b
14573c8c8a1525e1a19c6e8f56c7f51a4d5b1b73307b1303f97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1be00c686c1d1868c1
$CDNENCFINISH
.ENDS COMPHYST_VD
*$
.SUBCKT COMPHYST_BST IN OUT
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
2932f2004574ed4a800d98744678c7f8bde0e8d68446a3b28b426d6e8094ec75f5b2abf7d9cfc39f877df8d1fc48cb931e0e9d9a6dec85be08d933832306078b
77d493ccc6296e5539815d535784f8ee4d5b1b73307b1303f97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1be00c686c1d1868c1
$CDNENCFINISH
.ENDS COMPHYST_BST
*$
.SUBCKT INV IN VOUT VDD VSS
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
b783ee3498b15d33683a917c165f383e9df8f21333740c6bb617af621947eddc4a5ff7a0cc1991d2fa3cdfbbcef56ecba9c1124efa3d36f531c82df76a39528c
$CDNENCFINISH
.ENDS INV
*$
.SUBCKT HIGHSIDE_DRIVER IN HO VDD_HS VSS_HS
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
e5475a578b99ad30300ddfad2a41ee8b0b9ed0e81ccce831f2ca1f7515515c4a644126c9831a96bdac729c6091ca15a7049ddd1aa119e91a2562bb693a86a32b
bc5c9678ec7e645338cf83d23d876314bf3b0910634452346c156cd7eba93d33a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
f529b8b0971d6f21fba48765e80089afff95962caf924726ae45cc1a0b6fe74ba9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
500a81217c2b6144d095cb9cec7689f10dfb17e6f14149eca48bc22e00d480124dc748e5d2f02104d6b09113dddd20561db7a907c1524c40551c02e435de1dba
500a81217c2b6144323c2b7e49b81f35a5a8ee17510a5780a48bc22e00d480124dc748e5d2f02104d6b09113dddd20561db7a907c1524c40551c02e435de1dba
$CDNENCFINISH
.ENDS HIGHSIDE_DRIVER
*$
.SUBCKT LOWSIDE_DRIVER IN LO VDD_LS VSS_LS
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
34aa9e85a2179ec5e39c9bb83772ba97c7d2b5f61d926fcdfdc8c24bb0e82347644126c9831a96bdac729c6091ca15a7049ddd1aa119e91a2562bb693a86a32b
2250b95ac780227f38cf83d23d876314ad1cca4794b9025b2c7af137a309ae92a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
1853eeb8f65a6535fba48765e80089afafd689262873132ef050e31c464352a3a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
500a81217c2b6144d095cb9cec7689f10dfb17e6f14149eca48bc22e00d480124dc748e5d2f02104d6b09113dddd20561db7a907c1524c40551c02e435de1dba
500a81217c2b6144323c2b7e49b81f35a5a8ee17510a5780ddaf898c31814f2523f363b602b1468c65b7a7a8b7c9c3cc11c31b6689583eafa0ce8fb433de2d31
$CDNENCFINISH
.ENDS LOWSIDE_DRIVER
*$
.SUBCKT DEADTIME HO LO RT HO_OUT LO_OUT
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
abc065028e16b45a5f4390ce26235cfff97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1bd92f1751424f96a5a54c58b580281770
ac78e76f83ee62eac5ce884ee4368c29d88b123ce771c3989f0aadf1b0ed05304411c61bcdd5d45006c86cadf839b839a6a32b208f8407e30899c4b28240701d
6c21f4b556ba0465f66ed31251eba28aa9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f1433c7c0a6bccbd509fbd91412c773e3a72e5b8fc98f492a16
373189c39a0944d69249f832e83c2e943c183d693a817ddc057c0a172331e6e35d10313f6e6b51b8946e938bb915f3b4216d1f495490922244cbfcb3928a30f3
ff5e2c04a2880f47dfcfe581c295ce16fe48a02b6c14cfa446ca5b4a444b059e6c943f00085f5cf5f960e21b5b520685cc63f01ce9290e596e2cf81ce3770a21
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00e8edc4aa244a2aa9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f1433c7c0a6bccbd509fbd91412c773e3a7ede7300d17d58b232e105844443cfc9a
8e57db6407c2bf117e7cbeddd83ee18666597b797c939616c1dfe3d601bcaedf7bd061664183994512d1d43dc6c38db6c757e21da447a9cafa45b3704cb37268
adb9c0850fdcaab605fdfe34c189b1d9b3565d6226b39e19cbf4aa4825d7a729bcd51ba27263a1c97904fc2e28b5e6b8d88b123ce771c39817716aa82d4aed6d
259b586b5ad6d72dd04b6df50ee32d1f4dc748e5d2f02104d6b09113dddd20561db7a907c1524c40a1c84e5d514471eacb7f79204b80ac6740f1c2427532d883
64701dbbf2ca7fc88077074281ca478aa9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f1433c7c0a6bccbd509fbd91412c773e3a72e5b8fc98f492a16
34479ccd5ff95248630e79bad652acbf793fe481e2ce161e359cac96d4799d1a9894c1140acaefedf97ad83ac8f02e28ec0d543c9bed6d34421269ddd39232a9
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500a81217c2b61443598cbdb13ea6f5e88e62f6784971ee02d546d2c8ccd5f779e194cb55ac1d246b766d188534f091f266a6b1570d4b6bf8b3124f4fe24c243
60c237ce90a3a59df431329d06e882532351134b947face792a96aa8aba2a4a5b0774b05b69a98dc1a6e1ec8a3fd5622c5e740610081309585536ab1ce55ef66
25fc3421273ffd152fe092bad42ea0ee793fe481e2ce161e359cac96d4799d1a9894c1140acaefedf97ad83ac8f02e28ec0d543c9bed6d34421269ddd39232a9
f5d1e995f676cd699c24694dd05abfbfff4c68a64bf46b9a92a96aa8aba2a4a5b0774b05b69a98dc1a6e1ec8a3fd5622c5e740610081309585536ab1ce55ef66
9cbc7454215fd28445529bd41fc6f625451c2d8244e4d3eca9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f1433c7c0a6bccbd50981ad3df002da1326
500a81217c2b6144031fc80e478e676288e62f6784971ee02d546d2c8ccd5f779e194cb55ac1d246a735a3023f2d3c3fc55c8187f39b70be255506be95a8dd14
84c8ec1fb984fbda6a1f6924429044b048cb9ce57166bc783e3aff287dd991c4f97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90613e2a5ceb49d3d2a9
500a81217c2b6144674b789ab3318a1588e62f6784971ee02d546d2c8ccd5f779e194cb55ac1d246b766d188534f091f266a6b1570d4b6bf8b3124f4fe24c243
8b90a55c39e0f861f431329d06e882532351134b947face792a96aa8aba2a4a5b0774b05b69a98dc1a6e1ec8a3fd5622c5e740610081309585536ab1ce55ef66
$CDNENCFINISH
.ENDS DEADTIME
*$
.SUBCKT POWERMOS G D S PARAMS: RDSON=16m Ciss=1375p Crss=70p Coss=340p VSP=3.5 RG=1
* This is a simple model for Power MOSFET.
* The parameters modeled are
* - RDSon,
* - Input Capacitance,
* - Reverse capacitance,
* - Output capacitance,
* - Switching point voltage (Gate voltage where the FET starts switching),
* - Gate Resistance
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
e0bee0f3fadd67247a09d08f6581ff6d3c36b07de35c0fd1971f24c942ff26fba9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
93d3808648446fd710c3510df4b5a5826b7ea2f7d25113054dc748e5d2f02104d6b09113dddd20561db7a907c1524c40a1c84e5d514471eaee90d11b1f9275cb
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9afa1f10a7f457ea8a10549faa6b20c5e56df482c906b545a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f1433c7c0a6bccbd50981ad3df002da1326
717cdf892ff6b6ffefa753fca24015ef80214d085ee9de2b971f24c942ff26fba9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
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ddf70eae3b5929056ec13594dccec84ae6bdf42e7ab289d1fe48a02b6c14cfa446ca5b4a444b059e6c943f00085f5cf5f960e21b5b5206859385af0f7b82eadd
aa43ff73c98fcc68fa923a1537eadefd4bd07fb9cf5d1cc2e7fec64b8dc6e1ee110d78f4e782488ff97ad83ac8f02e28ec0d543c9bed6d34421269ddd39232a9
6f186e75fe2741d96d3f313208a3ab11fbabf3bbebf5462191b87735de5fe504a9c1124efa3d36f5701f9b47218864eaf4a107b9e6a23f14416cf80a60e6083b
1e7e75f62a07f7b1bbcb463bf6330e44b242aa309ceed850b469a8d685c038373e74721d4357bd91ae9d3e9023b3b0e28277fd894ea733d81b8d39eebc1c1a9c
4026ecc45716a6732c34dc911361c236f97ad83ac8f02e28ec0d543c9bed6d34a14eb79af31f90615d7c31fae7f97c1bd92f1751424f96a5a54c58b580281770
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$CDNENCFINISH
.ENDS POWERMOS
*$
.SUBCKT D_D1 1 2
$CDNENCSTART
eee8c5c7a2bc4b01f045f303678664e7916da0bae22e8cb0bba041dd67c69ce448ea70148a9ac1670c8926c1ac5057c8ccfcd77bf87ca9dc255506be95a8dd14
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$CDNENCFINISH
.ENDS D_D1
*$
* PSpice Model Editor - Version 16.0.0
*$
* TLV431
*****************************************************************************
* (C) Copyright 2009 Texas Instruments Incorporated. All rights reserved. **
*****************************************************************************
** This�model�is designed as an aid for customers of Texas Instruments. **
**�TI and its�licensors and suppliers make�no warranties, either expressed **
** or implied, with respect to this�model, including the�warranties of **
** merchantability or fitness for�a particular purpose. The model is **
** provided solely on an "as is" basis. The entire�risk as to its quality **
** and performance is with the customer� **��
*****************************************************************************
*
* This model was developed for Texas Instruments Incorporated by:
* AEi Systems, LLC
* 5777 W. Century Blvd., Suite 876
* Los Angeles, California 90045
*
* This model is subject to change without notice. Neither Texas Instruments Incorporated
* nor AEi Systems is responsible for updating this model.
* For more information regarding modeling services, model libraries and simulation
* products, please call AEi Systems at (310) 216-1144, or contact AEi Systems by email:
* info@AENG.com. Or visit AEi Systems on the web at http://www.AENG.com.
*
*****************************************************************************
*
** Released by: Analog eLab Design Center, Texas Instruments Inc.
* Part: TLV431
* Date: 12/14/2009
* Simulator: PSpice
* Simulator Version: 16.0.0.p001
* Datasheet: SLVS139T - July 1996 - Revised June 2007
*
*****************************************************************************
*
* Updates:
*
* Final 2.00
* Changed encrypted model to unencrypted.
*
* Final 1.00
* Release to Web.
*
*****************************************************************************
.SUBCKT TLV431 A K Fdbk
V_V2 N59715 A 1.24
G_G4 K A TABLE { V(STAGE2, A) }
+ ( (-10,0)(0,0)(15m,15m)(10,16m) )
R_R1 A STAGE1 1
R_R2 A STAGE2 1
C_C2 A STAGE1 159e-6
C_C3 A STAGE2 80n
G_G1 A STAGE1 Fdbk N59715 4
X_D1 A STAGE1 DC_1mV_1A_1V_1nA
G_G3 A STAGE2 STAGE1 A 1
X_D2 STAGE1 N59689 DC_1mV_1A_1V_1nA
X_D3 A K DC_1mV_1A_1V_1nA
V_V1 N59689 A 15m
.ENDS TLV431
*$
.subckt DC_1mV_1A_1V_1nA A C
G1 A C TABLE { V(A, C) } ( (-1,-1n)(0,0)(1m,1) (2m,10) (3m,1000) )
.ends DC_1mV_1A_1V_1nA
*$
TL431.LIB
引用: LMYBIGBOSS 发表于 2022-11-23 13:32 可以导入Altium designer 22 里面 正常打开，呵呵
已经不想用altium了，能用其他用其他
**********************************************************************
*
* Copyright (c) International Rectifier
*
* IR2103: High and Low Side Driver
*
* Ports
* HIN: Logic Input for High Side Gate Driver Output (HO), in phase
* LIN: Logic Input for Low Side Gate Driver Output (LO), out of phase
* VB: High Side Floating Supply
* HO: High Side Gate Driver Output
* VS: High Side Floating Supply Return
* VCC: Low Side and Logic Fixed Supply
* LO: Low Side Gate Driver Output
* COM: Low Side Return
*
* Created by Pspice Version 8
*
* Date Created: 04/2003
*
***********************************************************************
*
* This behavioral model was developed in compliance with Data Sheet
* No. PD60045-N except noted below:
* (1) There is no frequency effect on temperature.
* (2) The power dissipation is different.
* (3) The values of output high/low short circuit current are adjusted
* for the proper modeling of turn-on rise/turn-off fall time.
* (4) The "Low side return (COM)" pin must be grounded.
*
***********************************************************************
.SUBCKT IR2103 VCC HIN LIN com VB HO VS LO
+PARAMS:
+ T1=-40 T2=25 T3=125
+ tonT1=120n tonT2=160n tonT3=210n
+ V1=10 V2=15 V3=20
+ tonV1=185n tonV2=160n tonV3=130n
+ toffT1=115n toffT2=150n toffT3=200n
+ toffV1=175n toffV2=150n toffV3=125n
+ Rdelay=20 Cdelay=10n
.MODEL diode25 d
+IS=1.0e-14 RS=0.01 N=1 EG=1.11
+XTI=3 BV=25 IBV=0.0001 CJO=0
+VJ=0.75 M=0.333 FC=0.5 TT=0
+KF=0 AF=1
.MODEL diode625 d
+IS=1.0e-14 RS=0.01 N=1 EG=1.11
+XTI=3 BV=625 IBV=0.0001 CJO=0
+VJ=0.75 M=0.333 FC=0.5 TT=0
+KF=0 AF=1
D_MD5_D3 LO VCC diode25
D_MD5_D2 com LO diode25
D_MD5_D1 com VCC diode25
C_MD5_C1 com LO 10p
R_MD5_OLS_r1 LO MD5_OLS_4 45.6 TC=0.00284965, -3.4965e-06
R_MD5_OLS_r2 MD5_OLS_5 LO 22.8 TC=0.00474592, -7.45921e-06
S_MD5_OLS_P VCC MD5_OLS_4 MD5_Inv_3 com _MD5_OLS_P
RS_MD5_OLS_P MD5_Inv_3 com 1G
.MODEL _MD5_OLS_P VSWITCH Roff=1e8 Ron=1m Voff=5V Von=0V
S_MD5_OLS_N MD5_OLS_5 com MD5_Inv_3 com _MD5_OLS_N
RS_MD5_OLS_N MD5_Inv_3 com 1G
.MODEL _MD5_OLS_N VSWITCH Roff=1e8 Ron=1m Voff=0V Von=5V
S_MD5_Inv_P MD5_Inv_2 MD5_Inv_3 MD3_Dly2_9 com _MD5_Inv_P
RS_MD5_Inv_P MD3_Dly2_9 com 1G
.MODEL _MD5_Inv_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD5_Inv_N MD5_Inv_3 com MD3_Dly2_9 com _MD5_Inv_N
RS_MD5_Inv_N MD3_Dly2_9 com 1G
.MODEL _MD5_Inv_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD5_Inv_C com MD5_Inv_3 1p
V_MD5_Inv_V MD5_Inv_2 com 5V
R_MD4_R1 VS VB 500k TC=-0.0111146, 0.0000656919
D_MD4_D3 HO VB diode25
D_MD4_D1 VS VB diode25
D_MD4_D4 com VS diode625
D_MD4_D5 com VB diode625
C_MD4_c1 VS HO 10p IC=0
D_MD4_D2 VS HO diode25
R_MD4_OHS_r1 HO MD4_OHS_4 45.6 TC=0.00284965, -3.4965e-06
R_MD4_OHS_r2 MD4_OHS_5 HO 22.8 TC=0.00474592, -7.45921e-06
S_MD4_OHS_P VB MD4_OHS_4 MD4_Inv_3 com _MD4_OHS_P
RS_MD4_OHS_P MD4_Inv_3 com 1G
.MODEL _MD4_OHS_P VSWITCH Roff=1e8 Ron=1m Voff=5V Von=0V
S_MD4_OHS_N MD4_OHS_5 VS MD4_Inv_3 com _MD4_OHS_N
RS_MD4_OHS_N MD4_Inv_3 com 1G
.MODEL _MD4_OHS_N VSWITCH Roff=1e8 Ron=1m Voff=0V Von=5V
S_MD4_Inv_P MD4_Inv_2 MD4_Inv_3 MD3_Dly1_9 com _MD4_Inv_P
RS_MD4_Inv_P MD3_Dly1_9 com 1G
.MODEL _MD4_Inv_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD4_Inv_N MD4_Inv_3 com MD3_Dly1_9 com _MD4_Inv_N
RS_MD4_Inv_N MD3_Dly1_9 com 1G
.MODEL _MD4_Inv_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD4_Inv_C com MD4_Inv_3 1p
V_MD4_Inv_V MD4_Inv_2 com 5V
C_MD1_C2 com MD2_Nor2_1 10p
R_MD1_R3 LIN VCC 5Meg TC=-0.00623776, 0.0000223776
R_MD1_R2 com HIN 1.667Meg TC=-0.00623776, 0.0000223776
E_MD1_ABM21 MD1_4 com VALUE { V(VCC)
+ -V(HIN) -10 }
G_MD1_G1 HIN com MD1_5 com 0.17u
E_MD1_ABM22 MD1_5 com VALUE { V(MD1_4)
+ *V(HIN)/5 }
E_MD1_ABM13 MD1_Trig2_1 com VALUE { V(VCC) }
E_MD1_ABM12 MD1_Trig2_2 com VALUE { V(LIN) }
C_MD1_C1 com MD1_Inv_1 10p
C_MD1_C3 com MD2_Nor1_2 10p
R_MD1_R1 com VCC 100k TC=-0.00298757, 0.00001320
C_MD1_Trig2_C com MD1_Inv_1 10p
S_MD1_Trig2_P MD1_Trig2_4 com MD1_Inv_1 com _MD1_Trig2_P
RS_MD1_Trig2_P MD1_Inv_1 com 1G
.MODEL _MD1_Trig2_P VSWITCH Roff=1e10 Ron=1 Voff=0 Von=5
X_MD1_Trig2_Comp MD1_Trig2_2 MD1_Trig2_3 MD1_Inv_1 com COMP
R_MD1_Trig2_R2 MD1_Trig2_4 MD1_Trig2_3 5.63Meg
R_MD1_Trig2_R3 com MD1_Trig2_4 19.4Meg
R_MD1_Trig2_R1 MD1_Trig2_3 MD1_Trig2_7 100Meg
E_MD1_Trig2_ABM18 MD1_Trig2_7 com VALUE { V(MD1_Trig2_1)*0.0+15V }
S_MD1_Inv_P MD1_Inv_2 MD2_Nor1_2 MD1_Inv_1 com _MD1_Inv_P
RS_MD1_Inv_P MD1_Inv_1 com 1G
.MODEL _MD1_Inv_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD1_Inv_N MD2_Nor1_2 com MD1_Inv_1 com _MD1_Inv_N
RS_MD1_Inv_N MD1_Inv_1 com 1G
.MODEL _MD1_Inv_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD1_Inv_C com MD2_Nor1_2 1p
V_MD1_Inv_V MD1_Inv_2 com 5V
C_MD1_Trig1_C com MD2_Nor2_1 10p
S_MD1_Trig1_P MD1_Trig1_4 com MD2_Nor2_1 com _MD1_Trig1_P
RS_MD1_Trig1_P MD2_Nor2_1 com 1G
.MODEL _MD1_Trig1_P VSWITCH Roff=1e10 Ron=1 Voff=0 Von=5
X_MD1_Trig1_Comp HIN MD1_Trig1_3 MD2_Nor2_1 com COMP
R_MD1_Trig1_R2 MD1_Trig1_4 MD1_Trig1_3 5.63Meg
R_MD1_Trig1_R3 com MD1_Trig1_4 19.4Meg
R_MD1_Trig1_R1 MD1_Trig1_3 MD1_Trig1_7 100Meg
E_MD1_Trig1_ABM18 MD1_Trig1_7 com VALUE { V(VCC)*0.0+15V }
D_MD1_D2 LIN VCC diode25
D_MD1_D1 HIN VCC diode25
D_MD1_D4 com HIN diode25
D_MD1_D3 com VCC diode25
D_MD1_D5 com LIN diode25
C_MD3_c1 com MD3_Dly1_9 10p
C_MD3_c2 com MD3_Dly2_9 10p
S_MD3_Dly1_P1 MD3_Dly1_10 MD3_Dly1_12 MD3_Dly1_6 com _MD3_Dly1_P1
RS_MD3_Dly1_P1 MD3_Dly1_6 com 1G
.MODEL _MD3_Dly1_P1 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly1_P2 MD3_Dly1_12 MD3_Dly1_8 MD3_Dly1_9 com _MD3_Dly1_P2
RS_MD3_Dly1_P2 MD3_Dly1_9 com 1G
.MODEL _MD3_Dly1_P2 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly1_N1 MD3_Dly1_8 com MD3_Dly1_9 com _MD3_Dly1_N1
RS_MD3_Dly1_N1 MD3_Dly1_9 com 1G
.MODEL _MD3_Dly1_N1 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
E_MD3_Dly1_Turn_On_Vth MD3_Dly1_3 com VALUE { (5* EXP(-( {tonT1}+(
+ {tonT3}-{tonT1})/({T3}-{T1})*(TEMP-{T1})) /10/ 10n))/(5* EXP(-( {tonT1}+(
+ {tonT3}-{tonT1})/({T3}-{T1})*({T2}-{T1})) /10/ 10n))*5*EXP(-{tonT2}/10/10n)*
+ (EXP(-({tonV1}+({tonV3}-{tonV1})/({V3}-{V1})*(V(VCC)-{V1}))/10/10n))/((EXP(-(
+ {tonV1}+({tonV3}-{tonV1})/({V3}-{V1})*({V2}-{V1}))/10/10n))) }
E_MD3_Dly1_Turn_Off_Vth MD3_Dly1_5 com VALUE { (5-5* EXP(-( {toffT1}+(
+ {toffT3}-{toffT1})/({T3}-{T1})*(TEMP-{T1}))/10/10n))/(5-5* EXP(-( {toffT1}+(
+ {toffT3}-{toffT1})/({T3}-{T1})*({T2}-{T1}))/10/10n))*(5-5*EXP(-
+ {toffT2}/10/10n))*(1-EXP(-( {toffV1}+({toffV3}-{toffV1})/({V3}-{V1})*(V(VCC)-
+ {V1})) /10/ 10n))/(1-EXP(-( {toffV1}+({toffV3}-{toffV1})/({V3}-{V1})*({V2}-
+ {V1})) /10/ 10n)) }
S_MD3_Dly1_P0 MD3_Dly1_14 MD3_Dly1_4 MD2_Inv5_3 com _MD3_Dly1_P0
RS_MD3_Dly1_P0 MD2_Inv5_3 com 1G
.MODEL _MD3_Dly1_P0 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD3_Dly1_N0 MD3_Dly1_4 com MD2_Inv5_3 com _MD3_Dly1_N0
RS_MD3_Dly1_N0 MD2_Inv5_3 com 1G
.MODEL _MD3_Dly1_N0 VSWITCH Roff=1e6 Ron=10 Voff=0V Von=5V
S_MD3_Dly1_P3 MD3_Dly1_11 MD3_Dly1_13 MD3_Dly1_8 com _MD3_Dly1_P3
RS_MD3_Dly1_P3 MD3_Dly1_8 com 1G
.MODEL _MD3_Dly1_P3 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly1_P4 MD3_Dly1_13 MD3_Dly1_9 MD3_Dly1_7 com _MD3_Dly1_P4
RS_MD3_Dly1_P4 MD3_Dly1_7 com 1G
.MODEL _MD3_Dly1_P4 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly1_N3 MD3_Dly1_9 com MD3_Dly1_7 com _MD3_Dly1_N3
RS_MD3_Dly1_N3 MD3_Dly1_7 com 1G
.MODEL _MD3_Dly1_N3 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
C_MD3_Dly1_C0 com MD3_Dly1_4 10n
V_MD3_Dly1_V0 MD3_Dly1_14 com 5V
C_MD3_Dly1_C1 com MD3_Dly1_6 10p
V_MD3_Dly1_V1 MD3_Dly1_10 com 5V
C_MD3_Dly1_C3 com MD3_Dly1_8 10p IC=-5V
C_MD3_Dly1_C4 com MD3_Dly1_9 10p IC=0V
V_MD3_Dly1_V2 MD3_Dly1_11 com 5V
C_MD3_Dly1_C2 com MD3_Dly1_7 10p
S_MD3_Dly1_N2 MD3_Dly1_8 com MD3_Dly1_6 com _MD3_Dly1_N2
RS_MD3_Dly1_N2 MD3_Dly1_6 com 1G
.MODEL _MD3_Dly1_N2 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
S_MD3_Dly1_N4 MD3_Dly1_9 com MD3_Dly1_8 com _MD3_Dly1_N4
RS_MD3_Dly1_N4 MD3_Dly1_8 com 1G
.MODEL _MD3_Dly1_N4 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
X_MD3_Dly1_Comp2 MD3_Dly1_4 MD3_Dly1_5 MD3_Dly1_7 com COMP
X_MD3_Dly1_Comp1 MD3_Dly1_3 MD3_Dly1_4 MD3_Dly1_6 com COMP
S_MD3_Dly2_P1 MD3_Dly2_10 MD3_Dly2_12 MD3_Dly2_6 com _MD3_Dly2_P1
RS_MD3_Dly2_P1 MD3_Dly2_6 com 1G
.MODEL _MD3_Dly2_P1 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly2_P2 MD3_Dly2_12 MD3_Dly2_8 MD3_Dly2_9 com _MD3_Dly2_P2
RS_MD3_Dly2_P2 MD3_Dly2_9 com 1G
.MODEL _MD3_Dly2_P2 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly2_N1 MD3_Dly2_8 com MD3_Dly2_9 com _MD3_Dly2_N1
RS_MD3_Dly2_N1 MD3_Dly2_9 com 1G
.MODEL _MD3_Dly2_N1 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
E_MD3_Dly2_Turn_On_Vth MD3_Dly2_3 com VALUE { (5* EXP(-( {tonT1}+(
+ {tonT3}-{tonT1})/({T3}-{T1})*(TEMP-{T1})) /10/ 10n))/(5* EXP(-( {tonT1}+(
+ {tonT3}-{tonT1})/({T3}-{T1})*({T2}-{T1})) /10/ 10n))*5*EXP(-{tonT2}/10/10n)*
+ (EXP(-({tonV1}+({tonV3}-{tonV1})/({V3}-{V1})*(V(VCC)-{V1}))/10/10n))/((EXP(-(
+ {tonV1}+({tonV3}-{tonV1})/({V3}-{V1})*({V2}-{V1}))/10/10n))) }
E_MD3_Dly2_Turn_Off_Vth MD3_Dly2_5 com VALUE { (5-5* EXP(-( {toffT1}+(
+ {toffT3}-{toffT1})/({T3}-{T1})*(TEMP-{T1}))/10/10n))/(5-5* EXP(-( {toffT1}+(
+ {toffT3}-{toffT1})/({T3}-{T1})*({T2}-{T1}))/10/10n))*(5-5*EXP(-
+ {toffT2}/10/10n))*(1-EXP(-( {toffV1}+({toffV3}-{toffV1})/({V3}-{V1})*(V(VCC)-
+ {V1})) /10/ 10n))/(1-EXP(-( {toffV1}+({toffV3}-{toffV1})/({V3}-{V1})*({V2}-
+ {V1})) /10/ 10n)) }
S_MD3_Dly2_P0 MD3_Dly2_14 MD3_Dly2_4 MD2_Inv6_3 com _MD3_Dly2_P0
RS_MD3_Dly2_P0 MD2_Inv6_3 com 1G
.MODEL _MD3_Dly2_P0 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD3_Dly2_N0 MD3_Dly2_4 com MD2_Inv6_3 com _MD3_Dly2_N0
RS_MD3_Dly2_N0 MD2_Inv6_3 com 1G
.MODEL _MD3_Dly2_N0 VSWITCH Roff=1e6 Ron=10 Voff=0V Von=5V
S_MD3_Dly2_P3 MD3_Dly2_11 MD3_Dly2_13 MD3_Dly2_8 com _MD3_Dly2_P3
RS_MD3_Dly2_P3 MD3_Dly2_8 com 1G
.MODEL _MD3_Dly2_P3 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly2_P4 MD3_Dly2_13 MD3_Dly2_9 MD3_Dly2_7 com _MD3_Dly2_P4
RS_MD3_Dly2_P4 MD3_Dly2_7 com 1G
.MODEL _MD3_Dly2_P4 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD3_Dly2_N3 MD3_Dly2_9 com MD3_Dly2_7 com _MD3_Dly2_N3
RS_MD3_Dly2_N3 MD3_Dly2_7 com 1G
.MODEL _MD3_Dly2_N3 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
C_MD3_Dly2_C0 com MD3_Dly2_4 10n
V_MD3_Dly2_V0 MD3_Dly2_14 com 5V
C_MD3_Dly2_C1 com MD3_Dly2_6 10p
V_MD3_Dly2_V1 MD3_Dly2_10 com 5V
C_MD3_Dly2_C3 com MD3_Dly2_8 10p IC=-5V
C_MD3_Dly2_C4 com MD3_Dly2_9 10p IC=0V
V_MD3_Dly2_V2 MD3_Dly2_11 com 5V
C_MD3_Dly2_C2 com MD3_Dly2_7 10p
S_MD3_Dly2_N2 MD3_Dly2_8 com MD3_Dly2_6 com _MD3_Dly2_N2
RS_MD3_Dly2_N2 MD3_Dly2_6 com 1G
.MODEL _MD3_Dly2_N2 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
S_MD3_Dly2_N4 MD3_Dly2_9 com MD3_Dly2_8 com _MD3_Dly2_N4
RS_MD3_Dly2_N4 MD3_Dly2_8 com 1G
.MODEL _MD3_Dly2_N4 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
X_MD3_Dly2_Comp2 MD3_Dly2_4 MD3_Dly2_5 MD3_Dly2_7 com COMP
X_MD3_Dly2_Comp1 MD3_Dly2_3 MD3_Dly2_4 MD3_Dly2_6 com COMP
C_MD2_c1 com MD2_Nand1_2 10p IC=0
C_MD2_C4 com MD2_Inv5_1 10p
C_MD2_c2 com MD2_Nand2_2 10p IC=0
C_MD2_C3 com MD2_Nand2_3 10p
S_MD2_Inv1_P MD2_Inv1_2 MD2_Nor1_1 MD2_Nor2_1 com _MD2_Inv1_P
RS_MD2_Inv1_P MD2_Nor2_1 com 1G
.MODEL _MD2_Inv1_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv1_N MD2_Nor1_1 com MD2_Nor2_1 com _MD2_Inv1_N
RS_MD2_Inv1_N MD2_Nor2_1 com 1G
.MODEL _MD2_Inv1_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv1_C com MD2_Nor1_1 1p
V_MD2_Inv1_V MD2_Inv1_2 com 5V
S_MD2_Inv2_P MD2_Inv2_2 MD2_Nor2_2 MD2_Nor1_2 com _MD2_Inv2_P
RS_MD2_Inv2_P MD2_Nor1_2 com 1G
.MODEL _MD2_Inv2_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv2_N MD2_Nor2_2 com MD2_Nor1_2 com _MD2_Inv2_N
RS_MD2_Inv2_N MD2_Nor1_2 com 1G
.MODEL _MD2_Inv2_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv2_C com MD2_Nor2_2 1p
V_MD2_Inv2_V MD2_Inv2_2 com 5V
S_MD2_Inv4_P MD2_Inv4_2 MD2_Nand2_2 MD2_Rise2_6 com _MD2_Inv4_P
RS_MD2_Inv4_P MD2_Rise2_6 com 1G
.MODEL _MD2_Inv4_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv4_N MD2_Nand2_2 com MD2_Rise2_6 com _MD2_Inv4_N
RS_MD2_Inv4_N MD2_Rise2_6 com 1G
.MODEL _MD2_Inv4_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv4_C com MD2_Nand2_2 1p
V_MD2_Inv4_V MD2_Inv4_2 com 5V
V_MD2_Nor1_V MD2_Nor1_3 com 5V
S_MD2_Nor1_P1 MD2_Nor1_3 MD2_Nor1_4 MD2_Nor1_1 com _MD2_Nor1_P1
RS_MD2_Nor1_P1 MD2_Nor1_1 com 1G
.MODEL _MD2_Nor1_P1 VSWITCH Roff=1e6 Ron=1 Voff=5 Von=0V
S_MD2_Nor1_P2 MD2_Nor1_4 MD2_Rise1_1 MD2_Nor1_2 com _MD2_Nor1_P2
RS_MD2_Nor1_P2 MD2_Nor1_2 com 1G
.MODEL _MD2_Nor1_P2 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Nor1_N1 MD2_Rise1_1 com MD2_Nor1_2 com _MD2_Nor1_N1
RS_MD2_Nor1_N1 MD2_Nor1_2 com 1G
.MODEL _MD2_Nor1_N1 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
S_MD2_Nor1_N2 MD2_Rise1_1 com MD2_Nor1_1 com _MD2_Nor1_N2
RS_MD2_Nor1_N2 MD2_Nor1_1 com 1G
.MODEL _MD2_Nor1_N2 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
V_MD2_Nor2_V MD2_Nor2_3 com 5V
S_MD2_Nor2_P1 MD2_Nor2_3 MD2_Nor2_4 MD2_Nor2_1 com _MD2_Nor2_P1
RS_MD2_Nor2_P1 MD2_Nor2_1 com 1G
.MODEL _MD2_Nor2_P1 VSWITCH Roff=1e6 Ron=1 Voff=5 Von=0V
S_MD2_Nor2_P2 MD2_Nor2_4 MD2_Rise2_1 MD2_Nor2_2 com _MD2_Nor2_P2
RS_MD2_Nor2_P2 MD2_Nor2_2 com 1G
.MODEL _MD2_Nor2_P2 VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Nor2_N1 MD2_Rise2_1 com MD2_Nor2_2 com _MD2_Nor2_N1
RS_MD2_Nor2_N1 MD2_Nor2_2 com 1G
.MODEL _MD2_Nor2_N1 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
S_MD2_Nor2_N2 MD2_Rise2_1 com MD2_Nor2_1 com _MD2_Nor2_N2
RS_MD2_Nor2_N2 MD2_Nor2_1 com 1G
.MODEL _MD2_Nor2_N2 VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
E_MD2_Rise1_ABM12 MD2_Rise1_5 com VALUE { (5*EXP(-520n/{Rdelay}/
+ {Cdelay}))*(5*EXP(-(570n+(470n-570n)/(20-10)*(V(VCC)-10))/{Rdelay}/
+ {Cdelay}))/(5*EXP(-(570n+(470n-570n)/(20-10)*(15-10))/{Rdelay}/{Cdelay})) }
V_MD2_Rise1_V MD2_Rise1_3 com 5V
C_MD2_Rise1_C1 com MD2_Inv3_1 10p IC=-5V
S_MD2_Rise1_P MD2_Rise1_3 MD2_Rise1_4 MD2_Rise1_1 com _MD2_Rise1_P
RS_MD2_Rise1_P MD2_Rise1_1 com 1G
.MODEL _MD2_Rise1_P VSWITCH Roff=1e6 Ron=1m Voff=5V Von=0V
S_MD2_Rise1_N MD2_Rise1_4 com MD2_Rise1_1 com _MD2_Rise1_N
RS_MD2_Rise1_N MD2_Rise1_1 com 1G
.MODEL _MD2_Rise1_N VSWITCH Roff=1e6 Ron={Rdelay} Voff=0V Von=5V
X_MD2_Rise1_Comp MD2_Rise1_4 MD2_Rise1_5 MD2_Inv3_1 com COMP
C_MD2_Rise1_C0 com MD2_Rise1_4 {Cdelay}
E_MD2_Rise2_ABM12 MD2_Rise2_5 com VALUE { (5*EXP(-520n/{Rdelay}/
+ {Cdelay}))*(5*EXP(-(570n+(470n-570n)/(20-10)*(V(VCC)-10))/{Rdelay}/
+ {Cdelay}))/(5*EXP(-(570n+(470n-570n)/(20-10)*(15-10))/{Rdelay}/{Cdelay})) }
V_MD2_Rise2_V MD2_Rise2_3 com 5V
C_MD2_Rise2_C1 com MD2_Rise2_6 10p IC=-5V
S_MD2_Rise2_P MD2_Rise2_3 MD2_Rise2_4 MD2_Rise2_1 com _MD2_Rise2_P
RS_MD2_Rise2_P MD2_Rise2_1 com 1G
.MODEL _MD2_Rise2_P VSWITCH Roff=1e6 Ron=1m Voff=5V Von=0V
S_MD2_Rise2_N MD2_Rise2_4 com MD2_Rise2_1 com _MD2_Rise2_N
RS_MD2_Rise2_N MD2_Rise2_1 com 1G
.MODEL _MD2_Rise2_N VSWITCH Roff=1e6 Ron={Rdelay} Voff=0V Von=5V
X_MD2_Rise2_Comp MD2_Rise2_4 MD2_Rise2_5 MD2_Rise2_6 com COMP
C_MD2_Rise2_C0 com MD2_Rise2_4 {Cdelay}
S_MD2_Inv3_P MD2_Inv3_2 MD2_Nand1_2 MD2_Inv3_1 com _MD2_Inv3_P
RS_MD2_Inv3_P MD2_Inv3_1 com 1G
.MODEL _MD2_Inv3_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv3_N MD2_Nand1_2 com MD2_Inv3_1 com _MD2_Inv3_N
RS_MD2_Inv3_N MD2_Inv3_1 com 1G
.MODEL _MD2_Inv3_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv3_C com MD2_Nand1_2 1p
V_MD2_Inv3_V MD2_Inv3_2 com 5V
E_MD2_Uvcc_ABM3 MD2_Uvcc_4 com VALUE { 8.12+(8.3-8.12)/(125+40)*(TEMP+40)
+ }
E_MD2_Uvcc_ABM2 MD2_Uvcc_3 com VALUE { 8.75+(9.0-8.75)/(125+40)*(TEMP+40)
+ }
C_MD2_Uvcc_C1 MD2_Uvcc_2 MD2_Uvcc_3 10n
C_MD2_Uvcc_C2 MD2_Uvcc_4 MD2_Uvcc_2 10n
C_MD2_Uvcc_C3 com MD2_Nand2_1 10p
S_MD2_Uvcc_P MD2_Uvcc_3 MD2_Uvcc_2 MD2_Nand2_1 com _MD2_Uvcc_P
RS_MD2_Uvcc_P MD2_Nand2_1 com 1G
.MODEL _MD2_Uvcc_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Uvcc_N MD2_Uvcc_2 MD2_Uvcc_4 MD2_Nand2_1 com _MD2_Uvcc_N
RS_MD2_Uvcc_N MD2_Nand2_1 com 1G
.MODEL _MD2_Uvcc_N VSWITCH Roff=1e6 Ron=1 Voff=0V Von=5V
E_MD2_Uvcc_Opam MD2_Nand2_1 com VALUE {LIMIT(V(VCC,MD2_Uvcc_2)*500, 0V,
+ +5V)}
V_MD2_Nand1_V MD2_Nand1_5 com 5V
S_MD2_Nand1_P1 MD2_Nand1_5 MD2_Inv5_1 MD2_Nand1_2 com _MD2_Nand1_P1
RS_MD2_Nand1_P1 MD2_Nand1_2 com 1G
.MODEL _MD2_Nand1_P1 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD2_Nand1_P2 MD2_Nand1_5 MD2_Inv5_1 MD2_Nand2_1 com _MD2_Nand1_P2
RS_MD2_Nand1_P2 MD2_Nand2_1 com 1G
.MODEL _MD2_Nand1_P2 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD2_Nand1_N1 MD2_Inv5_1 MD2_Nand1_4 MD2_Nand2_1 com _MD2_Nand1_N1
RS_MD2_Nand1_N1 MD2_Nand2_1 com 1G
.MODEL _MD2_Nand1_N1 VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
S_MD2_Nand1_N2 MD2_Nand1_4 com MD2_Nand1_2 com _MD2_Nand1_N2
RS_MD2_Nand1_N2 MD2_Nand1_2 com 1G
.MODEL _MD2_Nand1_N2 VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
S_MD2_Inv5_P MD2_Inv5_2 MD2_Inv5_3 MD2_Inv5_1 com _MD2_Inv5_P
RS_MD2_Inv5_P MD2_Inv5_1 com 1G
.MODEL _MD2_Inv5_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv5_N MD2_Inv5_3 com MD2_Inv5_1 com _MD2_Inv5_N
RS_MD2_Inv5_N MD2_Inv5_1 com 1G
.MODEL _MD2_Inv5_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv5_C com MD2_Inv5_3 1p
V_MD2_Inv5_V MD2_Inv5_2 com 5V
S_MD2_Inv6_P MD2_Inv6_2 MD2_Inv6_3 MD2_Nand2_3 com _MD2_Inv6_P
RS_MD2_Inv6_P MD2_Nand2_3 com 1G
.MODEL _MD2_Inv6_P VSWITCH Roff=1e6 Ron=1 Voff=5V Von=0V
S_MD2_Inv6_N MD2_Inv6_3 com MD2_Nand2_3 com _MD2_Inv6_N
RS_MD2_Inv6_N MD2_Nand2_3 com 1G
.MODEL _MD2_Inv6_N VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
C_MD2_Inv6_C com MD2_Inv6_3 1p
V_MD2_Inv6_V MD2_Inv6_2 com 5V
V_MD2_Nand2_V MD2_Nand2_5 com 5V
S_MD2_Nand2_P1 MD2_Nand2_5 MD2_Nand2_3 MD2_Nand2_2 com _MD2_Nand2_P1
RS_MD2_Nand2_P1 MD2_Nand2_2 com 1G
.MODEL _MD2_Nand2_P1 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD2_Nand2_P2 MD2_Nand2_5 MD2_Nand2_3 MD2_Nand2_1 com _MD2_Nand2_P2
RS_MD2_Nand2_P2 MD2_Nand2_1 com 1G
.MODEL _MD2_Nand2_P2 VSWITCH Roff=1e6 Ron=10 Voff=5V Von=0V
S_MD2_Nand2_N1 MD2_Nand2_3 MD2_Nand2_4 MD2_Nand2_1 com _MD2_Nand2_N1
RS_MD2_Nand2_N1 MD2_Nand2_1 com 1G
.MODEL _MD2_Nand2_N1 VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
S_MD2_Nand2_N2 MD2_Nand2_4 com MD2_Nand2_2 com _MD2_Nand2_N2
RS_MD2_Nand2_N2 MD2_Nand2_2 com 1G
.MODEL _MD2_Nand2_N2 VSWITCH Roff=1e8 Ron=3 Voff=0V Von=5V
.ENDS IR2103
.SUBCKT COMP 1 2 3 4
E1 5 4 VALUE={IF((V(1)>V(2)), V(4)+5V, V(4))}
R1 5 3 1
C1 3 4 10P
.ENDS
IR2103 SPICE 代码
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