[求助]
OMAPL138平台串口uart0的问题，请大侠帮忙
UART0无法发送数据，用示波器无法测试到波形。由于管脚和MII复用，之前一直被用作MII。现改回UART0，配置PINMUX3，UART0中断显示正常，现将内核信息附上：
inux version 2.6.33-rc4 (linux@ubuntu) (gcc version 4.3.2 (crosstool-NG-1.8.1 -tangshun) ) #296 PREEMPT Mon Sep 26 18:44:52 CST 2011
CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
CPU: VIVT data cache, VIVT instruction cache
Machine: DaVinci DA850/OMAP-L138/AM18xx DIM Based Board
Memory policy: ECC disabled, Data cache writeback
DaVinci da850/omap-l138 variant 0x1
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 8128
Kernel command line: noinitrd root=/dev/mtdblock4 console=ttyS1,115200n8 rootfstype=yaffs2 mem=32M
PID hash table entries: 128 (order: -3, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 32MB = 32MB total
Memory: 27648KB available (4064K code, 300K data, 432K init, 0K highmem)
SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
Hierarchical RCU implementation.
NR_IRQS:245
Console: colour dummy device 80x30
Calibrating delay loop... 149.50 BogoMIPS (lpj=747520)
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
DaVinci: 144 gpio irqs
NET: Registered protocol family 16
MUX: initialized LCD_D_0
MUX: Setting register LCD_D_0
PINMUX17 (0x00000044) = 0x00000000 -> 0x00000020
MUX: initialized LCD_D_1
MUX: Setting register LCD_D_1
PINMUX17 (0x00000044) = 0x00000020 -> 0x00000022
MUX: initialized LCD_D_2
MUX: Setting register LCD_D_2
PINMUX16 (0x00000040) = 0x00000000 -> 0x20000000
MUX: initialized LCD_D_3
MUX: Setting register LCD_D_3
PINMUX16 (0x00000040) = 0x20000000 -> 0x22000000
MUX: initialized LCD_D_4
MUX: Setting register LCD_D_4
PINMUX16 (0x00000040) = 0x22000000 -> 0x22200000
MUX: initialized LCD_D_5
MUX: Setting register LCD_D_5
PINMUX16 (0x00000040) = 0x22200000 -> 0x22220000
MUX: initialized LCD_D_6
MUX: Setting register LCD_D_6
PINMUX16 (0x00000040) = 0x22220000 -> 0x22222000
MUX: initialized LCD_D_7
MUX: Setting register LCD_D_7
PINMUX16 (0x00000040) = 0x22222000 -> 0x22222200
MUX: initialized LCD_D_8
MUX: Setting register LCD_D_8
PINMUX18 (0x00000048) = 0x80000000 -> 0x80000020
MUX: initialized LCD_D_9
MUX: Setting register LCD_D_9
PINMUX18 (0x00000048) = 0x80000020 -> 0x80000022
MUX: initialized LCD_D_10
MUX: Setting register LCD_D_10
PINMUX17 (0x00000044) = 0x00000022 -> 0x20000022
MUX: initialized LCD_D_11
MUX: Setting register LCD_D_11
PINMUX17 (0x00000044) = 0x20000022 -> 0x22000022
MUX: initialized LCD_D_12
MUX: Setting register LCD_D_12
PINMUX17 (0x00000044) = 0x22000022 -> 0x22200022
MUX: initialized LCD_D_13
MUX: Setting register LCD_D_13
PINMUX17 (0x00000044) = 0x22200022 -> 0x22220022
MUX: initialized LCD_D_14
MUX: Setting register LCD_D_14
PINMUX17 (0x00000044) = 0x22220022 -> 0x22222022
MUX: initialized LCD_D_15
MUX: Setting register LCD_D_15
PINMUX17 (0x00000044) = 0x22222022 -> 0x22222222
MUX: initialized LCD_PCLK
MUX: Setting register LCD_PCLK
PINMUX18 (0x00000048) = 0x80000022 -> 0x82000022
MUX: initialized LCD_MCLK
MUX: Setting register LCD_MCLK
PINMUX18 (0x00000048) = 0x82000022 -> 0x22000022
MUX: initialized LCD_HSYNC
MUX: Setting register LCD_HSYNC
PINMUX19 (0x0000004c) = 0x00000000 -> 0x00000002
MUX: initialized LCD_VSYNC
MUX: Setting register LCD_VSYNC
PINMUX19 (0x0000004c) = 0x00000002 -> 0x00000022
MUX: initialized NLCD_AC_ENB_CS
MUX: Setting register NLCD_AC_ENB_CS
PINMUX19 (0x0000004c) = 0x00000022 -> 0x02000022
MUX: initialized GPIO0_15
MUX: Setting register GPIO0_15
PINMUX0 (0x00000000) = 0x44440000 -> 0x44440008
MUX: initialized GPIO0_11
MUX: Setting register GPIO0_11
PINMUX0 (0x00000000) = 0x44440008 -> 0x44500008
MUX: initialized NEMA_RW
MUX: Setting register NEMA_RW
PINMUX7 (0x0000001c) = 0x10110110 -> 0x11110110
MUX: initialized EMA_BA_1
MUX: Setting register EMA_BA_1
PINMUX5 (0x00000014) = 0x00110110 -> 0x08110110
________________________________-
DA850_AEMIF_CE4CFG is 0x3ffffffc________________________________-
DA850_AEMIF_CE4CFG is 0x8862259dDA850_AEMIF_NANDFCR is 0x207
MUX: initialized EMA_D_8
MUX: Setting register EMA_D_8
PINMUX8 (0x00000020) = 0x00000000 -> 0x10000000
MUX: initialized EMA_D_9
MUX: Setting register EMA_D_9
PINMUX8 (0x00000020) = 0x10000000 -> 0x11000000
MUX: initialized EMA_D_10
MUX: Setting register EMA_D_10
PINMUX8 (0x00000020) = 0x11000000 -> 0x11100000
MUX: initialized EMA_D_11
MUX: Setting register EMA_D_11
PINMUX8 (0x00000020) = 0x11100000 -> 0x11110000
MUX: initialized EMA_D_12
MUX: Setting register EMA_D_12
PINMUX8 (0x00000020) = 0x11110000 -> 0x11111000
MUX: initialized EMA_D_13
MUX: Setting register EMA_D_13
PINMUX8 (0x00000020) = 0x11111000 -> 0x11111100
MUX: initialized EMA_D_14
MUX: Setting register EMA_D_14
PINMUX8 (0x00000020) = 0x11111100 -> 0x11111110
MUX: initialized EMA_D_15
MUX: Setting register EMA_D_15
PINMUX8 (0x00000020) = 0x11111110 -> 0x11111111
MUX: initialized EMA_WAIT_1
MUX: Setting register EMA_WAIT_1
PINMUX6 (0x00000018) = 0x00000080 -> 0x08000080
MUX: initialized EMA_A_7
MUX: Setting register EMA_A_7
PINMUX12 (0x00000030) = 0x01100000 -> 0x01100001
MUX: initialized EMA_A_8
MUX: Setting register EMA_A_8
PINMUX11 (0x0000002c) = 0x00000000 -> 0x10000000
MUX: initialized EMA_A_9
MUX: Setting register EMA_A_9
PINMUX11 (0x0000002c) = 0x10000000 -> 0x11000000
****
SEt aemif clk ok
****
MUX: initialized GPIO0_11
MUX: Setting register GPIO0_11
PINMUX0 (0x00000000) = 0x44500008 -> 0x44500008
MUX: initialized GPIO0_11
MUX: Setting register GPIO0_11
PINMUX0 (0x00000000) = 0x44500008 -> 0x44500008
MUX: initialized SPI1_CS_6
MUX: Setting register SPI1_CS_6
PINMUX4 (0x00000010) = 0x22222288 -> 0x22221288
MUX: initialized SPI1_TSC_PEND
MUX: Setting register SPI1_TSC_PEND
PINMUX2 (0x00000008) = 0x00000000 -> 0x00000800
MUX: initialized GPIO8_15
MUX: Setting register GPIO8_15
PINMUX18 (0x00000048) = 0x22000022 -> 0x22000822
MUX: initialized GPIO8_14
MUX: Setting register GPIO8_14
PINMUX18 (0x00000048) = 0x22000822 -> 0x22008822
MUX: initialized GPIO8_13
MUX: Setting register GPIO8_13
PINMUX18 (0x00000048) = 0x22008822 -> 0x22088822
MUX: initialized GPIO8_12
MUX: Setting register GPIO8_12
PINMUX18 (0x00000048) = 0x22088822 -> 0x22888822
MUX: initialized GPIO6_3
MUX: Setting register GPIO6_3
PINMUX19 (0x0000004c) = 0x02000022 -> 0x02008022
MUX: initialized GPIO6_1
MUX: Setting register GPIO6_1
PINMUX19 (0x0000004c) = 0x02008022 -> 0x02808022
MUX: initialized GPIO0_1
MUX: Setting register GPIO0_1
PINMUX1 (0x00000004) = 0x00000000 -> 0x08000000
MUX: initialized GPIO0_3
MUX: Setting register GPIO0_3
PINMUX1 (0x00000004) = 0x08000000 -> 0x08080000
MUX: initialized GPIO0_4
MUX: Setting register GPIO0_4
PINMUX1 (0x00000004) = 0x08080000 -> 0x08088000
MUX: initialized GPIO0_5
MUX: Setting register GPIO0_5
PINMUX1 (0x00000004) = 0x08088000 -> 0x08088800
MUX: initialized GPIO0_14
MUX: Setting register GPIO0_14
PINMUX0 (0x00000000) = 0x44500008 -> 0x44500088
MUX: initialized GPIO1_14
MUX: Setting register GPIO1_14
PINMUX2 (0x00000008) = 0x00000800 -> 0x00000880
MUX: initialized GPIO0_12
MUX: Setting register GPIO0_12
PINMUX0 (0x00000000) = 0x44500088 -> 0x44508088
MUX: initialized GPIO0_13
MUX: Setting register GPIO0_13
PINMUX0 (0x00000000) = 0x44508088 -> 0x44508888
MUX: initialized NEMA_CS_2
MUX: Setting register NEMA_CS_2
PINMUX7 (0x0000001c) = 0x11110110 -> 0x11110111
MUX: initialized GPIO0_10
MUX: Setting register GPIO0_10
PINMUX0 (0x00000000) = 0x44508888 -> 0x44808888
MUX: initialized GPIO2_4
MUX: Setting register GPIO2_4
PINMUX6 (0x00000018) = 0x08000080 -> 0x08008080
MUX: initialized GPIO6_13
MUX: Setting register GPIO6_13
PINMUX13 (0x00000034) = 0x00000000 -> 0x00000800
MUX: initialized UART0_RXD
MUX: Setting register UART0_RXD
PINMUX3 (0x0000000c) = 0x00000000 -> 0x00020000
MUX: initialized UART0_TXD
MUX: Setting register UART0_TXD
PINMUX3 (0x0000000c) = 0x00020000 -> 0x00220000
bio: create slab at 0
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
cfg80211: Calling CRDA to update world regulatory domain
Switching to clocksource timer0_1
musb_hdrc: version 6.0, cppi4.1-dma, host, debug=0
Waiting for USB PHY clock good...
musb_hdrc: USB Host mode controller at fee00000 using DMA, IRQ 58
musb_hdrc musb_hdrc: MUSB HDRC host driver
musb_hdrc musb_hdrc: new USB bus registered, assigned bus number 1
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
################################################
EMAC: RMII PHY configured.
################################################
JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
msgmni has been set to 54
alg: No test for stdrng (krng)
io scheduler noop registered (default)
da8xx_lcdc da8xx_lcdc.0: GLCD: Found G05VN01 panel
Console: switching to colour frame buffer device 60x34
Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
serial8250.0: ttyS0 at MMIO 0x1c42000 (irq = 25) is a 16550A
serial8250.0: ttyS1 at MMIO 0x1d0c000 (irq = 53) is a 16550A
console [ttyS1] enabled
serial8250.0: ttyS2 at MMIO 0x1d0d000 (irq = 61) is a 16550A
NAND device: Manufacturer ID: 0xec, Chip ID: 0xdc (Samsung NAND 512MiB 3,3V 8-bit)
Bad block table not found for chip 0
Bad block table not found for chip 0
Scanning device for bad blocks
Bad eraseblock 1920 at 0x00000f000000
Creating 5 MTD partitions on "davinci_nand.1":
0x000000000000-0x000000020000 : "u-boot env"
0x000000020000-0x000000040000 : "UBL"
0x000000040000-0x0000000c0000 : "u-boot"
0x000000200000-0x000000600000 : "kernel"
0x000000600000-0x000020000000 : "filesystem"
davinci_nand davinci_nand.1: controller rev. 2.5
setup mode 0, 8 bits/w, 3000000 Hz max --> 0
davinci SPI Controller driver at 0xfef0e000 (irq = 56) use_dma=1
dm9000 Ethernet Driver, V1.31
eth0: dm9000a at c2808e00,c280ce10 IRQ 134 MAC: 00:61:6e:64:79:31 (platform data)
usbcore: registered new interface driver asix
usbcore: registered new interface driver cdc_ether
usbcore: registered new interface driver net1080
usbcore: registered new interface driver rndis_host
usbcore: registered new interface driver cdc_subset
usbcore: registered new interface driver zaurus
usbcore: registered new interface driver rndis_wlan
usbcore: registered new interface driver rt2800usb
console [netcon0] enabled
netconsole: network logging started
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ohci ohci.0: DA8xx OHCI
ohci ohci.0: new USB bus registered, assigned bus number 2
ohci ohci.0: irq 59, io mem 0x01e25000
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
usbcore: registered new interface driver wusb-cbaf
usbcore: registered new interface driver cdc_wdm
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mice: PS/2 mouse device common for all mice
input: gpio-keys as /devices/platform/gpio-keys/input/input0
setup mode 0, 8 bits/w, 3000000 Hz max --> 0
ads7846 spi1.6: touchscreen, irq 130
input: ADS7846 Touchscreen as /devices/platform/spi_davinci.1/spi1.6/input/input1
omap_rtc omap_rtc: rtc core: registered omap_rtc as rtc0
omap_rtc: RTC power up reset detected
omap_rtc: already running
watchdog watchdog: heartbeat 60 sec
cpuidle: using governor ladder
cpuidle: using governor menu
TCP cubic registered
NET: Registered protocol family 17
lib80211: common routines for IEEE802.11 drivers
Clocks: disable unused emac
Clocks: disable unused mcasp
Clocks: disable unused mmcsd
Clocks: disable unused spi0
davinci_emac_probe: using random MAC addr: 6e:77:0a:a7:ee:11
emac-mii: probed
omap_rtc omap_rtc: setting system clock to 2000-01-01 00:31:59 UTC (946686719)
yaffs: dev is 32505860 name is "mtdblock4" rw
yaffs: passed flags ""
VFS: Mounted root (yaffs2 filesystem) on device 31:4.
Freeing init memory: 432K
[ 本帖最后由 r16721853 于 2011-10-8 10:57 编辑 ]
回复 沙发 helloDSP_ 的帖子
根据上面的DATASHEET我做的配置就是把PINMUX3的RX和TX使能了 内核启动信息显示了 还有就是因为流控制线没接，所以就把CTS和RTS也屏蔽了。
但是发送就是没波形，read的perror显示 Resource temporarily unavailable
而用DSP测试显示有波形，且收发正常。
测试程序如下：
fd1=open("/dev/ttyS0",O_RDWR|O_NOCTTY|O_NDELAY);//防止任何终端输入影响程序，不关心DCD信号线电平
printf("fd1=%d\n",fd1);
tcgetattr(fd1,&opt);
cfmakeraw(&opt);
cfsetispeed(&opt,BAUDRATE1);
cfsetospeed(&opt,BAUDRATE1);
if(tcsetattr(fd1,TCSANOW,&opt)!=0)
{
perror("tcsetattr error");
return -1;
}
opt.c_cflag&=~CRTSCTS;
opt.c_cflag|=CS8;
opt.c_cflag&=~CSTOPB;
opt.c_cflag|=(CLOCAL|CREAD);//确保程序不被其他端口控制和信号干扰，同时串口驱动将读取进入的数据
opt.c_iflag|=IGNPAR;//忽略真错误和校验错误
opt.c_oflag=0;
opt.c_lflag=0;
// tcflush(fd1,TCIOFLUSH);
while(1)
{
sprintf(buf,"AT\r");
n=write(fd1,buf,strlen(buf));
printf("write %d\n",n);
sleep(3);
memset(buf,0,10);
if(read(fd1,buf,5)<0)
perror("read failed");
// while(read(fd1,buf,10)<0);
printf("read ---%s\n",buf);
// sleep(2);
}
回复 沙发 helloDSP_ 的帖子
DSP是可以出波形的，但是在ARM下 linux中就是发送无波形
DSP中寄存器配置如下：
uint32_t divisor;
// enable the psc and config pinmux for the given uart port.
switch ((uint32_t)uart)
{
case UART0_REG_BASE:
EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_UART0, PSC_ENABLE);
EVMOMAPL138_pinmuxConfig(PINMUX_UART0_REG, PINMUX_UART0_MASK, PINMUX_UART0_VAL);
break;
case UART1_REG_BASE:
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_UART1, PSC_ENABLE);
EVMOMAPL138_pinmuxConfig(PINMUX_UART1_REG_0, PINMUX_UART1_MASK_0, PINMUX_UART1_VAL_0);
EVMOMAPL138_pinmuxConfig(PINMUX_UART1_REG_1, PINMUX_UART1_MASK_1, PINMUX_UART1_VAL_1);
break;
case UART2_REG_BASE:
EVMOMAPL138_lpscTransition(PSC1, DOMAIN0, LPSC_UART2, PSC_ENABLE);
EVMOMAPL138_pinmuxConfig(PINMUX_UART2_REG_0, PINMUX_UART2_MASK_0, PINMUX_UART2_VAL_0);
EVMOMAPL138_pinmuxConfig(PINMUX_UART2_REG_1, PINMUX_UART2_MASK_1, PINMUX_UART2_VAL_1);
break;
default:
return (ERR_INIT_FAIL);
}
// put xmtr/rcvr in reset.
uart->PWREMU_MGMT = 0;
// set baud rate...assumes default 16x oversampling.
divisor = SYSCLOCK2_HZ / (baud_rate * 16);
uart->DLH = (divisor & 0x0000FF00) >> 8;
uart->DLL = divisor & 0x000000FF;
// enable xmtr/rcvr fifos.
uart->FCR = 0;
SETBIT(uart->FCR, FIFOEN);
SETBIT(uart->FCR, RXCLR | TXCLR | DMAMODE1);
// disable interrupts, flow control, and loop back.
uart->IER = 0;
uart->MCR = 0;
uart->MDR = 0;
// config LCR for no parity, one stop bit, 8 data bits, no flow control.
uart->LCR = 0;
SETBIT(uart->LCR, WLS_8);
// take xmtr/rcvr out of reset.
SETBIT(uart->PWREMU_MGMT, UTRST | URRST | FREE);
return (ERR_NO_ERROR);
}
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