#include
#include
#include
#include
#include "dr_lcdseg.h" //调用段式液晶驱动头文件
#define XT2_FREQ 4000000
#define MCLK_FREQ 16000000
#define SMCLK_FREQ 4000000
void initClock()
{
while(BAKCTL & LOCKIO) //解锁XT1引脚操作
BAKCTL &= ~(LOCKIO);
UCSCTL6 &= ~XT1OFF; //启动XT1,选择内部时钟源
P7SEL |= BIT2 + BIT3; //XT2引脚功能选择
UCSCTL6 &= ~XT2OFF; //启动XT2
while (SFRIFG1 & OFIFG) //等待XT1、XT2与DCO稳定
{
UCSCTL7 &= ~(DCOFFG+XT1LFOFFG+XT2OFFG);
SFRIFG1 &= ~OFIFG;
}
//ACLK源选择XT1CLK SMCLK源选择XT2CLK MCLK源选择XT2CLK
UCSCTL4 = SELA__XT1CLK + SELS__XT2CLK + SELM__XT2CLK; //避免DCO调整中跑飞
UCSCTL1 = DCORSEL_5; //6000kHz~23.7MHz
UCSCTL2 = MCLK_FREQ / (XT2_FREQ / 16); //XT2频率较高,分频后作为基准可获得更高的精度 16000000/(4000000/16)=64
//选择循环频率。乘以XT2CLK 参考分频器:f(LFCLK)/ 16
UCSCTL3 = SELREF__XT2CLK + FLLREFDIV__16; //XT2进行16分频后作为基准 0x0050u +0x0005u
while (SFRIFG1 & OFIFG) //等待XT1、XT2与DCO稳定
{
UCSCTL7 &= ~(DCOFFG+XT1LFOFFG+XT2OFFG);
SFRIFG1 &= ~OFIFG;
}
//ACLK源分配器f(ACLK)/ 1 SMCLK源分配器f(SMCLK)/ 1 MCLK源分配器f(MCLK)/ 1
UCSCTL5 = DIVA__1 + DIVS__1 + DIVM__1; //设定几个CLK的分频
//ACLK源选择XT1CLK SMCLK源选择XT2CLK MCLK源选择DCOCLK
UCSCTL4 = SELA__XT1CLK + SELS__XT2CLK + SELM__DCOCLK; //设定几个CLK的时钟源 0x0000u 0x0050u 0x0003u
}