[原创] 【TI首届低功耗设计大赛】MSP430FR5969的ADC疑惑

数码小叶 2014-11-30 21:09 楼主

红色部分没弄明白

MSP430FR5969
//  Vin= 1V-3V -----------------
//    |    |                |
// 10K    |                |
//    |    |                |
//    |    |                |
//    -------| A2=2/3Vin    |
//    |    |                |
//    10K |                |
//    |    |                |
//    -------| A3=1/3Vin    |
//    |    |                |
// 10K    |          P1.0|-->LED
//    |    |                |
// GND
//
// If A2-A3 >= 1V, P1.0 set, else reset. The full, correct handling of
//****************************************************************************
#include
volatile unsigned int result = 0;
int main(void)
{
  WDTCTL = WDTPW | WDTHOLD;                // Stop WDT
  // Configure GPIO
  P1OUT &= ~BIT0;                         // Clear LED to start
  P1DIR |= BIT0;                         // Set P1.0/LED to output
  P1SEL1 |= BIT2 | BIT3;                   // Configure ADC inputs A2 and A3
  P1SEL0 |= BIT2 | BIT3;
  // Disable the GPIO power-on default high-impedance mode to activate
  // previously configured port settings
  PM5CTL0 &= ~LOCKLPM5;
  // Configure ADC12
  ADC12CTL0 = ADC12SHT0_15 | ADC12ON;    // Sampling time, ADC12 on
  ADC12CTL1 = ADC12SHP;                   // Use sampling timer
  ADC12CTL2 |= ADC12RES_2;                // 12-bit conversion results
  ADC12MCTL0 |= ADC12INCH_2 | ADC12DIF;    // Channel2 ADC input select; Vref=AVCC
  ADC12IER0 |= ADC12IE0;                   // Enable ADC conv complete interrupt
  while (1)
  {
__delay_cycles(5000);
ADC12CTL0 |= ADC12ENC | ADC12SC;       // Start sampling/conversion
__bis_SR_register(LPM0_bits + GIE);    // LPM0, ADC12_ISR will force exit
__no_operation();                      // For debugger
  }
}
#if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
#pragma vector = ADC12_VECTOR
__interrupt void ADC12_ISR(void)
#elif defined(__GNUC__)
void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12_ISR (void)
#else
#error Compiler not supported!
#endif
{
  switch(__even_in_range(ADC12IV, ADC12IV_ADC12RDYIFG))
  {
case ADC12IV_NONE:       break;       // Vector  0:  No interrupt
case ADC12IV_ADC12OVIFG:  break;       // Vector  2:  ADC12MEMx Overflow
case ADC12IV_ADC12TOVIFG: break;       // Vector  4:  Conversion time overflow
case ADC12IV_ADC12HIIFG:  break;       // Vector  6:  ADC12BHI
case ADC12IV_ADC12LOIFG:  break;       // Vector  8:  ADC12BLO
case ADC12IV_ADC12INIFG:  break;       // Vector 10:  ADC12BIN
case ADC12IV_ADC12IFG0:                // Vector 12:  ADC12MEM0 Interrupt
      result = ADC12MEM0;                // read out the result register
   if (result >= 0x0AAB)                // ADC12MEM0 = A2-A3 >= 1V?
      P1OUT |= BIT0;                   // P1.0 = 1
   else
      P1OUT &= ~BIT0;                   // P1.0 = 0
   __bic_SR_register_on_exit(LPM0_bits); // Exit active CPU
   break;                               // Clear CPUOFF bit from 0(SR)
case ADC12IV_ADC12IFG1: break;       // Vector 14:  ADC12MEM1

case ADC12IV_ADC12RDYIFG: break;       // Vector 76:  ADC12RDY
default: break;
  }
}