28335之SCI模块1.介绍 TMS320F28335内部有三个SCI模块,SCIA、SCIB、SCIC。
每一个SCI模块都有一个接收器和发送器,SCI的接收器和发送器各有一个16级的FIFO(First In First Out先入先出)队列,它们都还有自己独立的使能位和中断位;可以工作在半双工或全双工模式;
串行通信的三种方式:
2.SCI深入 A. GPIO的管脚对应如下:
SCIA对应GPIO28/29和GPIO35/36两组可选;
SCIB有四组管脚可以选择,分别是 O9/11,GPIO14/15,GPIO18/19,GPIO22/23;
SCIC对应的是GPIO62/63。
在编程初始化时,需要先将对应的GPIO管脚配置为SCI模式,才能使得这些管脚具有SCI功能;
B. SCI通信中带有格式信息的数据字符叫帧,下面是典型的数据帧格式
C. 下面单独介绍一下SCI波特率设置寄存器SCIHBAUD和SCILBAUD,0-15是高字节与低字节连在一起,构成16位波特率设置寄存器BRR。
BRR = SCIHBAUD + SCILBAUD
如果1<= BRR <=65535,那么SCI波特率=LSPCLK / ( (BRR+1) * 8 ),由此,可以带入你需要的波特率,既可以得到BRR的值;
如果BRR = 0,那么SCI波特率=LSPCLK/ 16
D. SCI模块发送和接受数据的原理:
3.SCI串口编程 A.先初始化IO管脚 (以SCI-A为例,SCI-B、SCI-C的初始化方法一样,就是照着改对应的管脚就行)
- void InitSciaGpio() //初始化SCIA的GPIO管脚为例子
- {
- EALLOW;
- //根据硬件设计决定采用GPIO28/29和GPIO35/36中的哪一组。这里以35/36为例
- //定义管脚为上拉
- GpioCtrlRegs.GPBPUD.bit.GPIO36 = 0;
- GpioCtrlRegs.GPBPUD.bit.GPIO35 = 0;
-
- //定义管脚为异步输入
- GpioCtrlRegs.GPBQSEL1.bit.GPIO36 = 3;
-
- //配置管脚为SCI功能管脚
- GpioCtrlRegs.GPBMUX1.bit.GPIO36 = 1;
- GpioCtrlRegs.GPBMUX1.bit.GPIO35 = 1;
-
- EDIS;
- }
B.SCI初始化配置
- void scia_init()
- {
- SciaRegs.SCICCR.all =0x0007; // 1 stop bit, No loopback
- // No parity,8 char bits,
- // async mode, idle-line protocol
-
- SciaRegs.SCICTL1.all =0x0003; // enable TX, RX, internal SCICLK,
- // Disable RX ERR, SLEEP, TXWAKE
-
- SciaRegs.SCICTL2.bit.TXINTENA =1; //发送中断使能
- SciaRegs.SCICTL2.bit.RXBKINTENA =1;//接收中断使能
-
- SciaRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz.
- SciaRegs.SCILBAUD =0x00E7;
-
- SciaRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
- }
C.接着进行中断的配置
- EALLOW; // This is needed to write to EALLOW protected registers
- PieVectTable.SCIRXINTA = &sciaRxIsr;
- PieVectTable.SCITXINTA = &sciaTxIsr;
- PieVectTable.SCIRXINTB = &scibRxIsr;
- PieVectTable.SCITXINTB = &scibTxIsr;
- EDIS; // This is needed to disable write to EALLOW protected registers
D.上面是将SCIA和SCIB的中断服务程序连到PIE的中断表中,发生中断就会跑到你的ISR去了,下面是开中断:
- PieCtrlRegs.PIECTRL.bit.ENPIE = 1; // Enable the PIE block
- PieCtrlRegs.PIEIER9.bit.INTx1=1; // PIE Group 9, int1
- PieCtrlRegs.PIEIER9.bit.INTx2=1; // PIE Group 9, INT2
- PieCtrlRegs.PIEIER9.bit.INTx3=1; // PIE Group 9, INT3
- PieCtrlRegs.PIEIER9.bit.INTx4=1; // PIE Group 9, INT4
- IER = 0x100; // Enable CPU INT
- EINT;
这样串口基本就OK了。
上面的配置是配置典型的串口中断程序;
下面是一个SCI例程:
- /*
- * Serial.c
- *
- * Created on: 2014-12-8
- * Author: SCOTT
- */
-
-
- #include "DSP2833x_Device.h" // DSP2833x Headerfile Include File
- #include "DSP2833x_Examples.h" // CPU_FRQ_100MHZ is in it!
-
- void scib_fifo_init()
- {
- ScibRegs.SCIFFTX.all = 0xe040;
- ScibRegs.SCIFFRX.all = 0x204f;
- ScibRegs.SCIFFCT.all = 0x0;
- }
-
- /*
- void scib_echoback_init()
- {
- ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
- ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
- // Disable RX ERR, SLEEP, TXWAKE
- ScibRegs.SCICTL2.all =0x0003;
- ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
- ScibRegs.SCICTL2.bit.RXBKINTENA =1;
- #if (CPU_FRQ_150MHZ)
- ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
- ScibRegs.SCILBAUD =0x00E7;
- #endif
- #if (CPU_FRQ_100MHZ)
- ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 20MHz.
- ScibRegs.SCILBAUD =0x0044;
- #endif
- ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
- }
-
- */
-
-
- void scib_echoback_init()
- {
- ScibRegs.SCICCR.all = 0x0007; // one stop bit,8 data bit,No parity, No Lookback
- ScibRegs.SCICTL1.all = 0x0003; // enable TX, RX, internal SCICLK,
- // Disable RX ERR, SLEEP, TXWAKE
- ScibRegs.SCICTL2.all =0x0003; // RX TX Interrupt enable
- ScibRegs.SCICTL2.bit.TXINTENA = 1; // TX interrupt enable
- ScibRegs.SCICTL2.bit.RXBKINTENA =1; // RX interrupt enable
- #if (CPU_FRQ_150MHZ)
- ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 37.5MHz. 150/4 = 37.5MHZ
- ScibRegs.SCILBAUD =0x00E7;
- #endif
- #if (CPU_FRQ_100MHZ)
- ScibRegs.SCIHBAUD =0x0001; // 9600 baud @LSPCLK = 20MHz.
- ScibRegs.SCILBAUD =0x0044;
- #endif
- ScibRegs.SCIFFTX.all = 0xC020;
- ScibRegs.SCIFFRX.all = 0x0021; // Receive FIFO generates interrupt when the FIFO status bits (RXFFST4–0) and FIFO level bits
- //(RXFFIL4–0) match (i.e., are greater than or equal to). Default value of these bits after reset //–11111. This will avoid frequent interrupts, after reset, as the receive FIFO will be empty mos // t of the time.
- ScibRegs.SCIFFCT.all = 0x00;
- ScibRegs.SCIFFTX.bit.TXFIFOXRESET=1;
- ScibRegs.SCIFFRX.bit.RXFIFORESET=1;
- ScibRegs.SCICTL1.all =0x0023; // Relinquish SCI from Reset
- }
-
- void scib_xmit(int c)
- {
- //while (ScicRegs.SCIFFTX.bit.TXFFST != 0) {} //==0 -> transmit BUF is empty,can receive new data
- while(ScibRegs.SCICTL2.bit.TXRDY != 1){} //also right,but the way of tool's display is different
- ScibRegs.SCITXBUF = c;
- }
-
- void scib_msg(char *msg)
- {
- int i;
- i = 0;
- while('\0' != msg[i])
- {
- scib_xmit(msg[i]);
- i++;
- }
- }
-
- Uint16 scib_rvc()
- {
- Uint16 data = 0x0000;
- while(ScibRegs.SCIFFRX.bit.RXFFST == 0){}
- data = ScibRegs.SCIRXBUF.all;
-
- while(ScibRegs.SCICTL2.bit.TXRDY != 1){}
- ScibRegs.SCITXBUF = (data & 0xff);
- return data;
- }
-
- /*No More*/