| Digital IC Design/verification Engineer |
| LSI 上海研发中心高薪诚聘存储通讯领域人才，薪水待遇优厚，部分人员有出国培训机会。(部门内部推荐) 有意者请将中英文简历发送至：asic_tapeout@hotmail.com State/Province/County : Shanghai City : Shanghai Requirements/Qualifications (Education) : Job Qualifications: - Communicate effectively within a global business environment (must be proficient in both spoken and written English) - Experience in logic design, synthesis, static timing analysis, and verification - Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification - Experience in developing simulation and verification test benches - Knowledge of Verilog/VHDL design languages - Excellent technical troubleshooting and demonstrated problem solving skills - Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation Education/Certifications: Required Degree: BS Preferred Degree: MS or PhD Preferred Major: Microelectronics, Electrical Engineering or related discipline Job Description : Position Description: A read channel and hard-disk controller SoC digital IC design engineer's duties include working within a highly motivated product development team to create, modify and verify high speed digital integrated circuits. You will support the cross functional team in taking our concepts through to high volume production and assist us in becoming the market leaders in this Mass Storage (hard disk drive) industry. Job Responsibilities: - Working with a Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size estimation. - Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification, formal verification and static timing analysis. - Perform some transistor level high speed digital integrated circuit design various cells and blocks within custom chips for the hard disk drive industry. Examples of cells and blocks include multiplexers, adders, multipliers, dividers, specific functional macro blocks, - Work very closely with physical design engineers from floorplan through final parasitic extraction to ensure smallest area and highest performance possible. |
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