CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications
TEST
CONDITIONS
PARAMETER
HC TYPES
High Level Input
Voltage
V
IH
-
-
2
4.5
6
Low Level Input
Voltage
V
IL
-
-
2
4.5
6
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
I
I
V
CC
or
GND
V
OL
V
IH
or
V
IL
V
OH
V
IH
or
V
IL
-0.02
-0.02
-0.02
-
-4
-5.2
0.02
0.02
0.02
-
4
5.2
-
2
4.5
6
-
4.5
6
2
4.5
6
-
4.5
6
6
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.98
5.48
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.26
0.26
±0.1
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.84
5.34
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.33
0.33
±1
1.5
3.15
4.2
-
-
-
1.9
4.4
5.9
-
3.7
5.2
-
-
-
-
-
-
-
-
-
-
0.5
1.35
1.8
-
-
-
-
-
-
0.1
0.1
0.1
-
0.4
0.4
±1
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
SYMBOL
V
I
(V)
I
O
(mA) V
CC
(V)
MIN
25
o
C
TYP
MAX
-40
o
C TO 85
o
C
MIN
MAX
-55
o
C TO 125
o
C
MIN
MAX
UNITS
HTTP://WWW.HGSEMI.NET
3
2015 AUG
74HC08
DC Electrical Specifications
(Continued)
TEST
CONDITIONS
PARAMETER
Quiescent Device
Current
HCT TYPES
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
NOTE:
2. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
I
I
V
CC
and
GND
V
CC
or
GND
V
CC
- 2.1
V
OL
V
IH
or
V
IL
V
IH
V
IL
V
OH
-
-
V
IH
or
V
IL
-
-
-0.02
4.5 to
5.5
4.5 to
5.5
4.5
2
-
4.4
-
-
-
-
0.8
-
2
-
4.4
-
0.8
-
2
-
4.4
-
0.8
-
V
V
V
SYMBOL
I
CC
V
I
(V)
V
CC
or
GND
I
O
(mA) V
CC
(V)
0
6
MIN
-
25
o
C
TYP
-
MAX
2
-40
o
C TO 85
o
C
MIN
-
MAX
20
-55
o
C TO 125
o
C
MIN
-
MAX
40
UNITS
µA
-4
4.5
3.98
-
-
3.84
-
3.7
-
V
0.02
4.5
-
-
0.1
-
0.1
-
0.1
V
4
4.5
-
-
0.26
-
0.33
-
0.4
V
0
5.5
-
±0.1
-
±1
-
±1
µA
I
CC
∆I
CC
(Note 2)
0
-
5.5
4.5 to
5.5
-
-
-
100
2
360
-
-
20
450
-
-
40
490
µA
µA
Switching Specifications
Input t
r
, t
f
= 6ns
PARAMETER
HC TYPES
Propagation Delay,
Input to Output (Figure 1)
t
PLH
, t
PHL
C
L
= 50pF
2
4.5
6
Propagation Delay, Data Input to
Output Y
t
PLH
, t
PHL
C
L
= 15pF
5
-
-
-
-
-
-
-
7
90
18
15
-
-
-
-
-
115
23
20
-
-
-
-
-
135
27
23
-
ns
ns
ns
ns
SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C
MIN
TYP
MAX
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
MIN
MAX
MIN
MAX
UNITS
HTTP://WWW.HGSEMI.NET
4
2015 AUG
74HC08
Switching Specifications
Input t
r
, t
f
= 6ns
PARAMETER
Transition Times (Figure 1)
SYMBOL
t
TLH
, t
THL
(Continued)
V
CC
(V)
2
4.5
6
Input Capacitance
Power Dissipation Capacitance
(Notes 3, 4)
HCT TYPES
Propagation Delay, Input to
Output Y (Figure 2)
Propagation Delay, Data Input to
Output Y
Transition Times (Figure 2)
Input Capacitance
Power Dissipation Capacitance
(Notes 3, 4)
NOTES:
3. C
PD
is used to determine the dynamic power consumption, per gate.
4. P
D
= V
CC2
f
i
(C
PD
+ C
L
) where f
i
= input frequency, C
L
= output load capacitance, V
CC
= supply voltage.
t
PLH
, t
PHL
t
PLH
, t
PHL
t
TLH
, t
THL
C
I
C
PD
C
L
= 50pF
C
L
= 15pF
C
L
= 50pF
C
L
= 50pF
-
4.5
5
4.5
-
5
-
-
-
-
-
-
10
-
-
51
25
-
15
10
-
-
-
-
-
-
31
-
19
10
-
-
-
-
-
-
38
-
22
10
-
ns
ns
ns
pF
pF
C
I
C
PD
-
-
-
5
25
o
C
MIN
-
-
-
-
-
TYP
-
-
-
-
37
MAX
75
15
13
10
-
-40
o
C TO 85
o
C -55
o
C TO 125
o
C
MIN
-
-
-
-
-
MAX
95
19
16
10
-
MIN
-
-
-
-
-
MAX
110
22
19
10
-
UNITS
ns
ns
ns
pF
pF
TEST
CONDITIONS
C
L
= 50pF
Test Circuits and Waveforms
t
r
= 6ns
INPUT
90%
50%
10%
t
TLH
90%
50%
10%
t
PHL
t
PLH
t
f
= 6ns
V
CC
INPUT
GND
t
THL
t
r
= 6ns
2.7V
1.3V
0.3V
t
TLH
90%
INVERTING
OUTPUT
t
PHL
t
PLH
1.3V
10%
t
f
= 6ns
3V
GND
t
THL
INVERTING
OUTPUT
FIGURE 3. HC AND HCU TRANSITION TIMES AND PROPAGA-