74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
Rev. 4 — 19 April 2013
Product data sheet
1. General description
The 74HC14-Q100; 74HCT14-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7A.
The 74HC14-Q100; 74HCT14-Q100 provides six inverting buffers with Schmitt-trigger
action. They are capable of transforming slowly changing input signals into sharply
defined, jitter-free output signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Low-power dissipation
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
4. Ordering information
Table 1.
Ordering information
Package
Temperature
range
74HC14N-Q100
74HC14D-Q100
74HCT14D-Q100
74HC14PW-Q100
74HCT14PW-Q100
74HC14BQ-Q100
74HCT14BQ-Q100
40 C
to +125
C
40 C
to +125
C
TSSOP14
40 C
to +125
C
40 C
to +125
C
Name
DIP14
SO14
Description
plastic dual in-line package; 14 leads (300 mil)
plastic small outline package; 14 leads; body width
3.9 mm
plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
Version
SOT27-1
SOT108-1
SOT402-1
Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very SOT762-1
thin quad flat package; no leads; 14 terminals;
body 2.5
3
0.85 mm
5. Functional diagram
1
2
3
1
1A
1Y
2
5
4
4
3
2A
2Y
6
5
3A
3Y
6
9
8
9
4A
4Y
8
11
10
11
5A
5Y
10
13
12
13
6A
6Y
12
A
Y
mna025
mna204
001aac497
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
Fig 3.
Logic diagram
(one Schmitt-trigger)
74HC_HCT14_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 19 April 2013
2 of 20
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
6. Pinning information
6.1 Pinning
+&4
+&74
+&4
+&74
$
<
$
<
$
<
*1'
DDD
WHUPLQDO
LQGH[ DUHD
<
9
&&
$
<
$
<
$
<
DDD
© NXP B.V. 2013. All rights reserved.
9
&&
$
<
$
<
$
<
$
<
$
<
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to this
pad using conductive die attach material. There is no
electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to GND.
Fig 4.
Pin configuration DIP14, SO14 and TSSOP14
Fig 5.
Pin configuration DHVQFN14
6.2 Pin description
Table 2.
Symbol
1A to 6A
1Y to 6Y
GND
V
CC
Pin description
Pin
1, 3, 5, 9, 11, 13
2, 4, 6, 8, 10, 12
7
14
Description
data input 1
data output 1
ground (0 V)
supply voltage
7. Functional description
Table 3.
Input
nA
L
H
[1]
H = HIGH voltage level;
L = LOW voltage level.
Function table
[1]
Output
nY
H
L
74HC_HCT14_Q100
All information provided in this document is subject to legal disclaimers.
Product data sheet
Rev. 4 — 19 April 2013
*1'
*1'
$
3 of 20
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP14 package
SO14, TSSOP14 and
DHVQFN14 packages
[1]
[2]
[2]
Conditions
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
Min
0.5
-
-
-
-
50
65
-
-
Max
+7
20
20
25
50
-
+150
750
500
Unit
V
mA
mA
mA
mA
mA
C
mW
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For DIP14 package: P
tot
derates linearly with 12 mW/K above 70
C.
For SO14 package: P
tot
derates linearly with 8 mW/K above 70
C.
For TSSOP14 packages: P
tot
derates linearly with 5.5 mW/K above 60
C.
For DHVQFN14 packages: P
tot
derates linearly with 4.5 mW/K above 60
C.
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
supply voltage
input voltage
output voltage
ambient temperature
Conditions
74HC14-Q100
Min
2.0
0
0
40
Typ
5.0
-
-
+25
Max
6.0
V
CC
V
CC
+125
74HCT14-Q100
Min
4.5
0
0
40
Typ
5.0
-
-
+25
Max
5.5
V
CC
V
CC
+125
V
V
V
C
Unit
74HC_HCT14_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 19 April 2013
4 of 20
NXP Semiconductors
74HC14-Q100; 74HCT14-Q100
Hex inverting Schmitt trigger
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
T
amb
= 25
C
Min
74HC14-Q100
V
OH
HIGH-level
output voltage
V
I
= V
T+
or V
T
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
4.0
mA; V
CC
= 4.5 V
I
O
=
5.2
mA; V
CC
= 6.0 V
V
OL
LOW-level
output voltage
V
I
= V
T+
or V
T
I
O
= 20
A;
V
CC
= 2.0 V
I
O
= 20
A;
V
CC
= 4.5 V
I
O
= 20
A;
V
CC
= 6.0 V
I
O
= 4.0 mA; V
CC
= 4.5 V
I
O
= 5.2 mA; V
CC
= 6.0 V
I
I
I
CC
C
I
input leakage
current
supply current
input
capacitance
HIGH-level
output voltage
V
I
= V
T+
or V
T
; V
CC
= 4.5 V
I
O
=
20 A
I
O
=
4.0
mA
V
OL
LOW-level
output voltage
V
I
= V
T+
or V
T
; V
CC
= 4.5 V
I
O
= 20
A;
I
O
= 4.0 mA;
I
I
I
CC
I
CC
input leakage
current
supply current
additional
supply current
V
I
= V
CC
or GND; V
CC
= 5.5 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
per input pin;
V
I
= V
CC
2.1 V; other pins
at V
CC
or GND; I
O
= 0 A;
V
CC
= 4.5 V to 5.5 V
-
-
-
-
-
0
0.15
-
-
30
0.1
0.26
±0.1
2.0
108
-
-
-
-
-
0.1
0.33
±1.0
20
135
-
-
-
-
-
0.1
0.4
±1.0
40
147
V
V
A
A
A
4.4
3.98
4.5
4.32
-
-
4.4
3.84
-
-
4.4
3.7
-
-
V
V
V
I
= V
CC
or GND; V
CC
= 6.0 V
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 6.0 V
-
-
-
-
-
-
-
-
0
0
0
0.15
0.16
-
-
3.5
0.1
0.1
0.1
0.26
0.26
±0.1
2.0
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.33
0.33
±1.0
20
-
-
-
-
-
-
-
-
-
0.1
0.1
0.1
0.4
0.4
±1.0
40
-
V
V
V
V
V
A
A
pF
1.9
4.4
5.9
3.98
5.48
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
Typ
Max
T
amb
=
40 C
to +85
C
Min
Max
T
amb
=
40 C
to +125
C
Min
Max
Unit
74HCT14-Q100
V
OH
C
I
input
capacitance
-
3.5
-
-
-
-
-
pF
74HC_HCT14_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 4 — 19 April 2013
5 of 20
DSP 与 ARM 处理器
