Whether you’re designing at the board or system level,
Actel’s low-power FPGAs and mixed-signal FPGAs are your
best choice.
The unique, flash-based technology of Actel FPGAs, coupled with their history of reliability, sets them apart
from traditional FPGAs.
Design for today’s rapidly growing markets of consumer and portable medical devices, or tomorrow’s environmentally-
friendly data centers and industrial controls. Take your designs to 30,000 feet or even millions of miles into space. Only
Actel can meet the power, size, cost and reliability targets that reduce time-to-market and enable long-term profitability.
Table of Contents
IGLOO /e
®
• Low Power
• Small Package Footprint
• High Logic Density
4
IGLOO nano
• Low Power
• Small Package Footprint
5
IGLOO PLUS
• Low Power
• Small Package Footprint
• High I/O-to-Logic Ratio
• High Logic Density
• High Performance
• Low Cost
• Small Package Footprint
• High Performance
• Low Cost
•
•
•
•
Low Power
High Logic Density
High Performance
Low Cost
6
ProASIC 3/E
®
7
ProASIC3 nano
8
ProASIC3L
9
SmartFusion
™
Fusion
IGLOO and ProASIC3 I/O Table
FPGA Packages
Design Tools
Development Kits
Programmers
Pigeon Point Systems
• Intelligent Mixed-Signal FPGAs
10
• Mixed-Signal FPGAs
11
•
IGLOO and ProASIC3 I/O Counts
12
• Package Dimensions
14
• Design Environment for Actel Flash Devices
15
• Starter, Evaluation and Demonstration Kits
16
•
FlashPro3 and Silicon Sculptor 3 Programmers
21
• Solutions Partner
22
Please refer to www.actel.com and appropriate product datasheets for the latest device information and valid ordering codes. More information regarding
previous generations of flash and antifuse FPGAs is also available on Actel’s website.
3
IGLOO/e
The ultra-low-power programmable solution
The Actel IGLOO family of reprogrammable, full-featured flash FPGAs is designed to meet the demanding power, area and cost requirements of today’s portable
electronics. Based on Actel’s nonvolatile flash technology, the 1.2 V to 1.5 V operating voltage family offers the industry’s lowest power consumption—as low as
5 µW. The IGLOO family supports up to 3,000,000 system gates with up to 504 Kbits of true dual-port SRAM, up to 6 embedded PLLs and up to 620 user
I/Os. Low-power applications that require 32-bit processing can use the ARM
®
Cortex
™
-M1 processor without license fee or royalties in M1 IGLOO devices.
Developed specifically for implementation in FPGAs, Cortex-M1 offers an optimal balance between performance and size to minimize power consumption.
• Ultra-low-power FPGAs
• Flash*Freeze technology for
lowest power consumption
™
• 1.2 V core and I/O voltage
• 5 µW Flash*Freeze mode
• Reprogrammable
• Live at power-up
• Secure in-system
programming (ISP)
• User nonvolatile FlashROM
IGLOO/e Devices
IGLOO Devices
Cortex-M1 Devices
System Gates
Typical Equivalent
Macrocells
VersaTiles (D-flip-flops)
Flash*Freeze Mode
(typical, µW)
RAM (1,024 bits)
RAM Blocks (4,608 bits)
FlashROM Kbits
(1,024 bits)
Secure (AES) ISP
1
Integrated PLLs with CCC
VersaNet Globals
3
I/O Banks
Maximum User I/Os
(packaged device)
Package Pins
UC
CS
QFN
VQFP
FBGA
IGLOO
2
AGL015
15,000
128
384
5
—
—
1
—
—
6
2
49
AGL030
30,000
256
768
5
—
—
1
—
—
6
2
81
UC81
CS81
QN48
QN68
QN132
VQ100
AGL060
60,000
512
1,536
10
18
4
1
Yes
1
18
2
96
AGL125
125,000
1,024
3,072
16
36
8
1
Yes
1
18
2
133
AGL250
M1AGL250
250,000
2,048
6,144
24
36
8
1
Yes
1
18
4
143
AGL400
400,000
—
9,216
32
54
12
1
Yes
1
18
4
194
AGL600
M1AGL600
600,000
—
13,824
36
108
24
1
Yes
1
18
4
235
AGL1000
M1AGL1000
1,000,000
—
24,576
53
144
32
1
Yes
1
18
4
300
AGLE600
600,000
—
13,824
49
108
24
1
Yes
6
18
8
270
AGLE3000
M1AGLE3000
3,000,000
—
75,264
137
504
112
1
Yes
6
18
8
620
QN68
CS121
QN132
VQ100
FG144
5
CS196
QN132
VQ100
FG144
CS196
4
QN132
4, 5
VQ100
FG144
CS196
CS281
CS281
FG144
FG256
FG484
FG144
FG256
FG484
FG144
FG256
FG484
FG256
FG484
FG484
FG896
Notes:
1. AES is not available for Cortex-M1 IGLOO devices.
2. AGL060 in CS121 does not support the PLL.
3. Six chip (main) and twelve quadrant global networks are available for AGL060 devices and above.
4. The M1AGL250 device does not support this package.
5. Device/package support TBD.
I/Os Per Package
IGLOO Devices AGL015 AGL030 AGL060 AGL125
Cortex-M1
Devices
I/O Type
QN48
QN68
UC81
CS81
CS121
VQ100
QN132
CS196
FG144
FG256
CS281
FG484
FG896
Single-
Ended
I/O
Single-
Ended
I/O
Single-
Ended
I/O
Single-
Ended
I/O
AGL250
M1AGL250
1
Single-
Ended
I/O
Differen-
tial I/O
Pairs
AGL400
AGL600
M1AGL600
AGL1000
M1AGL1000
Single-
Ended
I/O
Differen-
tial I/O
Pairs
AGLE600
AGLE3000
M1AGLE3000
Single- Differen-
Ended
tial I/O
I/O
Pairs
Single-
Ended
I/O
2
Differen-
tial I/O
Pairs
Single-
Ended
I/O
Differen-
tial I/O
Pairs
Single-
Ended
I/O
2
Differen-
tial I/O
Pairs
—
49
—
—
—
—
—
—
—
—
—
—
—
34
49
66
66
—
77
81
—
—
—
—
—
—
—
—
—
—
96
71
80
—
96
3
—
—
—
—
—
71
84
133
97
—
—
—
—
—
—
—
—
—
68
87
3
—
—
—
—
—
13
19
3
—
—
—
—
—
—
—
143
97
178
—
194
—
—
—
—
—
—
—
—
35
25
38
—
38
—
—
—
—
—
—
—
—
—
97
177
215
235
—
—
—
—
—
—
—
—
—
25
43
53
60
—
—
—
—
—
—
—
—
—
97
177
215
300
—
—
—
—
—
—
—
—
—
25
44
53
74
—
—
—
—
—
—
—
—
—
—
165
—
270
—
—
—
—
—
—
—
—
—
—
79
—
135
—
—
—
—
—
—
—
—
—
—
—
—
341
620
—
—
—
—
—
—
—
—
—
—
—
168
310
143
97
—
—
—
—
35
24
—
—
—
—
—
—
—
—
4
Notes:
1. The M1AGL250 device does not support QN132 or CS196 packages.
2. Each used differential pair reduces the number of single-ended I/Os available by two.
3. Device/package support TBD.
IGLOO nano
The industry’s lowest-power, smallest-size solution
Actel’s IGLOO nano products offer groundbreaking possibilities in power, size, lead-times, operating temperature and cost. Available in logic densities from
10,000 to 250,000 gates, the 1.2 V to 1.5 V IGLOO nano devices have been designed for high-volume applications where power and size are key decision
criteria. IGLOO nano devices are perfect ASIC or ASSP replacements, yet retain the historical FPGA advantages of flexibility and quick time-to-market in low-power
and small footprint profiles.
• Ultra-low power in Flash*Freeze
mode, as low as 2 µW
• Variety of small footprint
packages as small as 3x3 mm
• Zero lead-time on selected devices
• Known good die supported
• Enhanced commercial temperature
• Reprogrammable flash technology
• 1.2 V to 1.5 V single
voltage operation
• Enhanced I/O features
• Clock conditioning circuits (CCCs)
and PLLs
• Embedded SRAM and
nonvolatile memory (NVM)
• ISP and security
IGLOO nano Devices
IGLOO nano Devices
System Gates
Typical Equivalent Macrocells
VersaTiles (D-flip-flops)
Flash*Freeze Mode (typical, µW)
RAM (1,024 bits)
RAM Blocks (4,608 bits)
FlashROM Kbits (1,024 bits)
Secure (AES) ISP
Integrated PLLs with CCC
2
VersaNet Globals
I/O Banks
Maximum User I/Os
(packaged device)
Known Good Die User I/Os
Package Pins
UC
CS
QFN
VQFP
AGLN010
10,000
86
260
2
—
—
1
—
—
4
2
34
34
UC36
QN48
QN68
AGLN015
15,000
128
384
4
—
—
1
—
—
4
3
49
—
AGLN020
20,000
172
520
4
—
—
1
—
—
4
3
52
52
UC81
CS81
QN68
AGLN030
1
30,000
256
768
5
—
—
1
—
—
6
2
77
83
UC81
CS81
QN48, QN68
VQ100
AGLN060
60,000
512
1,536
10
18
4
1
Yes
1
18
2
71
71
AGLN125
125,000
1,024
3,072
16
36
8
1
Yes
1
18
2
71
71
AGLN250
250,000
2,048
6,144
24
36
8
1
Yes
1
18
4
68
68
IGLOO
CS81
VQ100
CS81
VQ100
CS81
VQ100
Notes:
1. AGLN030 is available in the Z feature grade only.
2. AGLN060, AGLN125 and AGLN250 in the CS81 package do not support PLLs.
