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AK4649

24bit Stereo CODEC with MIC/SPK-AMP

厂商名称:AKM [Asahi Kasei Microsystems]

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[AK4649VN]
AK4649VN
24bit Stereo CODEC with MIC/SPK-AMP
GENERAL DESCRIPTION
The AK4649VN features a stereo CODEC with a built-in Microphone-Amplifier and Speaker-Amplifier.
Input circuits include a Microphone-Amplifier and an ALC (Automatic Level Control) circuit, and Output
circuits include a Speaker-Amplifier. These circuits are suitable for portable application with
recording/playback function. The AK4649VN is available in 32pin QFN(5x5mm 0.5mm pitch) utilizing less
board space than competitive offerings.
FEATURES
1. Recording Function
Stereo Single-ended input with two Selectors
MIC Amplifier
(+29dB/+26dB/+23dB/+20dB/+16dB/+12dB/+9dB/+6dB/+3dB/0dB)
Digital ALC (Automatic Level Control)
- Setting Range: +36dB
∼ −54dB,
0.375dB Step
- Noise Suppression
ADC Performance: S/(N+D): 80dB, DR, S/N: 89dB (MIC-Amp=+20dB, AVDD=3.3V)
S/(N+D): 80dB, DR, S/N: 100dB (MIC-Amp=0dB, AVDD=3.3V)
Wind-noise Reduction Filter
5 Band Notch Filter
Stereo Separation Emphasis
Digital MIC Interface
2. Playback Function
Digital De-emphasis Filter (tc=50/15μs, fs=32kHz, 44.1kHz, 48kHz)
Digital ALC (Automatic Level Control)
- Setting Range: +36dB
∼ −54dB,
0.375dB Step
- Noise Suppression
Digital Volume Control:
- 0dB
∼ −18dB,
6dB Step & 256 Linear Step (+0dB
- 48.13dB & Mute)
Stereo Separation Emphasis
Stereo Line Output
- S/(N+D): 87dB, S/N: 97dB
Mono Speaker-Amp
- SPK-AMP Performance: S/(N+D): 60dB@150mW, S/N: 98dB
- BTL Output
- Output Power: 400mW@8Ω (SVDD=3.3V)
Analog Mixing: Mono Input
3. Power Management
4. Master Clock:
(1) PLL Mode
Frequencies: 11.2896MHz, 12MHz, 13.5MHz, 24MHz, 27MHz (MCKI pin)
1fs (LRCK pin)
32fs or 64fs (BICK pin)
(2) External Clock Mode
Frequencies: 256fs, 512fs or 1024fs (MCKI pin)
5. Output Master Clock Frequencies: 32fs/64fs/128fs/256fs
PLL Slave Mode (LRCK pin): 7.35kHz
48kHz
PLL Slave Mode (BICK pin): 7.35kHz
48kHz
PLL Slave Mode (MCKI pin):
8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
MS1506-E-00
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2013/01
[AK4649VN]
PLL Master Mode:
8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz
EXT Master/Slave Mode:
7.35kHz
48kHz (256fs), 7.35kHz
26kHz (512fs), 7.35kHz
13kHz (1024fs)
6.
μP
I/F: 3-wire Serial, I
2
C Bus (Ver 1.0, 400kHz Fast-Mode)
7. Master/Slave mode
8. Audio Interface Format: MSB First, 2’s complement
ADC: 24bit MSB justified, 16/24bit I
2
S
DAC: 24bit MSB justified, 16bit LSB justified, 24bit LSB justified, 16/24bit I
2
S
9. Ta =
−40 ∼
85°C
10. Power Supply:
Analog Power Supply (AVDD): 3.0
3.6V
Digital Power Supply (DVDD): 3.0
3.6V
Speaker Power Supply (SVDD): 3.0
3.6V
11. Package : 32pin QFN, 5x5mm, 0.5mm pitch
12. Register Compatible with the AK4646
Block Diagram
AVDD
PMMP
VSS1
VCOM
DVDD
VSS2
MPWR/DMP
MIC Power
Supply
Control
Register
PMADL
I2C
CSN/SDA
CCLK/SCL
CDTIO/CAD0
PMADL or PMADR
Internal
MIC
LIN1/DMDAT
MIC-Amp
Gain: 0/+3/+6/+9/+12/+16
+20/+23/+26/+29dB
RIN1/DMCLK
A/D
HPF1
PMPFIL
SDTI
PDN
LIN2
External
MIC
PMADR
HPF2
LPF
Stereo
Separation
4-band EQ
ALC
1-band EQ
PMBP
BICK
LRCK
SDTI
Audio
I/F
SDTO
RIN2
PMLO
LOUT
Line Out
ROUT
SDTO
MIN
PMDAC
SPP
Speaker
SPN
SVDD
VSS3
PMSPK
D/A
DATT DEM
SMUTE
MCKO
PLL
MCKI
VCOC
PMPLL
Figure 1. Block Diagram
MS1506-E-00
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2013/01
[AK4649VN]
Ordering Guide
AK4649VN
AKD4649
−40 ∼
+85°C
32 pin QFN (0.5mm pitch)
Evaluation board for AK4649VN
Pin Layout
MCKO
SDTO
LRCK
BICK
SDTI
MCKI
18
NC
24
23
22
21
20
VSS3
SVDD
SPP
SPN
LOUT
ROUT
MIN
LIN2
19
17
NC
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
16
15
14
VSS2
DVDD
CSN/SDA
CDTIO/CAD0
CCLK/SCL
PDN
I2C
VCOC
AK4649VN
Top View
13
12
11
10
9
AVDD
RIN2
NC
VSS1
LIN1/DMDAT
Top View
MS1506-E-00
-3-
RIN1/DMCLK
MPWR/DMP
VCOM
2013/01
[AK4649VN]
PIN/FUNCTION
No
1
2
3
4
5
6
7
Pin Name
RIN2
NC
LIN1
DMDAT
RIN1
DMCLK
MPWR
DMP
AVDD
VSS1
VCOM
VCOC
I2C
PDN
CCLK
SCL
I/O
I
-
I
I
I
O
O
O
-
-
O
O
I
I
I
I
8
9
10
11
12
13
Function
Rch Analog Input 2 Pin
No Connection. No internal bonding. This pin must be connected to the ground.
Lch Analog Input Line Input 1Pin
(DMIC bit = “0”)
Digital Microphone Data Input Pin
(DMIC bit = “1”)
Rch Analog Input 1 Pin
(DMIC bit = “0”)
Digital Microphone Clock pin
(DMIC bit = “1”)
MIC Power Supply Pin for Microphone
(MPDMP bit = 0”)
MIC Power Supply pin for Digital Microphone (MPDMP bit = “1”)
Analog Power Supply Pin
This pin must be connected to VSS1 with a 0.1μF ceramic capacitor in series.
Ground 1 Pin
Common Voltage Output Pin
Bias voltage of ADC inputs and DAC outputs.
Output Pin for Loop Filter of PLL Circuit
This pin must be connected to VSS1 with one resistor and capacitor in series.
Control Mode Select Pin “H”: I
2
C Bus, “L”: 3-wire mode
The input circuit of the I2C pin is operated by AVDD.
Power-down & Reset
When “L”, the AK4649VN is in power-down mode and is held in reset.
The AK4649VN must be always reset upon power-up.
Control Data Clock Pin
(I2C pin = “L”)
Control Data Clock Pin
(I2C pin = “H”)
CDTIO
I/O
Control Data Input/Output Pin
(I2C pin = “L”)
CAD0
I
Chip Address Select Pin
(I2C pin = “H”)
CSN
I
Chip Select Pin
(I2C pin = “L”)
14
SDA
I/O
Control Data Input/Output Pin
(I2C pin = “H”)
15 DVDD
-
Digital Power Supply Pin
16 VSS2
-
Ground 2 Pin
17 NC
No Connection. No internal bonding. This pin must be connected to the ground.
18 MCKI
I
External Master Clock Input Pin
19 LRCK
I/O
Input/Output Channel Clock Pin
20 BICK
I/O
Audio Serial Data Clock Pin
21 SDTI
I
Audio Serial Data Input Pin
22 SDTO
O
Audio Serial Data Output Pin
23 MCKO
O
Master Clock Output Pin
24 NC
No Connection. No internal bonding. This pin must be connected to the ground.
25 VSS3
-
Ground 3 Pin
26 SVDD
-
Speaker Amp Power Supply Pin
27
SPP
O
Speaker Amp Positive Output Pin
28
SPN
O
Speaker Amp Negative Output Pin
29
LOUT
O
Lch Analog Output Pin
30
ROUT
O
Rch Analog Output Pin
31 MIN
I
Mono Analog Signal Input Pin
32 LIN2
I
Lch Analog Input 2 pin
Note 1. All input pins except analog input pins (MIN, LIN1, RIN1, LIN1, RIN2) must not allowed to float.
MS1506-E-00
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2013/01
[AK4649VN]
Handling of Unused Pin
The unused I/O pins must be processed appropriately as below.
Classification
Pin Name
MPWR/DMP, VCOC, SPN, SPP, ROUT, LOUT,
Analog
MIN, RIN2, LIN2, LIN1/DMDAT, RIN1/DMCLK
MCKO
Digital
MCKI
Setting
These pins must be open.
These pins must be open.
This pin must be connected to VSS2.
ABSOLUTE MAXIMUM RATINGS
(VSS1=VSS2=VSS3=0V;
Note 2)
Parameter
Symbol
min
max
Unit
Power Supplies: Analog
AVDD
4.6
V
−0.3
Digital
DVDD
4.6
V
−0.3
Speaker-Amp
SVDD
4.6
V
−0.3
Input Current, Any Pin Except Supplies
IIN
-
mA
±10
Analog Input Voltage (Note
4)
VINA
AVDD+0.3
V
−0.3
Digital Input Voltage (Note
5)
VIND
DVDD+0.3
V
−0.3
Ambient Temperature (powered applied)
Ta
85
−40
°C
Storage Temperature
Tstg
150
−65
°C
Maximum Power Dissipation (Note
6)
Pd1
-
390
mW
Note 2. All voltages are with respect to ground.
Note 3. VSS1, VSS2 and VSS3 must be connected to the same analog ground plane.
Note 4. MIN, LIN1, RIN1, LIN2 and RIN2 pins
Note 5. PDN, CSN, CCLK, CDTIO, SDTI, LRCK, BICK and MCKI pins
Note 6. In case that PCB wiring density is 200% over and surface wiring density is 50% over. This power is the
AK4649VN internal dissipation that does not include power dissipation of an externally connected speaker.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
RECOMMENDED OPERATING CONDITIONS
(VSS1=VSS2=VSS3=0V;
Note 2)
Parameter
Symbol
min
typ
max
Unit
Power Supplies
Analog
AVDD
3.0
3.3
3.6
V
(Note
7)
Digital
DVDD
3.0
3.3
3.6
V
SPK-Amp
SVDD
3.0
3.3
3.6
V
Difference
DVDD-AVDD
-
-
+0.6
V
-
-
+0.6
V
AVDD−SVDD
Note 2. All voltages are with respect to ground.
Note 7. The power-up sequence between AVDD, DVDD and SVDD is not critical. The PDN pin must be “L” upon power
up, and should be changed to “H” after all power supplies are supplied to avoid an internal circuit error.
* When DVDD is powered ON and the PDN pin is “L”, AVDD or SVDD can be powered OFF.
However, when AVDD is powered OFF, the power supply current of DVDD at power-down
mode may be increased. When the AK4649VN is changed from power down state to power
ON, the PDN pin must be “H” after all power supplies are ON.
* AKM assumes no responsibility for the usage beyond the conditions in this datasheet.
MS1506-E-00
-5-
2013/01
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