AME, Inc.
AME9002
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inar
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Pre
CCFL Backlight Controller
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General Description
The AME9002 is AME’s next generation direct drive
CCFL controller. Like its cousin, the AME9001, the
AME9002 controller provides a cost efficient means to
drive single or multiple cold cathode fluorescent lamps
(CCFL), driving 3 external MOSFETs that, in turn, drive a
wirewound transformer that is coupled to the CCFL.
However the AME9002 includes extra circuitry that al-
lows for a special one second start up period wherein the
voltage across the CCFL is held at a higher than normal
voltage to allow older tubes (or cold tubes) a period in
which they can “warm up”. During this one second
startup period the driving frequency is adjusted off of reso-
nance so that the tube voltage can be controlled. As
soon as the CCFL “strikes” the special start up period
ends and the circuit operates in its normal mode.
The AME9002 includes features such as soft start, duty
cycle dimming control, dimming control polarity selec-
tion, undervoltage lockout and fault detection. It is de-
signed to work with input voltages from 7V up to 24V.
When disabled the circuit goes into a zero current mode.
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Pin Configuration
24
23
22
21
20
19
18
17
16
15
14
13
AME9002
1
2
3
4
5
6
7
8
9
10
11
12
AME9002
1. VREF
2. CE
3. SSC
4. RDELTA
5. FAULTB
6. RT2
7. VSS
8. OVPH
9. OVPL
10.FCOMP
11.CSDET
12.BATTFB
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
OUTC
OUTAPB
OUTA
VBATT
BRPOL
VDD
CT1
FB
COMP
BRIGHT
SSV
PNP
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System Block Diagram
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Features
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Small package: 24 pins for QSOP/ SOIC/
PDIP packages
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Drives multiple tubes
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Special 1 second start up mode
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Automatically checks for common fault
conditions
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7.0V < Vbatt < 24V
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Low component count
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Low Idd < 3.5mA
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<1uA shutdown mode
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Battery UV lockout
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Brightness polarity select
Controller
External
Components
CCFL Array
AME
9002
LIGHT
+
Resistors
+
Capacitors
N
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Applications
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Notebook computers
l
LCD/TFT displays
1
AME, Inc.
AME9002
y
inar
lim
Pre
CCFL Backlight Controller
n
Pin Description
Pin #
1
Pin Name
VREF
Pin Description
Reference. Compensation point for the 3.4V internal voltage reference. Must have
bypass capacitor connected here to VSS.
Chip enable. When low (<0.4V) the chip is put into a low current (~0uA) shutdown
mode.
Blanking interval ramp. During the first cycle this pin sources 140nA. The first cycle
is used to define the initial start up period, often on the order of one second. During
subsequent cycles SSC sources 140
m
A. This is primarily used to provide a "blanking
interval" at the beginning of every dimming cycle to temporarily disable the fault
protection circuitry. The blanking interval is active when V(SSC) < 3.0 volts. (See
application notes.)
A resistor connected from this pin to VDD determines the amount that the voltage at
FCOMP modulates the switching frequency. The frequency is inversely proportional to
the voltage at FCOMP.
2
CE
3
SSC
4
RDELTA
5
FAULTB
FAULTB pulls low when a fault is detected.
A resistor from this pin to VSS sets the minimum frequency of the VCO. The voltage at
this pin is 1.5V
Negative supply. Connect to system ground.
Over voltage protection input (HIGH). Indirectly senses the voltage at the secondary of
the transformer through a resistor (or capacitor) divider. During the initial start up
period, if OVPH is > 3.3V, FCOMP is driven towards VSS (increasing the frequency)
and SSV is reset to zero (which decreases the duty cycle). After the initial start up
period is completed the circuit will shut down if OVPH is > 3.3V.
Over voltage protection input (LOW). During the initial start up period if OVPL < 2.5
volts then FCOMP is allowed to ramp up (decreasing the oscillator frequency allowing
the circuit to get closer to resonance). If, during the initial start up period, OVPL > 2.5
volts then FCOMP is held at its original value (not allowed to increase so the
oscillator frequency stays constant). This action is designed to hold the voltage
across the CCFL constant while the CCFL "warms up".
Frequency control point. Initially this pin is at VSS which yields a maximum switching
frequency. Depending on the voltage at OVPL and OVPH the pin FCOMP will normally
ramp upwards lowering the switching frequency towards the circuit’s resonant
frequency.
6
7
RT2
VSS
8
OVPH
9
OVPL
10
FCOMP
2
AME, Inc.
AME9002
y
inar
lim
Pre
CCFL Backlight Controller
n
Pin Description
Pin #
Pin Name
Pin Description
Current sense detect. Connect this pin to the CCFL current sense resistor divider.
During the initial startup period this pin senses that the CCFL has struck when
V(CSDET) > 1.25 volts. If, after the initial start up period, this pin is below 1.25V for 4
consecutive clock cycles after SSC > 3V then the circuit will shutdown.
UVLO feedback pin. If this pin is above 1.5V then the OUTA pin is allowed to switch, if
below 1.25V then OUTA is disabled.
Drives one of the external NFETs, opposite phase of OUTAPB.
Drives one of the external NFETs, opposite phase of OUTC.
Drives the high side PFET.
Battery input. This is the positive supply for the OUTA driver.
Brightness polarity control. When this pin is low the CCFL brightness increases as
the voltage at the BRIGHT pin increases. When this pin is high the CCFL brightness
decreases
as the voltage at the BRIGHT pin increases.
Regulated 5V supply input.
Sets the dimming cycle frequency. Usually about 100Hz.
Negative input of the voltage control loop error amplifier.
Output of the voltage control loop error amplifier.
Brightness control input. A DC voltage on this controls the duty cycle of the dimming
cycle. This pin is compared to a 3V ramp at the CT1 pin.
Soft start ramp for the voltage control loop. (20uA source current.) The voltage at SSV
clamps the voltage at COMP to be no greater than SSV thereby limiting the increase of
the switching duty cycle.
Drives the base of an external PNP transistor used for the 5V LDO.
11
CSDET
12
13
14
15
16
BATTFB
OUTC
OUTAPB
OUTA
VBATT
17
BRPOL
18
19
20
21
VDD
CT1
FB
COMP
22
BRIGHT
23
SSV
24
PNP
3
AME, Inc.
AME9002
y
inar
lim
Pre
CCFL Backlight Controller
n
Ordering Information
AME9002 x x x x x
Special Feature
Number of Pins
Package Type
Operating Temperature Range
Pin Configuration
Pin Configuration
Operating
Temperature Range
Package Type
Number of
Pins
Special Feature
A: 1 .
2 .
3 .
4 .
5 .
6 .
7 .
8 .
9 .
10.
11.
12.
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
VREF
CE
SSC
RDELTA
FAULTB
RT2
VSS
OVPH
OVPL
FCOMP
CSDET
BATTFB
OUTC
OUTAPB
OUTA
VBATT
BRPOL
VDD
CT1
FB
COMP
BRIGHT
SSV
PNP
E: -40
O
C to 85
O
C
J: SOIC (300 mil)
P: Plastic DIP
T: QSOP
H: 24
Z: Lead free
4
AME, Inc.
AME9002
y
inar
lim
Pre
CCFL Backlight Controller
n
Ordering Information (contd.)
Part Number
AME9002AETH
Marking
AME9002AETH
xxxxxxxx
yyww
AME9002AEPH
xxxxxxxx
yyww
AME9002AEJH
xxxxxxxx
yyww
Output Voltage
N/A
Package
QSOP-24
Operating Temp. Range
- 40
o
C to + 85oC
AME9002AEPH
N/A
PDIP-24
- 40
o
C to + 85
o
C
AME9002AEJH
N/A
SOIC-24
- 40
o
C to + 85
o
C
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Absolute Maximum Ratings
Parameter
Battery Voltage (VBATT)
ESD Classification
Maximum
25
B
Unit
V
Caution: Stress above the listed absolute maximum rating may cause permanent damage to the device
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Recommended Operating Conditions
Parameter
Battery Voltage (VBATT)
Ambient Temperature Range
Junction Temperature
Rating
7 - 24
- 40 to + 85
- 40 to + 125
Unit
V
o
C
C
o
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Thermal Information
Parameter
Thermal Resistance (QSOP - 24)
Maximum Junction Temperature
Maximum Lead Temperature (10 Sec)
Maximum
325
150
300
Unit
o
C/W
o
C
C
5
o
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