leftmost side of the pin. Grouped jumpers increase in pin
size with each jumper added.
Pin 1
Pins 1−4
Figure 5. Pin Locations for a Single Jumper. Pin 1 is Located at the Leftmost Side
and Increases as it Moves to the Right
Pin 1
Pins 1 and 2
Pins 3 and 4
Pins 5 and 6
Pins 7 and 8
Pins 9 and 10
Figure 6. Pin Locations and Assignments of Grouped Jumpers.
Pin 1 is Located at the Top-Left Corner and Increases in a Zigzag Fashion Shown in the Picture
Jumper/Header Functions & Default Positions
Table 1. JUMPERS AND HEADERS
Jumper/Header No.
P1
Jumper/Header Name
+5V0 Select
Pins
1−2 (Default)
2−3
P3
CLK_SELECT
2−3 (Default)
1−2
P4
I
2
C Debug
1−2 & 3−4 (Default)
Open
P5
PRI_I2C_SCL
1−2 (Default)
2−3
P6
PRI_I2C_SCL
1−2 (Default)
2−3
P7
P8
P9
P10
+1V2S
+1V8S
+HEADB_1V8S
I2C_ID Select
Closed (Default)
Closed (Default)
Closed (Default)
1−2 (Default)
2−3
P12
SEC_I2C_SCL
1−2 (Default)
2−3
P13
SEC_I2C_SDA
1−2 (Default)
2−3
Description
Use +5V Supply Source from External Power Adapter
Use +5V Supply Source from Demo 3 Baseboard
Select On-board 48 MHz Oscillator Clock
Select Clock from Demo 3 Baseboard
Connect to Demo 3 Baseboard I
2
C Interface
For Connection to External I
2
C Debugger Interface
Connect to ICP3 Master SCL
Connect to Host SCL
Connect to ICP3 Master SDA
Connect to Host SDA
Normal Operation
Normal Operation
Normal Operation
ICP3 I
2
C Address Set to 0x78
ICP3 I
2
C Address Set to 0x7A
Connect to ICP3 GPIO6 (2ND_I2C_SCL)
Connect to PRI_I2C_SCL
Connect to ICP3 GPIO6 (2ND_I2C_SDA)
Connect to PRI_I2C_SDA
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3
AP1302CSSL00SMGAH−GEVB
Table 1. JUMPERS AND HEADERS
(continued)
Jumper/Header No.
P14
Jumper/Header Name
+VDDIO_HB0_SENSE
Pins
1−2 (Default)
3−4
5−6
P15
P16
VBLOW
+VDDIO_HEAD Select
Closed (Default)
2−3 (Default)
1−2
P17
+VDDIO_HB1_SENSE
1−2 (Default)
3−4
5−6
P23
SPI Debug
Open (Default)
1−2, 3−4, 5−6, 7−8
P24
SPI_LS_EN
Open (Default)
1−2
SW1
RESET
N/A
Description
Sets Voltage to +1.8 V (Normal Operation)
Sets Voltage to +2.8 V
Sets Voltage to +3.3 V
Normal Operation
When using with the Demo 3 Headboard
When using with the AP21057 Dual Adapter Board
Sets Voltage to +1.8 V (Normal Operation)
Sets Voltage to +2.8 V
Sets Voltage to +3.3 V
SPI Interface Disabled
SPI Interface Enabled
SPI Level-shifter Disabled
SPI Level-shifter Enabled
When Pushed, 240 ms Reset Signal will be Sent to
AP1302
Interfacing to ON Semiconductor Demo 3 Baseboard
The ON Semiconductor Demo 3 baseboard has a similar
52-pin connector which mates with J1 of the headboard.
The four mounting holes secure the baseboard and the
headboard with spacers and screws.
Shorted Jumpers for Power Measurement
Table 2. SHORTED JUMPERS FOR POWER
MEASUREMENT
Jumper
P1, Pin 1 (+5V0_EXT)
P1, Pin 2 (+5V0)
P1, Pin 3 (+5V0_HOST)
TP12 (+1V2)
TP14 (+1V8)
TP15 (+HEAD_1V8)
TP16 (+3V3)
TP17 (+2V8_VAA)
TP19 (+2V8_VDDIO)
Voltage (V)
5.0
5.0
5.0
1.2
1.8
1.8
3.3
2.8
2.8
1.8/2.8/3.3
1.8/2.8/3.3
Different supplies to the evaluation board are provided by
trace shorted jumper, for any voltage and power
measurements. To conduct current for current measurement
on a given power rail, cut the trace between the two pins of
their respective JP, and insert an ammeter prior to powering
up the system. The figure below shows where the trace to cut
is located.
Cut
Here
TP21 (+VDDIO_HB0_LS)
TP23 (+VDDIO_HB1_LS)
Figure 7. Top and Bottom View of Shorted Jumper.
The Bottom View Shows the Trace Location to Cut
for Current Measurement
ON Semiconductor and the
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SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
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