August, 2010, REV1.0
BCT4221
High-Speed & Low-Ron DPDT Analog Switch
General Description
The BCT4221 double-pole double-throw (DPDT)
analog switch multiplexes Hi-speed (480MHz)
USB and audio analog signals. One Channel has
wide bandwidth and low bit-to-bit skew allow it to
pass high-speed differential signals with good
signal integrity. Another channel has ultra Low on
resistance (1.0
Ω)
. Each switch is bidirectional
and offers little or no attenuation of the signals at
the outputs. Industry-leading advantages include
a propagation delay of less than 250ps, resulting
from its low channel resistance and low I/O
capacitance.
interference.
Their
high
channel-to-channel
crosstalk rejection results in minimal noise
Features
♦
VCC Operating Range: 1.65V to 4.2V
♦
Low ON Resistance: 1.0-ohms at 4.2V (Audio
Mode )
♦
Rail-to-Rail Signal Range
♦
ON-Resistance Matching: 0.2
Ω
(Audio Mode)
♦
ON-Resistance Flatness: 0.1Ω (Audio Mode)
♦
High Off Isolation: 57dB at 10MHz
♦
54dB (10MHz) Crosstalk Rejection
♦
Break-Before-Make Switching
♦
-3dB Bandwidth: 700MHz (USB Mode),
♦
Replace for FSA221
♦
Space-Saving, 10-Pin QFN 1.4mmX1.8mm
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3/MP4 Players
Pin Configurations
Logic Diagram
(BCT4221 Top View)
Audio Mode:
USB Mode:
D+/R = R , D-/L = L
D+/R = D+ , D-/L = D-
www.broadchip.com
August, 2010, REV1.0
BCT4221 High-Speed & Low-Ron DPDT Analog Switch
ORDERING INFORMATION
Ordering Code
BCT4221ETB-TR
Package Description
10-pin WQFN 1.4X1.8
Temp Range
–40°C
to +85°C
Top Marking
AOX
Pin Definitions
Pin
9
5
8
10,1
2, 3
7, 6
S1
S2
D+, D-
R, L
D+/R, D-/L
Name
Vcc
Power Supply
Logic Control Input
Logic Control Input
USB data bus input sources.
Audio right and left input sources.
USB and audio common connector ports.
Description
Truth Table
S1
0
0
1
1
S2
0
1
0
1
Audio Mode
OFF
OFF
OFF
ON
USB Mode
ON
ON
ON
OFF
Remarks
USB Communication
USB Communication
USB Communication
Audio On
Typical Application Circuit
www.broadchip.com
August, 2010, REV1.0
BCT4221 High-Speed & Low-Ron DPDT Analog Switch
ABSOLUTE MAXIMUM RATINGS
VCC, S1
，
S2 to GND............... ..................-0.65V to +4.6V
All Other Pins to GND (Note 1)..........-0.65V to (VCC + 0.3V)
Continuous Current (D+/-,R/L, D+/R,D-/L).............. ±400mA
Peak Current (D+/-,R/L, D+/R,D-/L)..
(pulsed at 1ms, 10% duty cycle)..............................±500mA
Continuous Power Dissipation (TA = +70°C)
10-Pin TQFN (derate 15.6mW/°C above +70°C) ......1.25W
Operating Temperature Range ....................-40°C to +85°C
Storage Temperature Range......................-65°C to +150°C
Junction Temperature...............................................+150°C
Lead Temperature (soldering, 10s)...........................+300°C
Note 1: Signals on D+/-,R/L, D+/R,D-/L exceeding VCC or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = 2.7V to 4.2V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25°C.) (Note 2)
PARAMETER
SYMBOL CONDITIONS
POWER SUPPLY
Supply Voltage Range
VCC
Supply Current
ICC
VCC = 3.6V, S_ = 0 or VCC, D+/-,R/L, D+/R,D-/L
= floating
MIN
1.6
TYP
MAX
4.2
UNITS
V
uA
0.02
1
High Speed Mode(USB2.0)
Analog Signal Range
On-Resistance
RON
D+,D-, D+/R,D-/L
-0.6
8.5
2.2
VCC
12
V
Ω
I
D-/L
=8mA, V
D+,
V
D-
= 0 to
VCC (Note 3)
I
D+/R
= 8mA or I
D-/L
=8mA,
V
D+,
V
D-
= 1.2v (Note
3,4)
I
D+/R
= 8mA or I
D-/L
=8mA,
V
D+,
V
D-
= 0.6,1.8v (Note
5)
V
D+/R
,V
D-/L
, V
D+,
V
D-
=
0.6,1.8v,or floating (Note
5)
V
D+/R
,V
D-/L
, V
D+,
V
D-
=
floating (Note 5)
On-Resistance Match
On-Resistance
Flatness
D+,D-,R,L,Off-Leakag
e Current
D+/R,D-/L
On-Leakage Current
∆RON
Ω
RFLAT
1.5
Ω
IOFF
ION
50
50
100
100
nA
nA
Low Ron Mode(Audio):
Analog Signal Range
On-Resistance
On-Resistance Match
On-Resistance
Flatness
D+,D-,R,L,Off-Leakag
e Current
D+/R,D-/L
On-Leakage Current
RON
∆RON
RFLAT
IOFF
ION
R,L, D+/R,D-/L
-0.6
1.0
0.2
VCC
1.5
V
Ω
Ω
Ω
I
D-/L
=8mA, V
R,
V
L,
= 0 to
VCC
I
D+/R
= 8mA or I
D-/L
=8mA,
V
R,
V
L,
= 1.2v (Note 3,4)
I
D+/R
= 8mA or I
D-/L
=8mA,
V
R,
V
L,
= 0.6,1.8v (Note
5)
V
D+/R
,V
D-/L
, V
R,
V
L,
=
0.6,1.8v,or floating (Note
5)
V
D+/R
,V
D-/L
, V
R,
V
L,
=
floating (Note 5)
0.1
50
50
100
100
nA
nA
www.broadchip.com
August, 2010, REV1.0
BCT4221
High-Speed & Low-Ron DPDT Analog Switch
ELECTRICAL CHARACTERISTICS (continued)
(VCC = 2.7V to 4.2V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = 3.3V, TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
V
D+
, V
D-
, , V
R
or V
L
= 1.5V, RL =
50Ω, CL = 35pF, Figure 2
V
D+
, V
D-
, , V
R
or V
L
= 1.5V, RL =
50Ω, CL = 35pF, Figure 2
V
D+
, V
D-
, , V
R
or V
L
= 1.5V, RL =
50Ω, CL = 35pF, Figure 1
RL = 50Ω, D+.D- to D
+/R
, D
-/L
,
Figure 4
RL = 50Ω, R, L to D
+/R
, D
-/L
,
Figure 4
D
+/R
, D
-/L
= 1VRMS, RL = 50Ω, f =
100kHz, CL = 5pF, Figure 4
(Note 7)
D
+/R
, D
-/L
, RL = 50Ω, f = 100kHz,
CL = 5pF, Figure 6
f = 20Hz to 20kHz; V
R
or V
L
D
+/R
,
D
-/L
,= 0.5V
P-P
; RL = 32Ω
f = 1MHz, V
D+
= V
D-
= 1.5V,
Figure 5
f = 1MHz, V
D+/R
= V
D-/L
= 1.5V,
Figure 5
VCC=2.7V to 3.3V,
VCC=2.7V to 3.3V,
VCC=3.3 to 4.2V,
VCC=3.3 to 4.2V,
V
IN_
= 0 or VCC ,
MIN
TYP
MAX
UNITS
DYNAMIC CHARACTERISTICS
Turn-On Time
Turn-Off Time
Break-Before-Make
Time
On-Channel
Bandwidth -3dB
On-Channel
Bandwidth -3dB
Off-Isolation
Crosstalk
Total Harmonic
Distortion Plus Noise
(Audio)
D+,D- Off-Capacitance
D+/R,D-/L
On-Capacitance
DIGITAL INPUTS
Input-Logic High
Input-Logic Low
Input-Logic High
Input-Logic Low
Input Leakage Current
T
ON
T
OFF
T
BBM
BW
BW
VISO
VCT
THD+N
C
D+
(OFF),
C
D-
(OFF)
C
D+/R
(OFF),
C
D-/L
(OFF)
V
IH
V
IL
V
IH
V
IL
I
IN
20
15
2
15
700
40
-66
-86
0.02
5
7
1.5
0.5
1.7
0.8
±1
50
50
ns
ns
ns
MHz
MHz
dB
dB
%
pF
pF
V
V
V
V
uA
Note 2: Devices are 100% tested at TA = +25°C. Limits across the full temperature range are guaranteed by design and correlation.
Note 3: RON and RON matching specifications are guaranteed by design,
Note 4:
∆RON
= RON(MAX) - RON(MIN).
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance, as measured over the
specified analog signal ranges.
Note 6: Guaranteed by design, not production tested.
Note 7: Between any two switches.
www.broadchip.com
August, 2010, REV1.0
BCT4221
High-Speed & Low-Ron DPDT Analog Switch
Figure 1. t
BBM
(Time Break-Before-Make)
Figure 2. t
ON/OFF
Figure 3. Channel ON/OFF Capacitance
www.broadchip.com
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