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CCD231-84-5-E59

CCD Sensor,

器件类别:传感器    传感器/换能器   

厂商名称:e2v technologies

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IMAGE SENSOR,CCD
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CCD231-84 Back-illuminated Scientific CCD Sensor
4096 x 4112 Pixels, Four Outputs
Non-inverted Mode Operation
INTRODUCTION
This device extends e2v’s family of scientific CCD sensors.
The CCD231 has been designed to provide a large image
area for demanding astronomical and scientific imaging
applications. Back-illuminated spectral response combined
with very low readout noise give exceptional sensitivity.
DESCRIPTION
The sensor has an image area having 4096 x 4112 pixels,
split read-out registers at both top and bottom with charge
detection amplifiers at both ends. The pixel size is 15
m
square. The image area has four separately connected
sections to allow full-frame, frame-transfer, split full-frame or
split frame-transfer modes. Depending on the mode, the
read out can be through 1, 2 or 4 of the output circuits. A
gate-controlled drain is also provided adjacent to each of the
registers to allow fast dumping of unwanted data.
The output amplifier is designed to give very low noise at
read-out rates of up to 3 MHz. The low output impedance
simplifies the interface with external electronics and the
optional dummy outputs are provided to facilitate rejection of
common parasitic feed-through.
The device can be supplied in two package types- both
designed for cryogenic use- (a) Silicon Carbide/flex-cable or
(b) Aluminium Nitride/PGA package. The flex-cable package
allows close butting if needed.
Specifications are tested and guaranteed at 173 K (–100C).
The CCD231 devices described here are non-inverted (non-
MPP) types.
(B) Ceramic-PGA
(A) Buttable
SUMMARY PERFORMANCE (Typical)
Number of pixels
Pixel size
Image area
Outputs
Amplifier sensitivity
Readout noise (rms)
Maximum pixel data rate
Charge storage (pixel full well)
Flatness (both packages)
(A) Buttable package
Package size
Package format
Focal plane height, above base
Height tolerance
Connectors
(B) Ceramic-PGA package
Package size
Package format
Focal plane height, above base
Connectors
4096(H) x 4112(V)
15 µm square
61.4 mm x 61.7 mm
4
7 µV/e
5 e
at 1 MHz
2 e
at 50 kHz
3 MHz
350,000 e
<20 µm (peak to valley)
63.0 x 69.0 mm
SiC & 2 flex connectors
15.0 mm
±10 µm
Two 37-way micro-D
63.80 mm x 79.60 mm
Aluminium Nitride PGA
3.6 mm
Pin Grid Array (PGA)
VARIANTS
Standard silicon and deep depletion silicon device types are
available with a range of AR coatings. Graded coatings are
available as custom variants.
Devices with other formats (e.g. 8192 x 3172 pixels) or 3-
side butting can also be provided in the same family to
custom order.
A similar version (CCD230) is also available with an
alternative amplifier with higher charge handling capacity
and higher speed (up to 5 MHz), but with slightly increased
noise. These devices are generally inverted-mode types.
Consult e2v technologies for further information on any of
the above options.
Part References
See last page of data sheet for list of types.
Quoted performance parameters given opposite are “typical”
values. Specification limits are shown later.
Whilst e2v technologies has taken care to ensure the accuracy of the information contained herein it accepts no responsibility for the consequences of any use thereof
and also reserves the right to change the specification of goods without notice. e2v technologies accepts no liability beyond the set out in its standard conditions of sale in
respect of infringement of third party patents arising from the use of tubes or other devices in accordance with information contained herein.
e2v technologies (uk) limited, Waterhouse Lane, Chelmsford, Essex CM1 2QU United Kingdom Holding Company: e2v technologies plc
Telephone: +44 (0)1245 493493 Facsimile: +44 (0)1245 492492
Contact e2v by e-mail:
enquiries@e2v.com
or visit
www.e2v.com
for global sales and operations centres.
© e2v technologies (uk) limited 2015
Template: DF764388A-3
A1A-765136 Version 5, March 2015
119833
PERFORMANCE (At 173 K unless stated)
Electro-Optical Specification (CCD231 Normal Mode, see note 1)
Min
Peak charge storage (image)
Peak charge storage (register/SW):
OG low (mode 1)
OG high (mode 2)
Output node capacity:
OG low (mode 1)
OG high (mode 2)
Output amplifier responsivity:
mode 1
mode 2
Readout noise
Maximum readout frequency
Dark signal:
at 173 K
at 153 K
Charge transfer efficiency:
parallel
serial
Spectral range
Peak quantum efficiency
275,000
-
-
-
-
5.0
-
-
-
-
-
99.9990
99.9990
300
-
Typical
350,000
300,000
350,000
200,000
600,000
7.0
2.5
2
1000
3
0.02
99.9995
99.9995
-
90
-
-
-
-
3
3000
-
2.0
100
100
1060
-
Max
-
-
Units
e
/pixel
e
/pixel
e
/pixel
e
e
V/e
V/e
e
rms
kHz
e
/pixel/hr
e
/pixel/hr
%
%
nm
%
Note
2(a)
2(b)
2(c)
3
4
5
6
7
NOTES
1. Device performance will be within the limits specified by “max” and “min” when operated at the recommended voltages
supplied with the test data and when measured at a register clock frequency in the range 0.1 – 1.0 MHz. Most tests are
performed at a nominal 500 kHz pixel rate. The noise as specified is separately measured in accordance with note 4.
2. (a) Signal level at which resolution begins to degrade. Device is non-inverted (NIMO/non-MPP), for maximum full well.
(b) The summing well capacity limits the charge in the register, and its value varies with mode as shown.
(c) The signal handled by the output node (for linear operation) varies with mode as shown.
3. Under normal operation (mode 1), SW is operated as a summing well or clocked as R3. OG is biased at a low DC level.
Note: in this mode (with lowest read noise) the output cannot handle the full available pixel charge capacity.
Alternatively (mode 2), SW may be operated as an output gate (and not therefore available for summing), biased at a low
DC level, with OG raised to a high voltage (see note 9). This gives more charge-handling capacity (e.g. for higher level pixel
binning). Charge transfer to the output now occurs as R2 goes low. In mode-2, the output noise will also increase by a
factor of three.
4. Measured with correlated double sampling at 50 kHz nominal (mode 1).
5. Depending on the external load capacitance to be driven. The register will transfer charge at higher frequencies, but
performance cannot be guaranteed.
6. Dark signal is typically measured at a device temperature of 173 K. It is a strong function of temperature and the typical
average (background) dark signal at any temperature T (Kelvin) between 150 K and 300 K is given by:
Q
d
/Q
do
= 122T³e
-6400 /T
where Q
do
is the dark current at 293 K.
Note that this is typical performance and some variation may be seen between devices. Dark current is lowest with the
substrate voltage at +9 V, and somewhat higher with substrate at 0 V. However, Vss=0V is now recommended; see note 12
later. At cryogenic temperatures the dark current impact of low Vss is minor.
7. Measured with a
55
Fe X-ray source. The CTE value is quoted for the complete clock cycle (i.e. not per phase).
© e2v technologies (uk) limited 2015
Document subject to disclaimer on page 1
A1A-765136 Version 5, page 2
SP
PECTRAL RESPONSE
The table below gives guarant
e
teed minimum values of the spectral resp
m
e
ponse for seve variants. P
eral
PRNU is also shown.
s
Standard
silicon
Astro
Broadband
Wavelength
(nm)
350
400
500
650
900
Minimum
QE (%)
40
70
80
75
25
Standard
silicon
Astro
Midband
Minimum
QE (%)
20
50
80
80
25
Standard
silicon
Astro
Multi-2
Minimum
QE (%)
30
75
75
80
25
Deep
depletion
silicon
Astro
B
Broadband
Minimum
QE (%)
40
70
75
70
40
Deep
depletion
silicon
Astro
Midband
Minimum
QE (%)
20
50
80
80
40
Deep
depletion
silicon
Astro ER1
A
response
Minimum
QE (%)
20
35
65
80
45
Deep
depletion
silicon
Astro
Multi-2
Minimum
QE (%)
30
75
75
80
50
-
3
-
3
5
Maximum Pixel
M
Response
Non-
Uniformity
PRNU (1
σ)
(%)
See also the figu
ures below. De
evices with an alternate spe
n
ectral response may be available. Consultt e2v technolo
ogies for details.
e
s
015
© e2v technologies (uk) limited 20
Document su
ubject to disclaim on page 1
mer
A1A-765136 Version 5, page 3
COSMETIC SPECIFICATIONS
Maximum allowed defect levels are indicated below.
Guaranteed Specifications
Grade
Column defects - black or white
White spots
Total (black & white) spots
Traps > 200e-
Grades 0 and 1
are the defaults for science use.
Grade 2
may have limited availability.
Grade 5
devices may be available for test purposes. These are fully functional but with an image quality below that of grade 2,
and may not meet all other specifications. Not all parameters may be tested.
0
5
400
800
10
1
10
800
1500
15
2
15
1200
2000
20
Typical Values
0
0
<200
<400
<5
1
<3
<400
<750
<10
2
<6
<600
<1000
<15
DEFINITIONS
White spots
A defect is counted as a white spot if the dark generation rate is
5
e
-
/pixel/s at 173 K.
-
(which is also equivalent to
100
e /hour at 153 K).
The temperature dependence is the same as for the mean dark signal; see note 6 above.
A black spot defect is a pixel with a photo-response less than 50% of the local mean.
A column is counted as a defect if it contains at least 100 white or dark single pixel defects.
A trap causes charge to be temporarily held in a pixel and these are counted as defects if
the quantity of trapped charge is greater than 200 e
-
Defect measurements are excluded from the outer two rows and columns of the sensor.
Black spots
Column defects
Traps
Defect exclusion zone
AMPLIFIER READ NOISE
The theoretical variation of typical read noise with operating frequency is shown below. (If measured using correlated double
sampling with a pre-sampling bandwidth equal to twice the pixel rate in mode 1, temperature range 150 – 230 K).
Estimated Read Noise (BI)
12.0
NES electrons (rms)
10.0
8.0
6.0
4.0
2.0
0.0
1.0E+04
1.0E+05
1.0E+06
1.0E+07
Frequency (Hz)
© e2v technologies (uk) limited 2015
Document subject to disclaimer on page 1
A1A-765136 Version 5, page 4
DEFINITIONS
Back-Thinning
A back-thinned CCD is fabricated on the front surface of
the silicon and is subsequently processed for illumination
from the reverse side. This avoids loss of transmission in
the electrode layer (particularly significant at shorter
wavelengths or with low energy X-rays). This process
requires the silicon to be reduced to a thin layer by a
combination of chemical and mechanical means. The
surface is “passivated” and an anti-reflection coating may
be added.
Dummy Output
Each output has an associated “dummy” circuit on-chip,
which is of identical design to the “real” circuit but receives
no signal charge. The dummy output should have the same
levels of clock feed-through, and can thus be used to
suppress the similar component in the “real” signal output
by means of a differential pre-amplifier. The penalty is that
the noise is increased by a factor of
2.
If not required the
dummy outputs may be powered down.
Dark Signal
This is the output signal of the device with zero illumination.
This typically consists of thermally generated electrons
within the semiconductor material, which are accumulated
during signal integration. Dark signal is a strong function of
temperature as described in note 6.
AR Coating
Anti-reflection coatings are normally applied to the back
illuminated CCD to further improve the quantum efficiency.
Standard coatings optimise the response in the visible,
ultra-violet or infrared regions. For X-ray detection an
uncoated device may be preferable.
Correlated Double Sampling
A technique for reducing the noise associated with the
charge detection process by subtracting a first output
sample taken just after reset from a second sample taken
with charge present.
Readout Noise
Readout noise is the random noise from the CCD output
stage in the absence of signal. This noise introduces a
random fluctuation in the output voltage that is
superimposed on the detected signal.
The method of measurement involves reverse-clocking the
register and determining the standard deviation of the
output fluctuations, and then converting the result to an
equivalent number of electrons using the known amplifier
responsivity.
Charge Transfer Efficiency
The fraction of charge stored in a CCD element that is
transferred to the adjacent element by a single clock cycle.
The charge not transferred remains in the original element,
possibly in trapping states and may possibly be released
into later elements. The value of CTE is not constant but
varies with signal size, temperature and clock frequency.
© e2v technologies (uk) limited 2015
Document subject to disclaimer on page 1
A1A-765136 Version 5, page 5
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