Product Overview
The DW1000 is a fully integrated single chip Ultra Wideband (UWB)
low-power low-cost transceiver IC compliant to IEEE802.15.4-2011. It
can be used in 2-way ranging or TDOA location systems to locate
assets to a precision of 10 cm. It also supports data transfer at rates up
to 6.8 Mbps
Key Features
Key Benefits
Supports precision location and
data transfer concurrently
Asset location to a precision of
10 cm
Extended communications
range up to 290 m @ 110 kbps
10% PER minimises required
infrastructure in RTLS
High multipath fading immunity
Supports high tag densities in
RTLS
Small PCB footprint allows cost-
effective hardware
implementations
Long battery life minimises
system lifetime cost
IEEE802.15.4-2011 UWB
compliant
Supports 6 RF bands from
3.5 GHz to 6.5 GHz
Programmable transmitter
output power
Fully coherent receiver for
maximum range and accuracy
Complies with FCC & ETSI
UWB spectral masks
Supply voltage 2.8 V to 3.6 V
Low power consumption
SLEEP mode current 1 µA
DEEP SLEEP mode current 50
nA
Data rates of 110 kbps, 850
kbps, 6.8 Mbps
Maximum packet length of
1023 bytes for high data
throughput applications
Integrated MAC support
features
Supports 2-way ranging and
TDOA
SPI interface to host processor
6 mm x 6 mm 48-pin QFN
package with 0.4 mm lead pitch
Small number of external
components
DW1000
IEEE802.15.4-2011 UWB Transceiver
Applications
Precision real time location
systems (RTLS) using two-way
ranging or TDOA schemes in a
variety of markets: -
o
Healthcare
o
Consumer
o
Industrial
o
Other
Location aware wireless sensor
networks
ANALOG RECEIVER
POWER MANAGEMENT
PLL / CLOCK GENERATOR
DIGITAL TRANSCEIVER
HOST INTERFACE / SPI
TO HOST
ANALOG TRANSMITTER
STATE CONTROLLER
DW1000
High Level Block Diagram
DW1000 Datasheet
Table of Contents
1
2
IC DESCRIPTION ........................................... 5
PIN CONNECTIONS ....................................... 6
2.1
2.2
3
P
IN
N
UMBERING
.......................................... 6
P
IN
D
ESCRIPTIONS
........................................ 6
5.11
I
NTERRUPTS AND
D
EVICE
S
TATUS
............... 25
5.12
MAC F
EATURES
..................................... 25
5.12.1
Timestamping ............................. 25
5.12.2
FCS Generation and Checking ..... 25
5.12.3
Automatic Frame Filtering .......... 25
5.12.4
Automatic Acknowledge ............. 25
5.12.5
Double Receive Buffer ................. 26
5.13
E
XTERNAL
S
YNCHRONIZATION
................... 26
5.14
C
ALIBRATION AND
S
PECTRAL
T
UNING OF THE
DW1000 26
5.14.1
Introduction ................................ 26
5.14.2
Crystal Oscillator Trim ................. 26
5.14.3
Transmitter Calibration ............... 27
5.14.4
Antenna Delay Calibration .......... 27
6 OPERATIONAL STATES AND POWER
MANAGEMENT .................................................. 28
O
VERVIEW
................................................ 28
O
PERATING
S
TATES AND THEIR EFFECT ON POWER
CONSUMPTION
...................................................... 28
6.3 T
RANSMIT AND
R
ECEIVE POWER PROFILES
....... 29
6.3.1
Typical transmit profile ................... 32
6.3.2
Typical receive profiles.................... 32
7
POWER SUPPLY .......................................... 33
7.1
7.2
7.3
8
P
OWER
S
UPPLY
C
ONNECTIONS
...................... 33
U
SE OF
E
XTERNAL
DC / DC C
ONVERTER
......... 33
P
OWERING DOWN THE
DW1000 .................. 34
6.1
6.2
ELECTRICAL SPECIFICATIONS ...................... 10
3.1 N
OMINAL
O
PERATING
C
ONDITIONS
............... 10
3.2 DC C
HARACTERISTICS
.................................. 10
3.3 R
ECEIVER
AC C
HARACTERISTICS
.................... 10
3.4 R
ECEIVER
S
ENSITIVITY
C
HARACTERISTICS
......... 11
3.5 R
EFERENCE
C
LOCK
AC C
HARACTERISTICS
........ 11
3.5.1
Reference Frequency ...................... 11
3.6 T
RANSMITTER
AC C
HARACTERISTICS
.............. 12
3.7 T
EMPERATURE AND
V
OLTAGE
M
ONITOR
C
HARACTERISTICS
.................................................. 12
3.8 A
BSOLUTE
M
AXIMUM
R
ATINGS
.................... 12
4
5
TYPICAL PERFORMANCE ............................ 13
FUNCTIONAL DESCRIPTION ........................ 17
5.1 P
HYSICAL
L
AYER
M
ODES
.............................. 17
5.1.1
Supported Channels and Bandwidths
17
5.1.2
Supported Bit Rates and Pulse
Repetition Frequencies (PRF) ........................ 17
5.1.3
Frame Format ................................. 17
5.1.4
Symbol Timings .............................. 18
5.1.5
Proprietary Long Frames ................ 18
5.1.6
Turnaround Times .......................... 18
5.1.7
Frame Filter .................................... 18
5.1.8
Frame Check Sequence (FCS) .......... 19
5.2 R
EFERENCE
C
RYSTAL
O
SCILLATOR
.................. 19
5.3 S
YNTHESIZER
............................................. 19
5.4 R
ECEIVER
.................................................. 19
5.4.1
Bandwidth setting .......................... 19
5.4.2
Automatic Gain Control (AGC) ....... 19
5.5 T
RANSMITTER
............................................ 19
5.5.1
Transmit Output Power .................. 19
5.5.2
Transmit Bandwidth Setting ........... 19
5.6 P
OWER
-
UP SEQUENCE
................................. 20
5.6.1
Typical power-up sequence ............ 20
5.6.2
Variation in the power-up sequence
20
5.6.3
External control of RSTn / use of RSTn
by external circuitry ...................................... 21
5.7 V
OLTAGE
/T
EMPERATURE
M
ONITORS
............. 21
5.8 H
OST
C
ONTROLLER
I
NTERFACE
...................... 21
5.8.1
Configuring the SPI Mode ............... 23
5.8.2
SPI Signal Timing ............................ 24
5.9 G
ENERAL
P
URPOSE
I
NPUT
O
UTPUT
(GPIO) .... 24
5.10
M
EMORY
.............................................. 24
5.10.1
Receive and Transmit data buffers
25
5.10.2
Accumulator memory ................. 25
5.10.3
One Time Programmable (OTP)
Calibration Memory ...................................... 25
APPLICATION INFORMATION ...................... 35
8.1 A
PPLICATION
C
IRCUIT
D
IAGRAM
.................... 35
8.2 R
ECOMMENDED
C
OMPONENTS
..................... 35
8.3 A
PPLICATION
C
IRCUIT
L
AYOUT
...................... 36
8.3.1
PCB Stack ........................................ 36
8.3.2
RF Traces......................................... 36
8.3.3
PLL Loop Filter Layout ..................... 37
8.3.4
Decoupling Layout .......................... 37
8.3.5
Layout Guidance ............................. 37
9
PACKAGING & ORDERING INFORMATION .. 38
9.1 P
ACKAGE
D
IMENSIONS
................................ 38
9.2 D
EVICE
P
ACKAGE
M
ARKING
.......................... 39
9.3 T
RAY
I
NFORMATION
.................................... 39
9.4 T
APE
& R
EEL
I
NFORMATION
......................... 40
9.4.1
Important note ............................... 40
9.4.2
Tape Orientation and Dimensions .. 40
9.4.3
Reel Information: 330 mm Reel ...... 40
9.4.4
Reel Information: 180 mm reel ....... 41
9.5 R
EFLOW PROFILE
........................................ 42
9.6 O
RDERING
I
NFORMATION
............................ 42
10
11
12
13
GLOSSARY ............................................... 43
REFERENCES ............................................ 44
DOCUMENT HISTORY .............................. 44
MAJOR CHANGES .................................... 44
Version 2.10
Page 2
© Decawave Ltd 2015
Subject to change without notice
DW1000 Datasheet
14
ABOUT DECAWAVE ................................ 46
List of Figures
F
IGURE
1: IC B
LOCK
D
IAGRAM
...................................... 5
F
IGURE
2: DW1000 P
IN
A
SSIGNMENTS
......................... 6
F
IGURE
3 : RX I
NTERFERER
I
MMUNITY ON
C
HANNEL
2..... 13
F
IGURE
4: TX
OUTPUT
P
OWER OVER
T
EMP
& V
OLTAGE
... 13
F
IGURE
5: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 110
KBPS
D
ATA
R
ATE
16 MH
Z
PRF 2048 P
REAMBLE
S
YMBOLS
...... 13
F
IGURE
6: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 110
KBPS
D
ATA
R
ATE
64 MH
Z
PRF 2048 P
REAMBLE
S
YMBOLS
...... 14
F
IGURE
7: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 850
KBPS
D
ATA
R
ATE
16 MH
Z
PRF 1024 P
REAMBLE
S
YMBOLS
...... 14
F
IGURE
8: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 850
KBPS
D
ATA
R
ATE
64 MH
Z
PRF 1024 P
REAMBLE
S
YMBOLS
...... 14
F
IGURE
9: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 6.81M
BPS
D
ATA
R
ATE
16 MH
Z
PRF 256 P
REAMBLE
S
YMBOLS
15
F
IGURE
10: R
ECEIVER
S
ENSITIVITY
C
HANNEL
5 6.81M
BPS
D
ATA
R
ATE
64 MH
Z
PRF 1256 P
REAMBLE
S
YMBOLS
...................................................................... 15
F
IGURE
11: T
YPICAL PROBABILITY DISTRIBUTION OF
L
INE OF
S
IGHT
2-
WAY RANGING PERFORMANCE
.................. 15
F
IGURE
12: TX S
PECTRUM
C
HANNEL
1 ......................... 16
F
IGURE
13: TX S
PECTRUM
C
HANNEL
2 ......................... 16
F
IGURE
14: TX S
PECTRUM
C
HANNEL
3 ......................... 16
F
IGURE
15: TX S
PECTRUM
C
HANNEL
4 ......................... 16
F
IGURE
16: TX S
PECTRUM
C
HANNEL
5 ......................... 16
F
IGURE
17: TX S
PECTRUM
C
HANNEL
7 ......................... 16
F
IGURE
18: IEEE802.15.4-2011 PPDU S
TRUCTURE
... 18
F
IGURE
19: IEEE802.15.4-2011 MAC F
RAME
F
ORMAT
...................................................................... 18
F
IGURE
20: DW1000 P
OWER
-
UP
S
EQUENCE
................ 20
F
IGURE
21: P
OWER UP EXAMPLE WHERE
VDDLDOD
CANNOT BE GUARANTEED TO BE READY IN TIME FOR THE
RST
N GOING HIGH
............................................. 21
F
IGURE
22: DW1000 SPIPHA=0 T
RANSFER
P
ROTOCOL
22
F
IGURE
23: DW1000SPIPHA=1 T
RANSFER
P
ROTOCOL
. 22
F
IGURE
24: SPI B
YTE
F
ORMATTING
............................. 22
F
IGURE
25: SPI C
ONNECTIONS
.................................... 23
F
IGURE
26: DW1000 SPI T
IMING
D
IAGRAM
............... 24
F
IGURE
27: DW1000 SPI D
ETAILED
T
IMING
D
IAGRAM
.. 24
F
IGURE
28: SYNC
SIGNAL TIMING RELATIVE TO
XTAL1 .... 26
F
IGURE
29: T
YPICAL
D
EVICE
C
RYSTAL
T
RIM
PPM
A
DJUSTMENT
.................................................... 27
F
IGURE
30: S
LEEP OPTIONS BETWEEN OPERATIONS
......... 29
F
IGURE
31: T
YPICAL
R
ANGE VERSUS
TX
AVERAGE CURRENT
(
CHANNEL
2)..................................................... 31
F
IGURE
32: T
YPICAL
TX P
OWER
P
ROFILE
....................... 32
F
IGURE
33: T
YPICAL
RX P
OWER
P
ROFILE
...................... 32
F
IGURE
34: T
YPICAL
RX P
OWER
P
ROFILE USING
SNIFF
MODE
.............................................................. 32
F
IGURE
35: P
OWER
S
UPPLY
C
ONNECTIONS
.................... 33
F
IGURE
36: S
WITCHING
R
EGULATOR
C
ONNECTION
.......... 33
F
IGURE
37: DW1000 A
PPLICATION
C
IRCUIT
................. 35
F
IGURE
38: PCB L
AYER
S
TACK FOR
4-
LAYER BOARD
........ 36
F
IGURE
39: DW1000 RF T
RACES
L
AYOUT
.................... 37
F
IGURE
40: D
EVICE
P
ACKAGE MECHANICAL SPECIFICATIONS
...................................................................... 38
F
IGURE
41: D
EVICE
P
ACKAGE
M
ARKINGS
...................... 39
F
IGURE
42: T
RAY
O
RIENTATION
.................................. 39
F
IGURE
43: T
APE
& R
EEL ORIENTATION
........................ 40
F
IGURE
44: T
APE DIMENSIONS
.................................... 40
F
IGURE
45: 330
MM REEL DIMENSIONS
........................ 41
F
IGURE
46: 180
MM REEL DIMENSIONS
........................ 41
List of Tables
T
ABLE
1: DW1000 P
IN FUNCTIONS
............................... 6
T
ABLE
2: E
XPLANATION OF
A
BBREVIATIONS
..................... 9
T
ABLE
3: DW1000 O
PERATING
C
ONDITIONS
................ 10
T
ABLE
4: DW1000 DC C
HARACTERISTICS
.................... 10
T
ABLE
5: DW1000 R
ECEIVER
AC C
HARACTERISTICS
....... 10
T
ABLE
6: T
YPICAL
R
ECEIVER
S
ENSITIVITY
C
HARACTERISTICS
11
T
ABLE
7: DW1000 R
EFERENCE
C
LOCK
AC C
HARACTERISTICS
...................................................................... 11
T
ABLE
8: DW1000 T
RANSMITTER
AC C
HARACTERISTICS
. 12
T
ABLE
9: DW1000 T
EMPERATURE AND
V
OLTAGE
M
ONITOR
C
HARACTERISTICS
.............................................. 12
T
ABLE
10: DW1000 A
BSOLUTE
M
AXIMUM
R
ATINGS
..... 12
T
ABLE
11: UWB IEEE802.15.4-2011 UWB
CHANNELS
SUPPORTED BY THE
DW1000 .............................. 17
T
ABLE
12: UWB IEEE802.15.4-2011 [1] UWB
BIT RATES
AND
PRF
MODES SUPPORTED BY THE
DW1000 ...... 17
T
ABLE
13: DW1000 S
YMBOL
D
URATIONS
................... 18
T
ABLE
14: T
URN
-
AROUND
T
IMES
................................ 18
T
ABLE
15: DW1000 P
OWER
-
UP
T
IMINGS
.................... 20
T
ABLE
16: E
XTERNAL USE OF
RST
N
.............................. 21
T
ABLE
17: DW1000 SPI M
ODE
C
ONFIGURATION
.......... 23
T
ABLE
18: DW1000 SPI T
IMING
P
ARAMETERS
............. 24
T
ABLE
19: T
RANSMIT
& R
ECEIVE
B
UFFER
M
EMORY
S
IZE
.. 25
T
ABLE
20: A
CCUMULATOR
M
EMORY
S
IZE
..................... 25
T
ABLE
21: OTP
CALIBRATION MEMORY
......................... 25
T
ABLE
22: SYNC
SIGNAL TIMING RELATIVE TO
XTAL ....... 26
T
ABLE
23: O
PERATING
S
TATES
.................................... 28
T
ABLE
24: O
PERATING
S
TATES AND THEIR EFFECT ON POWER
CONSUMPTION
.................................................. 28
T
ABLE
25: O
PERATIONAL
M
ODES
................................ 29
T
ABLE
26: T
YPICAL
TX C
URRENT
C
ONSUMPTION
............ 30
T
ABLE
27: T
YPICAL
RX C
URRENT
C
ONSUMPTION
............ 30
T
ABLE
28: L
OWEST POWER AND LONGEST RANGE MODES OF
OPERATION
....................................................... 31
T
ABLE
29: D
EVICE ORDERING INFORMATION
.................. 42
T
ABLE
30: G
LOSSARY OF
T
ERMS
.................................. 43
T
ABLE
31: D
OCUMENT
H
ISTORY
.................................. 44
© Decawave Ltd 2015
Subject to change without notice
Version 2.10
Page 3
DW1000 Datasheet
DOCUMENT INFORMATION
Disclaimer
Decawave reserves the right to change product specifications without notice. As far as possible changes to
functionality and specifications will be issued in product specific errata sheets or in new versions of this
document. Customers are advised to check with Decawave for the most recent updates on this product.
Copyright © 2015 Decawave Ltd
LIFE SUPPORT POLICY
Decawave products are not authorized for use in safety-critical applications (such as life support) where a failure
of the Decawave product would reasonably be expected to cause severe personal injury or death. Decawave
customers using or selling Decawave products in such a manner do so entirely at their own risk and agree to fully
indemnify Decawave and its representatives against any damages arising out of the use of Decawave products in
such safety-critical applications.
Caution!
ESD sensitive device. Precaution should be used when handling the device in order to
prevent permanent damage.
REGULATORY APPROVALS
The DW1000, as supplied from Decawave, has not been certified for use in any particular geographic region by
the appropriate regulatory body governing radio emissions in that region although it is capable of such
certification depending on the region and the manner in which it is used.
All products developed by the user incorporating the DW1000 must be approved by the relevant authority
governing radio emissions in any given jurisdiction prior to the marketing or sale of such products in that
jurisdiction and user bears all responsibility for obtaining such approval as needed from the appropriate
authorities.
© Decawave Ltd 2015
Subject to change without notice
Version 2.10
Page 4
DW1000 Datasheet
1 IC D
ESCRIPTION
VDDLNA
DIGITAL RX
ADC
Digital Filter
Carrier/
Timing
Recovery
SECDED/
Reed-
Solomon
Decoder
De-
spreader
Viterbi
Decoder
Rx Analog
Baseband
RF_P
RF_N
RF RX
Leading Edge
and Diagnostics
(LDE)
Configuration
Retention
OTP
Host Interface
H/W
MAC
SPI
Timers
SPICLK
SPICSn
SPIMISO
SPIMOSI
IRQ
SYNC
GPIO[0..6]
IF Gain Control
Digital AON
I/F
Pulse Generator
VDDPA1
VDDPA2
Burst
Control
Register
File
To all digital
blocks via PMSC
Convolutional
Encoder
Reed-
Solomon
Encoder
SECDED
Transmit
Control
RF TX
DIGITAL TX
To all
circuits
AON
CAS
Memory
Array
VDDAON
DIGITAL Control
Loop
Circuits
RF PLL / Synth
VDDLDOD
VDDLDOA
On-Chip
Regulators
To all
circuits
Bias
To all
circuits
Loop
Circuits
CLK PLL / Synth
VREF
XTAL2
VCOTUNE
XTAL1
Tx / Rx
Calibration
Power
Management
and State
Control
(PMSC)
13kHz
Osc
Oscillator
Temperature
/ Battery
monitor
WAKEUP
POR
FORCEON
VDDBAT
CLKTUNE
VDDVCO
VDDIF
VDDCLK
VDDSYN
VDDDIG
VDDMS
Figure 1: IC Block Diagram
DW1000 is a fully integrated low-power, single chip
CMOS RF transceiver IC compliant with the
IEEE802.15.4-2011 [1] UWB standard.
DW1000 consists of an analog front end containing
a receiver and a transmitter and a digital back end
that interfaces to an off-chip host processor. A
TX/RX switch is used to connect the receiver or
transmitter to the antenna port. Temperature and
voltage monitors are provided on-chip
The receiver consists of an RF front end which
amplifies the received signal in a low-noise amplifier
before down-converting it directly to baseband. The
receiver is optimized for wide bandwidth, linearity
and noise figure. This allows each of the supported
IEEE802.15.4-2011 [1] UWB channels to be down
converted with minimum additional noise and
distortion. The baseband signal is demodulated
and the resulting received data is made available to
the host controller via SPI.
The transmit pulse train is generated by applying
digitally encoded transmit data to the analog pulse
generator. The pulse train is up-converted by a
double balanced mixer to a carrier generated by the
synthesizer and centered on one of the permitted
IEEE802.15.4-2011 [1] UWB channels. The
modulated RF waveform is amplified before
transmission from the external antenna.
The IC has an on-chip One-Time Programmable
(OTP) memory. This memory can be used to store
calibration data such as TX power level, crystal
© Decawave Ltd 2015
initial frequency error adjustment, and range
accuracy adjustment. These adjustment values can
be automatically retrieved when needed. See
section 5.14 for more details.
The Always-On (AON) memory can be used to
retain DW1000 configuration data during the lowest
power operational states when the on-chip voltage
regulators are disabled. This data is uploaded and
downloaded automatically. Use of DW1000 AON
memory is configurable.
The DW1000 clocking scheme is based around 3
main circuits; Crystal Oscillator, Clock PLL and RF
PLL. The on-chip oscillator is designed to operate
at a frequency of 38.4 MHz using an external
crystal. An external 38.4 MHz clock signal may be
applied in place of the crystal if an appropriately
stable clock is available elsewhere in the user’s
system. This 38.4 MHz clock is used as the
reference clock input to the two on-chip PLLs. The
clock PLL (denoted CLKPLL) generates the clock
required by the digital back end for signal
processing.
The RF PLL generates the down-
conversion local oscillator (LO) for the receive chain
and the up-conversion LO for the transmit chain.
An internal 13 kHz oscillator is provided for use in
the SLEEP state.
The host interface includes a slave-only SPI for
device communications and configuration.
A
number of MAC features are implemented including
CRC generation, CRC checking and receive frame
filtering.
Subject to change without notice
Version 2.10
EXTON
RSTn
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