FEATURES
System
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•
•
•
•
•
Low Power Audio CODEC
DAC
•
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•
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•
ES8388S
High performance and low power multi-
bit delta-sigma audio ADC and DAC
I
2
S/PCM master or slave serial data port
Two pairs of analog input with
differential input option
256/384Fs and USB 12/24 MHz system
clocks
Sophisticated analog input and output
routing, mixing and gain
I
2
C interface
24-bit, 8 to 96 kHz sampling frequency
93 dB signal to noise ratio, -85 dB
THD+N
Headphone driver capless mode
Bass or treble
Stereo enhancement
Pop and click noise suppression
Low Power
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1.8V to 3.3V operation
7 mW playback; 16 mW playback and
record
ADC
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24-bit, 8 to 96 kHz sampling frequency
92 dB signal to noise ratio, -85 dB
THD+N
Auto level control (ALC) and noise gate
APPLICATIONS
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Surveillance
Portable audio
ORDERING INFORMATION
ES8388S -40°C ~ +85°C
QFN-28
1
Everest Semiconductor
Confidential
ES8388S
1.
2.
3.
4.
5.
6.
7.
8.
BLOCK DIAGRAM ................................................................................................................... 4
PIN OUT AND DESCRIPTION ................................................................................................ 5
TYPICAL APPLICATION CIRCUIT.......................................................................................... 6
POWER ON RESET ................................................................................................................ 6
CLOCK MODES AND SAMPLING FREQUENCIES ............................................................... 7
MICRO-CONTROLLER CONFIGURATION INTERFACE ...................................................... 8
DIGITAL AUDIO INTERFACE................................................................................................ 10
ELECTRICAL CHARACTERISTICS ...................................................................................... 11
ABSOLUTE MAXIMUM RATINGS................................................................................................ 11
RECOMMENDED OPERATING CONDITIONS .............................................................................. 11
ADC ANALOG AND FILTER CHARACTERISTICS AND SPECIFICATIONS ........................................ 11
DAC ANALOG AND FILTER CHARACTERISTICS AND SPECIFICATIONS ........................................ 12
POWER CONSUMPTION CHARACTERISTICS .............................................................................. 12
SERIAL AUDIO PORT SWITCHING SPECIFICATIONS ................................................................... 12
I
2
C SWITCHING SPECIFICATIONS ............................................................................................... 13
9.
REGISTER 0 – CHIP CONTROL 1, DEFAULT 0000 0100 ............................................................... 16
CONFIGURATION REGISTER DEFINITION ........................................................................ 15
REGISTER 1 – CHIP CONTROL 2, DEFAULT 0001 1111 ............................................................... 16
REGISTER 2 – CHIP POWER MANAGEMENT, DEFAULT 1100 0011 ........................................... 16
REGISTER 3 – ADC POWER MANAGEMENT, DEFAULT 1010 1100 ............................................ 17
REGISTER 4 – DAC POWER MANAGEMENT, DEFAULT 1100 0000 ............................................ 17
REGISTER 5 – CHIP LOW POWER 1, DEFAULT 0000 0000.......................................................... 17
REGISTER 6 – CHIP LOW POWER 2, DEFAULT 0000 0000.......................................................... 17
REGISTER 7 – ANALOG VOLTAGE MANAGEMENT, DEFAULT 1111 1100 .................................. 17
REGISTER 8 – MASTER MODE CONTROL, DEFAULT 1000 0000................................................. 18
REGISTER 9 – ADC CONTROL 1, DEFAULT 0000 0000 ................................................................ 18
REGISTER 10 – ADC CONTROL 2, DEFAULT 0000 0000 .............................................................. 18
REGISTER 11 – ADC CONTROL 3, DEFAULT 0000 0000 .............................................................. 18
REGISTER 12 – ADC CONTROL 4, DEFAULT 0000 0000 .............................................................. 19
REGISTER 13 – ADC CONTROL 5, DEFAULT 0000 0110 .............................................................. 19
REGISTER 14 – ADC CONTROL 6, DEFAULT 0010 0000 .............................................................. 19
REGISTER 15 – ADC CONTROL 7, DEFAULT 0010 0000 .............................................................. 20
REGISTER 16 – ADC CONTROL 8, DEFAULT 1100 0000 .............................................................. 20
REGISTER 18 – ADC CONTROL 10, DEFAULT 0011 1000 ............................................................ 21
REGISTER 19 – ADC CONTROL 11, DEFAULT 1011 0000 ............................................................ 21
Revision 8.0
2
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
July 2018
Everest Semiconductor
Confidential
ES8388S
REGISTER 20 – ADC CONTROL 12, DEFAULT 0011 0010 ............................................................ 21
REGISTER 21 – ADC CONTROL 13, DEFAULT 0000 0110 ............................................................ 22
REGISTER 22 – ADC CONTROL 14, DEFAULT 0000 0000 ............................................................ 22
REGISTER 23 – DAC CONTROL 1, DEFAULT 0000 0000 .............................................................. 22
REGISTER 24 – DAC CONTROL 2, DEFAULT 0000 0110 .............................................................. 23
REGISTER 25 – DAC CONTROL 3, DEFAULT 0010 0010 .............................................................. 23
REGISTER 26 – DAC CONTROL 4, DEFAULT 1100 0000 .............................................................. 23
REGISTER 27 – DAC CONTROL 5, DEFAULT 1100 0000 .............................................................. 24
REGISTER 28 – DAC CONTROL 6, DEFAULT 0000 1000 .............................................................. 24
REGISTER 29 – DAC CONTROL 7, DEFAULT 0000 0000 .............................................................. 24
REGISTER 30 – DAC CONTROL 8, DEFAULT 0001 1111 .............................................................. 24
REGISTER 31 – DAC CONTROL 9, DEFAULT 1111 0111 .............................................................. 25
REGISTER 32 – DAC CONTROL 10, DEFAULT 1111 1101 ............................................................ 25
REGISTER 33 – DAC CONTROL 11, DEFAULT 1111 1111 ............................................................ 25
REGISTER 34 – DAC CONTROL 12, DEFAULT 0001 1111 ............................................................ 25
REGISTER 35 – DAC CONTROL 13, DEFAULT 1111 0111 ............................................................ 25
REGISTER 36 – DAC CONTROL 14, DEFAULT 1111 1101 ............................................................ 25
REGISTER 37 – DAC CONTROL 15, DEFAULT 1111 1111 ............................................................ 25
REGISTER 38 – DAC CONTROL 16, DEFAULT 0000 0000 ............................................................ 25
REGISTER 39 – DAC CONTROL 17, DEFAULT 0011 1000 ............................................................ 26
REGISTER 42 – DAC CONTROL 20, DEFAULT 0011 1000 ............................................................ 26
REGISTER 43 – DAC CONTROL 21, DEFAULT 0001 0000 ............................................................ 26
REGISTER 44 – DAC CONTROL 22, DEFAULT 0000 0000 ............................................................ 27
REGISTER 45 – DAC CONTROL 23, DEFAULT 0000 0000 ............................................................ 27
REGISTER 48 – DAC CONTROL 26, DEFAULT 0000 0000 ............................................................ 27
REGISTER 49 – DAC CONTROL 27, DEFAULT 0000 0000 ............................................................ 27
REGISTER 53 – TEST MODE, DEFAULT 0000 0000 ..................................................................... 27
REGISTER 56 – ADC TEST CONTROL 2, DEFAULT 0000 0000 ..................................................... 27
10.
11.
PACKAGE .......................................................................................................................... 28
CORPORATE INFORMATION .......................................................................................... 29
Revision 8.0
3
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
July 2018
Everest Semiconductor
Confidential
ES8388S
1. BLOCK DIAGRAM
DSDIN
ASDOUT
SCLK
LRCK
CDATA
CCLK
CE
MCLK
Clock Mgr
IC
2
I S/PCM
2
LIN1
LIN2
PGA
Mixer
HP Driver
LOUT
LIN2
LIN1
RIN1
RIN2
PGA
PGA
Mono
ADC
ADC ALC
DAC PEQ
DAC SE
Stereo
DAC
ROUT
Analog Reference
Power Supply
ADCVREF
DACVREF
VMID
DVDD
PVDD
DGND
AVDD
AGND
HPVDD
HPGND
Revision 8.0
4
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
July 2018
Everest Semiconductor
Confidential
ES8388S
2. PIN OUT AND DESCRIPTION
LIN2
RIN1
LIN1
NC
CE
CDATA
CCLK
22
23
24
25
26
27
28
MCLK
DVDD
PVDD
DGND
SCLK
DSDIN
LRCK
1
2
3
4
5
6
7
ES8388S
21
20
19
18
17
16
15
RIN2
VMID
ADCVREF
AGND
AVDD
HPVDD
NC
14
13
12
11
10
9
8
NC
HPGND
ROUT
LOUT
DACVREF
NC
ASDOUT
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Revision 8.0
MCLK
DVDD
PVDD
DGND
SCLK
DSDIN
LRCK
ASDOUT
NC
DACVREF
LOUT
ROUT
HPGND
NC
NC
HPVDD
AVDD
AGND
ADCVREF
VMID
RIN2
LIN2
RIN1
LIN1
NC
CE
CDATA
CCLK
NAME
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Supply
Supply
Supply
I/O
I
I/O
O
O
O
O
Supply
I/O
Supply
Supply
Supply
O
O
I
I
I
I
I
I/O
I
Master clock
Digital core supply
Digital IO supply
Digital ground
Audio data bit clock
DAC audio data
Audio data left and right clock
ADC audio data
No connect
Decoupling capacitor
Left analog output
Right analog output (same as left)
Ground for headphone output drivers
No connect
No connect
Supply for headphone output drivers
Analog supply
Analog ground
Decoupling capacitor
Decoupling capacitor
Right analog input
Left analog input
Right analog input
Left analog input
No connect
I
2
C device address selection
I
2
C data input or output
I
2
C clock input
July 2018
DESCRIPTION
5
Latest datasheet:
www.everest-semi.com
or
info@everest-semi.com
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