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GD25LQ128DYIGR

128Mbit

器件类别:存储    FLASH存储器   

厂商名称:兆易创新(GigaDevice)

厂商官网:http://www.gigadevice.com

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1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LQ128D
GD25LQ128D
DATASHEET
1
1.8V Uniform Sector
Dual and Quad Serial Flash
GD25LQ128D
Contents
1.
2.
3.
4.
5.
6.
7.
FEATURES
.........................................................................................................................................................4
GENERAL DESCRIPTION
................................................................................................................................5
MEMORY ORGANIZATION
...............................................................................................................................7
DEVICE OPERATION
........................................................................................................................................8
DATA PROTECTION
..........................................................................................................................................9
STATUS REGISTER.........................................................................................................................................
11
COMMANDS DESCRIPTION
.......................................................................................................................... 13
7.1.
7.2.
7.3.
7.4.
7.5.
7.6.
7.7.
7.8.
7.9.
7.10.
7.11.
7.12.
7.13.
7.14.
7.15.
7.16.
7.17.
7.18.
7.19.
7.20.
7.21.
7.22.
7.23.
7.24.
7.25.
7.26.
7.27.
7.28.
7.29.
7.30.
7.31.
7.32.
W
RITE
E
NABLE
(WREN) (06H) ................................................................................................................................ 17
W
RITE
D
ISABLE
(WRDI) (04H) ................................................................................................................................ 18
W
RITE
E
NABLE FOR
V
OLATILE
S
TATUS
R
EGISTER
(50H) ................................................................................................. 19
R
EAD
S
TATUS
R
EGISTER
(RDSR) (05H
OR
35H
OR
15H) .............................................................................................. 20
W
RITE
S
TATUS
R
EGISTER
(WRSR) (01H) ................................................................................................................... 21
R
EAD
D
ATA
B
YTES
(READ) (03H)............................................................................................................................. 22
R
EAD
D
ATA
B
YTES AT
H
IGHER
S
PEED
(F
AST
R
EAD
) (0BH) .............................................................................................. 23
D
UAL
O
UTPUT
F
AST
R
EAD
(3BH) .............................................................................................................................. 24
Q
UAD
O
UTPUT
F
AST
R
EAD
(6BH) ............................................................................................................................. 25
D
UAL
I/O F
AST
R
EAD
(BBH) .................................................................................................................................... 26
Q
UAD
I/O F
AST
R
EAD
(EBH) ................................................................................................................................... 27
Q
UAD
I/O W
ORD
F
AST
R
EAD
(E7H) ......................................................................................................................... 30
S
ET
B
URST WITH
W
RAP
(77H) ................................................................................................................................. 31
P
AGE
P
ROGRAM
(PP) (02H) .................................................................................................................................... 32
Q
UAD
P
AGE
P
ROGRAM
(32H) .................................................................................................................................. 34
S
ECTOR
E
RASE
(SE) (20H) ....................................................................................................................................... 35
32KB B
LOCK
E
RASE
(BE) (52H) ............................................................................................................................... 36
64KB B
LOCK
E
RASE
(BE) (D8H)............................................................................................................................... 37
C
HIP
E
RASE
(CE) (60/C7H) ..................................................................................................................................... 38
D
EEP
P
OWER
-D
OWN
(DP) (B9H) ............................................................................................................................. 39
R
ELEASE FROM
D
EEP
P
OWER
-D
OWN AND
R
EAD
D
EVICE
ID (RDI) (ABH) ......................................................................... 40
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID (REMS) (90H) ................................................................................................... 42
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID D
UAL
I/O (92H) ................................................................................................. 43
R
EAD
M
ANUFACTURE
ID/ D
EVICE
ID Q
UAD
I/O (94H)................................................................................................. 44
R
EAD
I
DENTIFICATION
(RDID) (9FH) ......................................................................................................................... 45
P
ROGRAM
/E
RASE
S
USPEND
(PES) (75H) ................................................................................................................... 46
P
ROGRAM
/E
RASE
R
ESUME
(PER) (7AH) ................................................................................................................... 47
R
EAD
U
NIQUE
ID (4BH) .......................................................................................................................................... 48
E
RASE
S
ECURITY
R
EGISTERS
(44H) ............................................................................................................................ 49
P
ROGRAM
S
ECURITY
R
EGISTERS
(42H) ....................................................................................................................... 50
R
EAD
S
ECURITY
R
EGISTERS
(48H) ............................................................................................................................. 51
S
ET
R
EAD
P
ARAMETERS
(C0H) ................................................................................................................................. 52
2
1.8V Uniform Sector
Dual and Quad Serial Flash
7.33.
7.34.
7.35.
7.36.
7.37.
8.
GD25LQ128D
B
URST
R
EAD WITH
W
RAP
(0CH) ............................................................................................................................... 53
E
NABLE
QPI (38H)................................................................................................................................................. 54
D
ISABLE
QPI (FFH) ................................................................................................................................................ 54
E
NABLE
R
ESET
(66H)
AND
R
ESET
(99H) ..................................................................................................................... 55
R
EAD
S
ERIAL
F
LASH
D
ISCOVERABLE
P
ARAMETER
(5AH) ................................................................................................. 56
ELECTRICAL CHARACTERISTICS
.............................................................................................................. 61
8.1.
8.2.
8.3.
8.4.
8.5.
8.6.
POWER-ON TIMING ........................................................................................................................................... 61
INITIAL DELIVERY STATE ..................................................................................................................................... 61
ABSOLUTE MAXIMUM RATINGS ........................................................................................................................ 61
CAPACITANCE MEASUREMENT CONDITIONS .................................................................................................... 62
DC CHARACTERISTICS......................................................................................................................................... 63
AC CHARACTERISTICS ......................................................................................................................................... 66
9.
ORDERING INFORMATION
............................................................................................................................ 71
9.1.
V
ALID
P
ART
N
UMBERS
............................................................................................................................................ 72
PACKAGE INFORMATION
......................................................................................................................... 74
P
ACKAGE
SOP8 208MIL ........................................................................................................................................ 74
P
ACKAGE
VSOP8 208MIL ...................................................................................................................................... 75
P
ACKAGE
WSON8 (6*5
MM
)................................................................................................................................... 76
P
ACKAGE
WSON8 (8*6
MM
)................................................................................................................................... 77
REVISION HISTORY
.................................................................................................................................... 78
10.
10.1.
10.2.
10.3.
10.4.
11.
3
1.8V Uniform Sector
Dual and Quad Serial Flash
1. FEATURES
GD25LQ128D
128M-bit Serial Flash
-16384K-byte
-256 bytes per programmable page
Fast
Program/Erase Speed
-Page Program time: 0.5ms typical
-Sector Erase time: 70ms typical
-Block Erase time: 0.16/0.3s typical
Standard, Dual, Quad SPI, QPI
-Standard SPI: SCLK, CS#, SI, SO, WP#, HOLD#
-Dual SPI: SCLK, CS#, IO0, IO1, WP#, HOLD#
-Quad SPI: SCLK, CS#, IO0, IO1, IO2, IO3
-QPI: SCLK, CS#, IO0, IO1, IO2, IO3
-Chip Erase time: 50s typical
Flexible Architecture
-Uniform Sector of 4K-byte
-Uniform Block of 32/64K-byte
-Erase/Program Suspend/Resume
High Speed Clock Frequency
-120MHz for fast read with 30PF load
-Dual I/O Data transfer up to 240Mbits/s
-Quad I/O Data transfer up to 480Mbits/s
-QPI Mode Data transfer up to 480Mbits/s
Low
Power Consumption
-35μA typical stand-by current
-1μA typical power down current
Advanced security Features
-128-bit Unique ID for each device
-3x1024-Byte Security Registers With OTP Lock
Software/Hardware
Write Protection
-Write protect all/portion of memory via software
-Enable/Disable protection with WP# Pin
-Top/Bottom Block protection
Single Power Supply Voltage
-
Full
voltage range: 1.65~2.0V
Allows XIP (execute in place) Operation
-Continuous Read With 8/16/32/64-byte Wrap
Data Retention
-20-year data retention typical
Minimum 100,000 Program/Erase Cycles
4
1.8V Uniform Sector
Dual and Quad Serial Flash
2.
GENERAL DESCRIPTION
GD25LQ128D
The GD25LQ128D (128M-bit) Serial flash supports the standard Serial Peripheral Interface (SPI), and supports the
Dual/Quad SPI and QPI mode: Serial Clock, Chip Select, Serial Data I/O0 (SI), I/O1 (SO), I/O2 (WP#), and I/O3 (HOLD#).
The Dual I/O data is transferred with speed of 240Mbits/s and the Quad I/O & Quad output data is transferred with speed
of 480Mbits/s.
CONNECTION DIAGRAM
CS#
SO
(IO0)
WP#
(IO2)
VSS
1
2
Top View
3
4
8
7
6
5
VCC
HOLD#
(IO3)
SCLK
SI
(IO0)
CS#
SO
(IO0)
WP#
(IO2)
1
2
Top View
3
8
7
VCC
HOLD#
(IO3)
6 SCLK
5
8–LEAD WSON
SI
(IO0)
VSS 4
8–LEAD VSOP/SOP
PIN DESCRIPTION
Pin Name
CS#
SO (IO1)
WP# (IO2)
VSS
SI (IO0)
SCLK
HOLD# (IO3)
VCC
Note:
1. CS# must be driven high if chip is not selected. Please don’t leave CS# floating any time after power is on.
2. The NC pin/ball is not connected to any internal signal. It is OK to connect it to the system ground (GND) or leave it
floating.
I/O
I
I/O
I/O
I
I/O
I/O
Description
Chip Select Input
Data Output (Data Input Output 1)
Write Protect Input (Data Input Output 2)
Ground
Data Input (Data Input Output 0)
Serial Clock Input
Hold Input (Data Input Output 3)
Power Supply
5
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