Data Sheet
FEATURES
Passive I/Q mixer
RF and LO range: 2.5 GHz to 8.5 GHz
Wide IF range: dc to 4 GHz
Single-ended RF, LO, and IF
Conversion loss (downconverter): 9 dB (typical)
Image rejection (downconverter): 25 dBc (typical)
SSB noise figure (downconverter): 11.5 dB (typical)
Input IP3 (downconverter): 20 dBm (typical)
Input P1dB compression point (downconverter): 13 dBm
(typical)
Input IP2 (downconverter): 58 dBm (typical)
RF to IF isolation (downconverter): 22 dB (typical)
LO to RF isolation (downconverter): 48 dB (typical)
LO to IF isolation (downconverter): 38 dB (typical)
Amplitude balance (downconverter): ±0.5 dB (typical)
Phase balance (downconverter): ±5° (typical)
RF return loss: 13 dB (typical)
LO return loss 13 dB (typical)
IF return loss: 17 dB (typical)
Exposed pad, 4 mm × 4 mm, 24-terminal, ceramic
LCC package
2.5 GHz to 8.5 GHz, I/Q Mixer
HMC8193
FUNCTIONAL BLOCK DIAGRAM
21
NIC
20
NIC
23
NIC
24
NIC
22
NIC
19
NIC
NIC
1
NIC
2
GND
3
RF
4
GND
5
NIC
6
HMC8193
18
17
16
15
14
13
NIC
NIC
GND
LO
GND
NIC
IF2
11
GND
12
NIC
7
NIC
8
NIC
10
IF1
9
GND
Figure 1.
APPLICATIONS
Test and measurement instrumentation
Military, aerospace, and radar
Direct conversion receivers
GENERAL DESCRIPTION
The HMC8193 is a passive, in phase/quadrature (I/Q), monolithic
microwave integrated circuit (MMIC) mixer that can be used
either as an image rejection mixer for receiver operations, or as
a single-sideband upconverter for transmitter operations from
2.5 GHz to 8.5 GHz. The inherent I/Q architecture of the
HMC8193 offers excellent image rejection and thereby eliminates
the need for expensive filtering of unwanted sidebands. The
mixer also provides excellent local oscillator (LO) to radio
frequency (RF) and LO to intermediate frequency (IF) isolation
and reduces the effect of LO leakage to ensure signal integrity.
Being the HMC8913 is a passive mixer, it does not require any
dc power sources. The device offers a lower noise figure than an
active mixer, ensuring superior dynamic range for high
performance and precision applications.
The HMC8193 is fabricated on a gallium arsenide (GaAs),
metal semiconductor field effect transistor (MESFET) process
and uses Analog Devices, Inc., mixer cells and a 90° hybrid. It is
available in a compact, 4 mm × 4 mm, 24-lead LCC package
and operates over the −40°C to +85°C temperature range. An
evaluation board for this device is also available.
Rev. B
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Trademarks and registered trademarks are the property of their respective owners.
14353-001
PACKAGE
BASE
HMC8193
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Interface Schematics..................................................................... 5
Typical Performance Characteristics ............................................. 6
Downconverter Performance...................................................... 6
Data Sheet
Upconverter Performance ......................................................... 18
Isolation and Return Loss ......................................................... 24
IF Bandwidth .............................................................................. 26
Amplitude and Phase Imbalance ............................................. 27
Spurious and Harmonics Performance ................................... 29
Theory of Operation ...................................................................... 32
Applications Information .............................................................. 33
Soldering Information and Recommended Land Pattern .... 34
Evaluation Board Information.................................................. 35
Outline Dimensions ....................................................................... 36
Ordering Guide .......................................................................... 36
REVISION HISTORY
5/2018—Rev. A to Rev. B
Changes to Applications Information Section............................ 33
1/2018—Rev. 0 to Rev. A
Changes to Features.......................................................................... 1
Changed Single-Sideband (SSB) Noise Figure Parameter from
15 dB Typical to 11.5 dB Typical, Table 1 ...................................... 3
Changes to Ordering Guide .......................................................... 36
8/2017—Revision 0: Initial Version
Rev. B | Page 2 of 36
Data Sheet
SPECIFICATIONS
HMC8193
T
A
= 25°C, IF = 100 MHz, and LO drive = 18 dBm; all measurements performed as downconverter with lower sideband selected, unless
otherwise noted.
Table 1.
Parameter
RADIO FREQUENCY
LOCAL OSCILLATOR
Frequency
Drive Level
INTERMEDIATE FREQUENCY
RF PERFORMANCE AS DOWNCONVERTER
Conversion Loss
Image Rejection
Single-Sideband (SSB) Noise Figure
Input Third-Order Intercept
Input 1 dB Compression Point
Input Second-Order Intercept
Isolation
RF to IF
LO to RF
LO to IF
Amplitude Balance
Phase Balance
RF PERFORMANCE AS UPCONVERTER
Conversion Loss
Sideband Rejection
Input Third-Order Intercept
RETURN LOSS PERFORMANCE
RF
LO
IFx
Symbol
RF
LO
Min
2.5
2.5
18
IF
DC
9
25
11.5
20
13
58
22
48
38
±0.5
±5
8.5
23
21
13
13
17
4
11
Typ
Max
8.5
8.5
Unit
GHz
GHz
dBm
GHz
dB
dBc
dB
dBm
dBm
dBm
dB
dB
dB
dB
Degrees
dB
dBc
dBm
dB
dB
dB
23
IP3
P1dB
IP2
16
13
37
30
IP3
Rev. B | Page 3 of 36
HMC8193
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
RF Input Power
LO Input Power
IF Input Power
IF Source/Sink Current
Continuous Power Dissipation, P
DISS
(T
A
= 85°C, Derate 12.44 mW/°C Above 85°C)
Maximum Junction Temperature
Maximum Peak Reflow Temperature (MSL3)
Operating Temperature Range
Storage Temperature Range
Electrostatic Discharge (ESD) Sensitivity
Human Body Model (HBM)
Field Induced Charged Device Model (FICDM)
Rating
21 dBm
25 dBm
21 dBm
6 mA
1120 mW
175°C
260°C
−40°C to +85°C
−65°C to +150°C
2000 V
1250 V
Data Sheet
THERMAL RESISTANCE
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
Table 3. Thermal Resistance
Package Type
E-24-1
1
1
θ
JA
120
θ
JC
80
Unit
°C/W
Thermal impedance simulated values are based on a JEDEC 2S2P test board
with 4 × 4 thermal vias. See JEDEC JESD51-12 for additional information.
ESD CAUTION
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. B | Page 4 of 36
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
19
NIC
24
NIC
23
NIC
22
NIC
21
NIC
20
NIC
HMC8193
NIC
1
NIC
2
GND
3
RF
4
GND
5
NIC
6
18
NIC
17
NIC
HMC8193
TOP VIEW
(Not to Scale)
16
GND
15
LO
14
GND
13
NIC
NIC
8
NIC
7
IF1
9
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
1, 2, 6 to 8, 10, 13, 17 to 24
3, 5, 12, 14, 16
4
9
Mnemonic
NIC
GND
RF
IF1
Description
Not Internally Connected. No connection is required. These pins can be connected to RF/dc
ground without affecting performance.
Ground Connect. These pins and package bottom must be connected to RF/dc ground. See Figure 3
for the interface schematic.
Radio Frequency. This pin is ac-coupled and matched to 50 Ω. See Figure 5 for the interface
schematic.
First and Quadrature Intermediate Frequency. This pin is dc-coupled. For applications not
requiring operation to dc, dc block this port externally using a series capacitor with a value
selected to pass the necessary IF frequency range. For operation to dc, this pin must not source or
sink more than 6 mA of current; otherwise, the device does not function and may fail. See Figure 4
for the interface schematic.
Second Quadrature Intermediate Frequency. This pin is dc-coupled. For applications not
requiring operation to dc, dc block this port externally using a series capacitor with a value
selected to pass the necessary IF frequency range. For operation to dc, this pin must not source or
sink more than 6 mA of current; otherwise, the device does not function and may fail. See Figure 4 for
the interface schematic.
Local Oscillator. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the interface
schematic.
Exposed Pad. The exposed pad must be connected to RF/dc ground.
11
IF2
15
LO
EPAD
INTERFACE SCHEMATICS
14353-003
14353-002
NOTES
1. NOT INTERNALLY CONNECTED. NO CONNECTION IS
REQUIRED. THESE PINS CAN BE CONNECTED TO
RF/DC GROUND WITHOUT AFFECTING PERFORMANCE.
2. EXPOSED PAD. THE EXPOSED PAD MUST BE
CONNECTED TO RF/DC GROUND.
GND
12
NIC
10
IF2
11
GND
RF
Figure 3. GND Interface Schematic
IF1, IF2
14353-004
Figure 5. RF Interface Schematic
14353-006
LO
Figure 4. IF1, IF2 Interface Schematic
Figure 6. LO Interface Schematic
Rev. B | Page 5 of 36
14353-005
