Data Sheet
FEATURES
High small signal gain: 16.0 dB
High PAE: 55% typical
Instantaneous bandwidth: 0.01 GHz to 2.8 GHz
Supply voltage: V
DD
= 28 V at 100 mA
Internal prematching
Simple and compact external tuning for optimal
performance
32-lead, 5 mm × 5 mm, LFCSP package
>10 W, 0.01 GHz to 2.8 GHz,
GaN Power Amplifier
HMC8500
FUNCTIONAL BLOCK DIAGRAM
32
31
30
29
28
27
26
25
GND
NIC
NIC
NIC
NIC
NIC
NIC
GND
GND
NIC
NIC
RFIN/V
GG
RFIN/V
GG
NIC
NIC
GND
1
2
3
4
5
6
7
8
HMC8500
24
23
22
21
20
19
18
17
GND
NIC
NIC
RFOUT/V
DD
RFOUT/V
DD
NIC
NIC
GND
9
10
11
12
13
14
15
16
APPLICATIONS
Extended battery operation for public mobile radios
Power amplifier stage for wireless infrastructures
Test and measurement equipment
Commercial and military radars
General-purpose transmitter amplification
GENERAL DESCRIPTION
The
HMC8500
is a gallium nitride (GaN), broadband power
amplifier delivering >10 W with up to 55% power added
efficiency (PAE) across an instantaneous bandwidth of 0.01
GHz to 2.8 GHz, and with a ±1.0 dB typical gain flatness.
The
HMC8500
is ideal for pulsed or continuous wave (CW)
applications, such as wireless infrastructure, radars, public
mobile radios, and general-purpose amplification.
The
HMC8500
amplifier is externally tuned using low cost,
surface-mount components and is available in a compact
LFCSP package.
Note that throughout this data sheet, multifunction pins, such
as RFIN/V
GG
, are referred to either by the entire pin name or by
a single function of the pin, for example, RFIN, when only that
function is relevant.
Rev. A
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GND
NIC
NIC
NIC
NIC
NIC
NIC
GND
Figure 1.
14694-001
PACKAGE
BASE
HMC8500
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Specifications ............................................................... 3
Total Supply Current by V
DD
....................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
Data Sheet
ESD Caution...................................................................................5
Pin Configuration and Function Descriptions..............................6
Interface Schematics .....................................................................6
Typical Performance Characteristics ..............................................7
Theory of Operation ...................................................................... 13
Applications Information .............................................................. 14
Evaluation Board ............................................................................ 15
Outline Dimensions ....................................................................... 16
Ordering Guide .......................................................................... 16
REVISION HISTORY
8/2018—Rev. 0 to Rev. A
Changed CG-32-1 to CG-32-2 .................................... Throughout
Changes to Figure 5 .......................................................................... 7
Updated Outline Dimensions ....................................................... 16
Changes to the Ordering Guide.................................................... 16
1/2017—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet
SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
T
A
= 25°C, V
DD
= 28 V, I
DD
= 100 mA, frequency range = 0.01 GHz to 0.8 GHz.
Table 1.
Parameter
FREQUENCY RANGE
GAIN
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
Output
POWER
Output Power at 30 dBm Input Power
Power Added Efficiency
OUTPUT THIRD-ORDER INTERCEPT
NOISE FIGURE
TOTAL SUPPLY CURRENT
Symbol
Min
0.01
18.0
Typ
Max
0.8
Unit
GHz
dB
dB
dB
dB
dBm
%
dBm
dB
mA
Test Conditions/Comments
HMC8500
20.0
±1.5
7
7
P
OUT
PAE
IP3
NF
I
DD
40
55
48
5
100
Measurement taken at P
OUT
/tone = 30 dBm
Adjust the gate bias control voltage (V
GG
) between
−8 V and 0 V to achieve I
DD
= 100 mA typical
T
A
= 25°C, V
DD
= 28 V, I
DD
= 100 mA, frequency range = 0.8 GHz to 1.5 GHz.
Table 2.
Parameter
FREQUENCY RANGE
GAIN
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
Output
POWER
Output Power at 30 dBm Input Power
Power Added Efficiency
OUTPUT THIRD-ORDER INTERCEPT
NOISE FIGURE
TOTAL SUPPLY CURRENT
Symbol
Min
0.8
14.0
Typ
Max
1.5
Unit
GHz
dB
dB
dB
dB
dBm
%
dBm
dB
mA
Test Conditions/Comments
16.0
±1.0
8
8
P
OUT
PAE
IP3
NF
I
DD
40
55
50
4.5
100
Measurement taken at P
OUT
/tone = 30 dBm
Adjust the gate bias control voltage (V
GG
) between
−8 V and 0 V to achieve I
DD
= 100 mA typical
Rev. A | Page 3 of 16
HMC8500
T
A
= 25°C, V
DD
= 28 V, I
DD
= 100 mA, frequency range = 1.5 GHz to 2.8 GHz.
Table 3.
Parameter
FREQUENCY RANGE
GAIN
Small Signal Gain
Gain Flatness
RETURN LOSS
Input
Output
POWER
Output Power at 30 dBm Input Power
Power Added Efficiency
OUTPUT THIRD-ORDER INTERCEPT
NOISE FIGURE
TOTAL SUPPLY CURRENT
Symbol
Min
1.5
12.0
Typ
Max
2.8
Unit
GHz
dB
dB
dB
dB
dBm
%
dBm
dB
mA
Test Conditions/Comments
Data Sheet
15.0
±0.75
10
10
P
OUT
PAE
IP3
NF
I
DD
40
60
47
4.5
100
Measurement taken at P
OUT
/tone = 30 dBm
Adjust the gate bias control voltage (V
GG
) between
−8 V and 0 V to achieve I
DD
= 100 mA typical
TOTAL SUPPLY CURRENT BY V
DD
Table 4.
Parameter
SUPPLY CURRENT
V
DD
= 24 V
V
DD
= 28 V
V
DD
= 32 V
Symbol
I
DD
Min
Typ
Max
Unit
Test Conditions/Comments
Adjust the gate bias control voltage (V
GG
) between −8 V and 0 V to achieve
I
DD
= 100 mA typical
100
100
100
mA
mA
mA
Rev. A | Page 4 of 16
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
1
Drain Bias Voltage (V
DD
)
Gate Bias Voltage (V
GG
)
Radio Frequency (RF) Input Power (RFIN)
Maximum Voltage Standing Wave Ratio
(VSWR)
2
Channel Temperature
Maximum Peak Reflow Temperature (MSL3)
3
Continuous Power Dissipation, P
DISS
(T
A
= 85°C,
Derate 108.6 mW/°C Above 85°C)
Storage Temperature Range
Operating Temperature Range
ESD Sensitivity (Human Body Model)
1
HMC8500
THERMAL RESISTANCE
Rating
35 V dc
−8 V to 0 V dc
33 dBm
6:1
225°C
260°C
12.5 W
−40°C to +125°C
−40°C to +85°C
Class 1B, passed
500 V
Thermal performance is directly linked to printed circuit board
(PCB) design and operating environment. Careful attention to
PCB thermal design is required.
θ
JC
is the junction to case thermal resistance.
Table 6. Thermal Resistance
Package Type
CG-32-2
1
1
θ
JC
9.2
Unit
°C/W
Thermal impedance simulated values are based on a JEDEC 2S2P thermal
test board with 36 thermal vias. See JEDEC JESD51.
ESD CAUTION
When referring to a single function of a multifunction pin in the parameters,
only the portion of the pin name that is relevant to the Absolute Maximum
Rating is listed. For full pin names of multifunction pins, refer to the Pin
Configuration and Function Descriptions section.
2
Restricted by maximum power dissipation.
3
See the Ordering Guide for additional information.
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
Rev. A | Page 5 of 16
