Any frequency between 1 MHz and 110 MHz accurate to 6 decimal places
100% pin-to-pin drop-in replacement to quartz-based XO
Operating temperature from -40°C to 85°C.
Low power consumption of 3.5 mA typical at 1.8V
Standby mode for longer battery life, fast startup time of 5 ms
LVCMOS/HCMOS compatible output
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2,
7.0 x 5.0 mm x mm
F
Applications:
Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books, SSD,
GPON, EPON, etc
Ideal for high-speed serial protocols such as: USB, SATA, SAS,
Firewire, 100M / 1G / 10G Ethernet, etc.
Electrical Specifications
Table 1. Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise stated. Typical values
are at 25°C and nominal supply voltage.
Parameters
Output Frequency Range
Frequency Stability
Symbol
f
F_stab
Min.
1
-20
-25
-50
Operating Temperature Range
T_use
-20
-40
Supply Voltage
Vdd
1.62
2.25
2.52
2.7
2.97
2.25
Current Consumption
Idd
–
–
–
OE Disable Current
Standby Current
I_OD
I_std
–
–
–
–
–
Duty Cycle
Rise/Fall Time
DC
Tr, Tf
45
–
–
–
Output High Voltage
VOH
90%
Typ.
–
–
–
–
–
–
1.8
2.5
2.8
3.0
3.3
–
3.8
3.7
3.5
–
–
2.1
1.1
0.2
–
1
1.3
–
–
Max.
110
+20
+25
+50
+70
+85
1.98
2.75
3.08
3.3
3.63
3.63
4.5
4.2
4.1
4.2
4.0
4.3
2.5
1.3
55
2
2.5
2
–
Unit
MHz
ppm
ppm
ppm
°C
°C
V
V
V
V
V
V
mA
mA
mA
mA
mA
A
A
A
%
ns
ns
ns
Vdd
No load condition, f = 20 MHz, Vdd = 2.8V to 3.3V
No load condition, f = 20 MHz, Vdd = 2.5V
No load condition, f = 20 MHz, Vdd = 1.8V
Vdd = 2.5V to 3.3V, OE = GND, Output in high-Z state
Vdd = 1.8V, OE = GND, Output in high-Z state
ST = GND, Vdd = 2.8V to 3.3V, Output is weakly pulled down
ST = GND, Vdd = 2.5V, Output is weakly pulled down
ST = GND, Vdd = 1.8V, Output is weakly pulled down
All Vdds. See Duty Cycle definition in
Figure 3
and Footnote 8
Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%
Vdd =1.8V, 20% - 80%
Vdd = 2.25V - 3.63V, 20% - 80%
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Inclusive of initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply
voltage and load.
Condition
Frequency Range
Frequency Stability and Aging
Operating Temperature Range
Extended Commercial
Industrial
Supply Voltage and Current Consumption
LVCMOS Output Characteristics
Output Low Voltage
VOL
–
–
10%
Vdd
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YSO8008MR
Table 1. Electrical Characteristics (continued)
Parameters
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
Symbol
VIH
VIL
Z_in
Min.
70%
–
50
2
Startup Time
Enable/Disable Time
Resume Time
RMS Period Jitter
Peak-to-peak Period Jitter
RMS Phase Jitter (random)
T_start
T_oe
T_resume
T_jitt
T_pk
T_phj
–
–
–
–
–
–
–
–
–
Typ.
–
–
87
–
–
–
–
1.8
1.8
12
14
0.5
1.3
Max.
–
30%
150
–
5
130
5
Jitter
3
3
25
30
0.9
2
ps
ps
ps
ps
ps
ps
f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
f = 75 MHz, Vdd = 1.8V
f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
f = 75 MHz, Vdd = 1.8V
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz
Unit
Vdd
Vdd
k
M
ms
ns
ms
Pin 1, OE or ST
Pin 1, OE or ST
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
Measured from the time Vdd reaches its rated minimum value
f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles
Measured from the time ST pin crosses 50% threshold
Condition
Input Characteristics
Startup and Resume Timing
Table 2. Pin Description
Pin
Symbol
Output
Enable
1
OE/ ST/NC
Standby
No Connect
2
3
4
GND
OUT
VDD
Power
Output
Power
Functionality
H
[1]
: specified frequency output
L: output is high impedance. Only output driver is disabled.
H
[1]
: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
Any voltage between 0 and Vdd or Open
[1]
: Specified frequency
output. Pin 1 has no function.
Electrical ground
Oscillator output
Power supply voltage
[2]
OE/ST/NC
1
4
Top View
VDD
GND
2
3
OUT
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven.
If pin 1 needs to be left floating, use the NC option.
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)
[3]
2.0 x 1.6 x 0.75 mm
Recommended Land Pattern (Unit: mm)
[4]
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YSO8008MR
Dimensions and Patterns
Package Size – Dimensions (Unit: mm)
[3]
2.5 x 2.0 x 0.75 mm
2.5 ± 0.05
#4
#3
#3
Recommended Land Pattern (Unit: mm)
[4]
1.00
1.9
2.2
#4
2.0 ± 0.05
0.75 ± 0.05
0.75
1.4
1.1
3.2 x 2.5 x 0.75 mm
3.2 ± 0.05
#4
#3
#3
2.1
#4
2.2
0.7
#1
#2
#2
#1
1.9
YXXXX
0.9
YXC
100.000
2.5 ± 0.05
0.75 ± 0.05
0.9
1.4
5.0 x 3.2 x 0.75 mm
2.54
2.39
#3
#4
5.0 ± 0.05
#4
#3
3.2 ± 0.05
0.75 ± 0.05
1.15
1.5
7.0 x 5.0 x 0.90 mm
7.0 ± 0.05
5.08
5.08
5.0 ± 0.05
YXXXX
1.1
3.81
YXC
100.000
2.6
0.90 ± 0.10
1.4
2.2
Notes:
3. Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device.
4. A capacitor of value 0.1
µF
or higher between Vdd and GND is required.
PART Number Guide
Quartz Crystal Oscillator Dimensions
Frequency
Supply voltage
(Hz)
(V)
O
7050
100M
E
Frequency
Stability
Output
Overall
(ppm)
E
H
Pin
Material
Operating Temp.
Range
I
M
4
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2.0
1.6
#1
#2
#2
#1
1.1
YXXXX
2.2
YXC
100.000
0.8
1.2
1.0
1.2
#1
#2
#2
#1
0.5
YXXXX
1.5
1.9
YXC
100.000
1.1
YSO8008MR
Supply voltage
A
E
1.8V
3.3V
Frequency tolerance
D
E
H
±20PPM
±25PPM
±50PPM
Operating temperature
C
I
-20 to 70
℃
-40 to 85
℃
A
H
Output
CMOS
LVCMOS
Contact us for specify
N
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance of the
IC is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free soldering guidelines)
Junction Temperature
[5]
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Note:
5. Exceeding this temperature for extended period of time may damage the device.
Table 4. Thermal Consideration
[6]
Package
7050
5032
3225
2520
2016
JA, 4 Layer Board
(°C/W)
142
97
109
117
152
JA, 2 Layer Board
(°C/W)
273
199
212
222
252
JC, Bottom
(°C/W)
30
24
27
26
36
Note:
6. Refer to JESD51 for
JA
and
JC
definitions, and reference layout used to determine the
JA
and
JC
values in the above table.
Table 5. Maximum Operating Junction Temperature
[7]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80°C
95°C
Note:
7. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
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YSO8008MR
Test Circuit and Waveform
[8]
Vdd
Vout
Test
Point
tr
80% Vdd
tf
4
Power
Supply
0.1µF
3
15pF
(including probe
and fixture
capacitance)
50%
20% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
1
2
Vdd
OE/ST Function
1k
Figure 2. Test Circuit
Note:
8. Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Waveform
Timing Diagrams
Vdd
90% Vdd
Vdd
50% Vdd
No Glitch
during start up
[9]
Pin 4 Voltage
T_start
ST Voltage
T_resume
CLK Output
HZ
CLK Output
HZ
T_start: Time to start from power-off
T_resume: Time to resume from ST
Figure 4. Startup Timing (OE/ST Mode)
u
Figure 5. Standby Resume Timing (ST Mode Only)
Vdd
50% Vdd
OE Voltage
T_oe
OE Voltage
Vdd
50% Vdd
T_oe
CLK Output
HZ
CLK Output
HZ
T_oe: Time to re-enable the clock output
T_oe: Time to put the output in High Z mode
Figure 6. OE Enable Timing (OE Mode Only)
Note:
9. YSO8008MR has “no runt” pulses and “no glitch” output during startup or resume.