PJ12N03D
25V N-Channel Enhancement Mode MOSFET
TO-252
FEATURES
• R
DS(ON)
, V
GS
@10V,I
DS
@30A=12mΩ
• R
DS(ON)
, V
GS
@4.5V,I
DS
@30A=22mΩ
• Advanced Trench Process Technology
• High Density Cell Design For Ultra Low On-Resistance
• Specially Designed for DC/DC Converters and Motor Drivers
• Fully Characterized Avalanche Voltage and Current
• Pb free product : 99% Sn above can meet RoHS environment
substance directive request
MECHANICALDATA
• Case: TO-252 Molded Plastic
• Terminals : Solderable per MIL-STD-750D,Method 1036.3
• Marking : 12N03D
Drain
Gate
Source
Maximum RATINGS and Thermal Characteristics (T
A
=25
O
C unless otherwise noted )
PA RA M E TE R
D r a i n- S o ur c e Vo l t a g e
G a t e - S o ur c e Vo l t a g e
C o nt i nuo us D r a i n C ur r e nt
P ul s e d D r a i n C ur r e nt
1)
S ym b o l
V
DS
V
GS
I
D
I
D M
T
A
= 2 5
O
C
T
A
= 7 5
O
C
P
D
T
J
, T
S TG
E
AS
R
θ
JC
R
θ
JA
Li mi t
25
+20
30
200
40
23
-5 5 to + 1 5 0
130
3 .2
50
U ni t s
V
V
A
A
W
O
M a xi m um P o w e r D i s s i p a t i o n
O p e r a t i n g J u n c t i o n a n d S t o r a g e Te m p e r a t u r e R a n g e
Avalanche Energy with Single Pulse
ID=23A, VDD=25V, L=0.5mH
Junction-to-Case Thermal Resistance
Junction-to Ambient Thermal Resistance(PCB mounted)
2
C
mJ
O
C /W
C /W
O
Note: 1. Maximum DC current limited by the package
2. Surface mounted on FR4 board, t < 10 sec
PAN JIT RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN,FUNCTIONS AND RELIABILITY WITHOUT NOTICE
STAD-JUN.19.2006
PAGE . 1
PJ12N03D
ELECTRICALCHARACTERISTICS
P a ra me te r
S ta ti c
D r a i n- S o ur c e B r e a k d o w n Vo l t a g e
G a t e Thr e s ho l d Vo l t a g e
D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e
D r a i n- S o ur c e O n- S t a t e R e s i s t a nc e
Ze r o G a t e Vo l t a g e D r a i n C ur r e nt
Gate Body Leakage
Forward Transconductance
D ynami c
V
D S
= 1 5 V , I
D
= 1 5 A , V
G S
= 5 V
To t a l G a t e C h a r g e
Q
g
-
G a t e - S o ur c e C ha r g e
G a t e - D r a i n C ha r g e
Tu r n - O n D e l a y Ti m e
Tu r n - O n R i s e Ti m e
Tu r n - O f f D e l a y Ti m e
Tu r n - O f f F a l l Ti m e
In p u t C a p a c i t a n c e
O ut p ut C a p a c i t a nc e
R e v e r s e Tr a n s f e r C a p a c i t a n c e
S o ur c e - D r a i n D i o d e
M a x. D i o d e F o r w a r d C ur r e nt
D i o d e F o rwa rd Vo lta g e
I
s
V
SD
-
I
S
= 3 0 A , V
G S
= 0 V
-
-
-
0 .9 5
30
1 .2
A
V
Q
gs
Q
gd
T
d ( o n)
t
rr
t
d (o ff)
t
f
C
iss
C
oss
C
rss
V
D S
= 1 5 V , V
GS
= 0 V
f=1 .0 MH
Z
V
DD
=15V , R
L
=15
Ω
I
D
=1A , V
GEN
=10V
R
G
=3.6
Ω
V
D S
= 1 5 V , I
D
= 1 5 A
V
GS
= 1 0 V
-
-
-
-
-
-
-
-
-
2 6 .5
3 .2
4 .5
12.0
10
32
6 .5
1450
260
150
-
nC
-
-
14
12.5
ns
3 7 .5
8
-
-
-
pF
-
1 4 .0
-
B V
DSS
V
G S ( t h)
R
D S ( o n)
R
D S ( o n)
I
D S S
I
G S S
g
fS
V
G S
= 0 V , I
D
= 2 5 0 u A
V
D S
= V
G S
, I
D
= 2 5 0 u A
V
GS
=4.5V, I
D
=30A
V
GS
=10V, I
D
=30A
V
DS
=25V, V
GS
=0V
V
GS
= + 2 0 V , V
D S
= 0 V
V
D S
= 1 0 V , I
D
= 1 5 A
25
1
-
-
-
-
25
-
-
1 7 .0
9.1
-
-
-
-
3
2 2 .0
m
Ω
12.0
1
+100
-
uA
nA
S
V
V
S ym b o l
Te s t C o n d i t i o n
M i n.
Ty p .
M a x.
U ni t s
Switching
Test Circuit
V
IN
V
DD
R
L
V
OUT
Gate Charge
Test Circuit
V
GS
V
DD
R
L
R
G
1mA
R
G
STAD-JUN.19.2006
PAGE . 2
PJ12N03D
Typical Characteristics Curves (T
A
=25
O
C,unless otherwise noted)
I
D
- Drain-to-Source Current (A)
I
D
- Drain Source Current (A)
40
V
GS
=4.0V, 4.5V, 5.0V, 6.0V, 10.0V
40
V
DS
=10V
30
30
3.5V
20
20
3.0V
2.5V
T
J
=25
O
C
10
10
T
J
=125
O
C
T
J
=-55
O
C
2.5
3
3.5
4
4.5
0
0
1
2
3
4
5
0
1.5
2
V
DS
- Drain-to-Source Voltage (V)
V
GS
- Gate-to-Source Voltage (V)
Fig. 1-TYPICAL FORWARD CHARACTERISTIC
FIG.1- Output Characteristic
FIG.2- Transfer Characteristic
70
35
R
DS(ON)
- On-Resistance (m
W
)
R
DS(ON)
- On-Resistance (m
W
)
I
D
=30A
60
50
40
30
20
10
0
30
25
20
15
10
5
0
V
GS
=4.5V
V
GS
=10V
T
J
=125
O
C
T
J
=25
O
C
2
4
6
8
10
0
10
20
30
40
I
D
- Drain Current (A)
V
GS
- Gate-to-Source Voltage (V)
FIG.3- On Resistance vs Drain Current
1.8
1.6
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100 125 150
o
FIG.4- On Resistance vs Gate to Source Voltage
R
DS(ON)
- On-Resistance(Normalized)
C - Capacitance (pF)
V
GS
=10V
I
D
=30A
2000
1750
Ciss
1500
1250
1000
750
500
250
Crss
0
0
5
10
15
Coss
V
GS
=0V
f=1MH
Z
20
25
T
J
- Junction Temperature ( C)
V
DS
- Drain-to-Source Voltage (V)
FIG.5- On Resistance vs Junction Temperature
FIG.6- Capacitance
STAD-JUN.19.2006
PAGE . 3
PJ12N03D
V
GS
- Gate-to-Source Voltage (V)
10
8
6
4
2
0
0
5
10
15
20
25
30
Vgs
Qg
V
DS
=15V
I
D
=15A
Vgs(th)
Qg(th)
Qsw
Qgs
Qgd
Qg
Q
g
- Gate Charge (nC)
Fig.7 - Gate Charge Waveform
V
th
- G-S Threshold Voltage (NORMALIZED)
Fig.8 - Gate Charge
33
32
31
30
29
28
27
-50
I
D
=250uA
BV
DSS
- Breakdown Voltage (V)
1.2
1.1
1
0.9
0.8
0.7
-50
I
D
=250uA
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100
125
150
T
J
- Junction Temperature (
o
C)
T
J
- Junction Temperature (
o
C)
Fig.9 - Threshold Voltage vs Temperature
Fig.10 - Breakdown Voltage vs Junction Temperature
100
I
S
- Source Current (A)
V
GS
=0V
10
T
J
=125
O
C
1
T
J
=-55
O
C
T
J
=25
O
C
0.1
0.2
0.4
0.6
0.8
1
1.2
1.4
V
SD
- Source-to-Drain Voltage (V)
Fig.11 - Source-Drain Diode Forward Voltage
LEGAL STATEMENT
Copyright PanJit International, Inc 2006
The information presented in this document is believed to be accurate and reliable. The specifications and information herein
are subject to change without notice. Pan Jit makes no warranty, representation or guarantee regarding the suitability of its
products for any particular purpose. Pan Jit products are not authorized for use in life support devices or systems. Pan Jit
does not convey any license under its patent rights or rights of others.
STAD-JUN.19.2006
PAGE . 4
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