RTL8305NB-CG
SINGLE-CHIP 5-PORT 10/100M ETHERNET
SWITCH CONTROLLER
DATASHEET
(CONFIDENTIAL: Development Partners Only)
Rev. 1.0
16 October 2012
Track ID: JATR-3375-16
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211. Fax: +886-3-577-6047
www.realtek.com
RTL8305NB
Datasheet
COPYRIGHT
©2012 Realtek Semiconductor Corp. All rights reserved. No part of this document may be reproduced,
transmitted, transcribed, stored in a retrieval system, or translated into any language in any form or by any
means without the written permission of Realtek Semiconductor Corp.
DISCLAIMER
Realtek provides this document ‘as is’, without warranty of any kind. Realtek may make improvements
and/or changes in this document or in the product described in this document at any time. This document
could include technical inaccuracies or typographical errors.
TRADEMARKS
Realtek is a trademark of Realtek Semiconductor Corporation. Other names mentioned in this document
are trademarks/registered trademarks of their respective owners.
USING THIS DOCUMENT
This document is intended for the software engineer’s reference and provides detailed programming
information.
Though every effort has been made to ensure that this document is current and accurate, more information
may have become available subsequent to the production of this guide.
REVISION HISTORY
Revision
1.0
Release Date
2012/10/16
Summary
First release.
Single-Chip 5-Port 10/100Mbps Ethernet Switch Controller
ii
Track ID: JATR-3375-16 Rev. 1.0
RTL8305NB
Datasheet
Table of Contents
1.
2.
3.
4.
5.
GENERAL DESCRIPTION ..............................................................................................................................................1
FEATURES .........................................................................................................................................................................2
SYSTEM APPLICATIONS...............................................................................................................................................3
BLOCK DIAGRAM ...........................................................................................................................................................4
PIN ASSIGNMENTS .........................................................................................................................................................5
5.1.
5.2.
5.3.
6.
6.1.
6.2.
6.3.
6.4.
6.5.
6.6.
6.7.
7.
P
IN
A
SSIGNMENTS
D
IAGRAM
.......................................................................................................................................5
P
ACKAGE
I
DENTIFICATION
...........................................................................................................................................5
P
IN
A
SSIGNMENTS
T
ABLE
............................................................................................................................................6
P
IN
A
SSIGNMENT
C
ODES
.............................................................................................................................................7
M
EDIA
C
ONNECTION
P
INS
...........................................................................................................................................7
M
ISCELLANEOUS
P
INS
.................................................................................................................................................8
P
ORT
LED P
INS
...........................................................................................................................................................8
S
TRAPPING
P
INS
...........................................................................................................................................................9
R
EGULATOR
P
INS
.........................................................................................................................................................9
P
OWER AND
GND P
INS
................................................................................................................................................9
PIN DESCRIPTIONS.........................................................................................................................................................7
BASIC FUNCTION DESCRIPTIONS ...........................................................................................................................10
7.1.
S
WITCH
C
ORE
F
UNCTION
O
VERVIEW
.........................................................................................................................10
7.1.1. Flow Control ........................................................................................................................................................10
7.1.1.1
7.1.1.2
IEEE 802.3x Full Duplex Flow Control........................................................................................................................10
Half Duplex Back Pressure ...........................................................................................................................................10
7.1.2. Address Search, Learning, and Aging ..................................................................................................................11
7.1.3. Half Duplex Operation .........................................................................................................................................11
7.1.4. InterFrame Gap....................................................................................................................................................11
7.1.5. Illegal Frame........................................................................................................................................................11
7.2.
P
HYSICAL
L
AYER
F
UNCTIONAL
O
VERVIEW
...............................................................................................................12
7.2.1. Auto-Negotiation ..................................................................................................................................................12
7.2.2. 10Base-T Transmit Function ................................................................................................................................12
7.2.3. 10Base-T Receive Function ..................................................................................................................................12
7.2.4. Link Monitor.........................................................................................................................................................12
7.2.5. 100Base-TX Transmit Function............................................................................................................................12
7.2.6. 100Base-TX Receive Function..............................................................................................................................12
7.2.7. Power-Down Mode...............................................................................................................................................13
7.2.8. Crossover Detection and Auto Correction ...........................................................................................................13
7.2.9. Polarity Detection and Correction .......................................................................................................................13
7.3.
G
ENERAL
F
UNCTION
O
VERVIEW
................................................................................................................................14
7.3.1. Power-On Sequence .............................................................................................................................................14
7.3.2. Setup and Configuration.......................................................................................................................................15
7.3.3. Serial EEPROM Example.....................................................................................................................................16
7.3.3.1
7.3.3.2
EEPROM Device Operation .........................................................................................................................................16
EEPROM Size Selection...............................................................................................................................................18
7.3.4.
7.3.5.
7.3.6.
7.3.7.
7.3.8.
7.3.9.
7.3.10.
SMI .......................................................................................................................................................................18
Head-Of-Line Blocking ........................................................................................................................................18
Filtering/Forwarding Reserved Control Frame ...................................................................................................19
Loop Detection .....................................................................................................................................................19
Reg.0.14 PHY Digital Loopback Return to Internal.............................................................................................21
LDO for 1.0V Power Generation .........................................................................................................................22
Crystal/Oscillator ............................................................................................................................................22
iii
Track ID: JATR-3375-16 Rev. 1.0
Single-Chip 5-Port 10/100Mbps Ethernet Switch Controller
RTL8305NB
Datasheet
8.
ADVANCED FUNCTION DESCRIPTIONS ................................................................................................................23
8.1.
VLAN F
UNCTION
......................................................................................................................................................23
8.1.1. VLAN Description ................................................................................................................................................23
8.1.2. Port-Based VLAN .................................................................................................................................................24
8.1.3. IEEE 802.1Q Tagged-VID Based VLAN ..............................................................................................................24
8.1.4. Insert/Remove/Replace Tag..................................................................................................................................24
8.1.5. Ingress and Egress Rules......................................................................................................................................25
8.2.
IEEE 802.1
P
R
EMARKING
F
UNCTION
.........................................................................................................................25
8.3.
Q
O
S F
UNCTION
..........................................................................................................................................................26
8.3.1. Bandwidth Control ...............................................................................................................................................26
8.3.1.1
8.3.1.2
Output (TX) Bandwidth Control...................................................................................................................................26
Input (RX) Bandwidth Control .....................................................................................................................................27
Queue Number Selection ..............................................................................................................................................27
Port-Based Priority Assignment....................................................................................................................................27
IEEE 802.1p/Q-Based Priority Assignment..................................................................................................................28
DSCP-Based Priority Assignment ................................................................................................................................28
IP Address-Based Priority.............................................................................................................................................28
Reassigned Priority .......................................................................................................................................................28
RLDP-Based Priority ....................................................................................................................................................28
Packet Priority Selection...............................................................................................................................................29
8.3.2.
Priority Assignment ..............................................................................................................................................27
8.3.2.1
8.3.2.2
8.3.2.3
8.3.2.4
8.3.2.5
8.3.2.6
8.3.2.7
8.3.2.8
8.4.
L
OOKUP
T
ABLE
F
UNCTION
........................................................................................................................................30
8.4.1. Function Description............................................................................................................................................30
8.4.2. Address Search, Learning, and Aging ..................................................................................................................30
8.4.3. Lookup Table Definition.......................................................................................................................................31
8.5.
S
TORM
F
ILTER
F
UNCTION
..........................................................................................................................................32
8.6.
I
NPUT AND
O
UTPUT
D
ROP
F
UNCTION
........................................................................................................................32
8.7.
LED F
UNCTION
..........................................................................................................................................................33
8.8.
E
NERGY
-E
FFICIENT
E
THERNET
(EEE) .......................................................................................................................34
8.9.
C
ABLE
D
IAGNOSIS
.....................................................................................................................................................34
9.
CHARACTERISTICS......................................................................................................................................................35
9.1.
E
LECTRICAL
C
HARACTERISTICS
/M
AXIMUM
R
ATINGS
...............................................................................................35
9.2.
O
PERATING
R
ANGE
....................................................................................................................................................35
9.3.
DC C
HARACTERISTICS
...............................................................................................................................................35
9.4.
T
HERMAL
C
HARACTERISTICS
.....................................................................................................................................36
9.4.1. Simulation Conditions ..........................................................................................................................................36
9.4.2. Thermal Characteristics Results ..........................................................................................................................36
9.5.
D
IGITAL
T
IMING
C
HARACTERISTICS
..........................................................................................................................37
9.5.1. LED Timing ..........................................................................................................................................................37
9.5.2. Reception/Transmission Data Timing of SMI Interface .......................................................................................37
9.5.3. EEPROM Auto-Load Timing................................................................................................................................38
10.
10.1.
11.
MECHANICAL DIMENSIONS.................................................................................................................................39
M
ECHANICAL
D
IMENSIONS
N
OTES
............................................................................................................................40
ORDERING INFORMATION ...................................................................................................................................41
Single-Chip 5-Port 10/100Mbps Ethernet Switch Controller
iv
Track ID: JATR-3375-16 Rev. 1.0
RTL8305NB
Datasheet
List of Tables
T
ABLE
1. P
IN
A
SSIGNMENTS
T
ABLE
..............................................................................................................................................6
T
ABLE
2. M
EDIA
C
ONNECTION
P
INS
..............................................................................................................................................7
T
ABLE
3. M
ISCELLANEOUS
P
INS
...................................................................................................................................................8
T
ABLE
4. P
ORT
LED P
INS
..............................................................................................................................................................8
T
ABLE
5. S
TRAPPING
P
INS
.............................................................................................................................................................9
T
ABLE
6. R
EGULATOR
P
INS
...........................................................................................................................................................9
T
ABLE
7. P
OWER AND
GND P
INS
..................................................................................................................................................9
T
ABLE
8. B
ASIC
SMI R
EAD
/W
RITE
C
YCLES
................................................................................................................................18
T
ABLE
9. E
XTENDED
SMI M
ANAGEMENT
F
RAME
F
ORMAT
........................................................................................................18
T
ABLE
10. R
ESERVED
E
THERNET
M
ULTICAST
A
DDRESSES
...........................................................................................................19
T
ABLE
11. L
OOP
F
RAME
F
ORMAT
.................................................................................................................................................20
T
ABLE
12. C
RYSTAL AND
O
SCILLATOR
R
EQUIREMENTS
...............................................................................................................22
T
ABLE
13. VLAN T
ABLE
..............................................................................................................................................................23
T
ABLE
14. VLAN E
NTRY
.............................................................................................................................................................23
T
ABLE
15. L2 T
ABLE
4-W
AY
H
ASH
I
NDEX
M
ETHOD
....................................................................................................................31
T
ABLE
16. E
LECTRICAL
C
HARACTERISTICS
/M
AXIMUM
R
ATINGS
.................................................................................................35
T
ABLE
17. O
PERATING
R
ANGE
......................................................................................................................................................35
T
ABLE
18. DC C
HARACTERISTICS
.................................................................................................................................................35
T
ABLE
19. PCB D
ESCRIPTIONS
.....................................................................................................................................................36
T
ABLE
20. C
ONDITION
D
ESCRIPTIONS
..........................................................................................................................................36
T
ABLE
21. T
HERMAL
C
HARACTERISTICS
R
ESULTS
.......................................................................................................................36
T
ABLE
22. LED T
IMING
................................................................................................................................................................37
T
ABLE
23. SMI T
IMING
.................................................................................................................................................................37
T
ABLE
24. EEPROM A
UTO
-L
OAD
T
IMING
C
HARACTERISTICS
....................................................................................................38
T
ABLE
25. O
RDERING
I
NFORMATION
............................................................................................................................................41
Single-Chip 5-Port 10/100Mbps Ethernet Switch Controller
v
Track ID: JATR-3375-16 Rev. 1.0
电子工程世界
模拟电子
