CMOS linear image sensor
S11108
Achieves high sensitivity by adding an
amplifier to each pixel
The S11108 is a CMOS linear image sensor that achieves high sensitivity by adding an amplifier to each pixel. It has a long
photosensitive area (effective photosensitive area length: 28.672 mm) consisting of 2048 pixels, each with a pixel size of 14
× 14
μm.
Features
Pixel size: 14 × 14
μm
2048 pixels
Effective photosensitive area length: 28.672 mm
High sensitivity: 50 V/(lx·s)
Simultaneous charge integration for all pixels
Variable integration time function (electronic shutter function)
5 V single power supply operation
Built-in timing generator allows operation with only
start and clock pulse inputs
Video data rate: 10 MHz max.
Small input terminal capacitance: 5 pF
Applications
Position detection
Image reading
Encoder
Barcode reader
Structure
Parameter
Number of pixels
Pixel size
Photosensitive area length
Package
Window material
Specification
2048
14 × 14
28.672
LCP (liquid crystal polymer)
Tempax
Unit
-
μm
mm
-
-
Absolute maximum ratings
Parameter
Supply voltage
Clock pulse voltage
Start pulse voltage
Block switch voltage
Operating temperature*
1
Storage temperature*
1
Symbol
Vdd
V(CLK)
V(ST)
V(BSW)
Topr
Tstg
Condition
Ta=25 °C
Ta=25 °C
Ta=25 °C
Ta=25 °C
Value
-0.3 to +6
-0.3 to +6
-0.3 to +6
-0.3 to +6
-40 to +85
-40 to +85
Unit
V
V
V
V
°C
°C
*1:
No condensation
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the
product within the absolute maximum ratings.
www.hamamatsu.com
1
CMOS linear image sensor
S11108
Recommended terminal voltage (Ta=25 °C)
Parameter
Supply voltage
Clock pulse voltage
Start pulse voltage
High level
Low level
High level
Low level
2048 pixels
reading
1024 pixels
reading
Symbol
Vdd
V(CLK)
V(ST)
Min.
4.75
3
0
3
0
0
V(BSW)
3
Vdd
Vdd + 0.25
V
Typ.
5
Vdd
-
Vdd
-
-
Max.
5.25
Vdd + 0.25
0.3
Vdd + 0.25
0.3
0.3
Unit
V
V
V
V
V
V
Block switch voltage*
2
*2:
This should be NC or GND when reading from all pixels, or Vdd when reading from 1024 pixels (513 to 1536 channels).
Input terminal capacitance (Ta=25 °C, Vdd=5 V)
Parameter
Symbol
Clock pulse input terminal capacitance C(CLK)
Start pulse input terminal capacitance C(ST)
Min.
-
-
Typ.
5
5
Max.
-
-
Unit
pF
pF
Electrical characteristics [Ta=25 °C, Vdd=5 V, V(CLK)=V(ST)=5 V]
Parameter
Clock pulse frequency
Video data rate
Output impedance
Current consumption
*
3
*
4
Symbol
f(CLK)
VR
Zo
I
Min.
200 k
-
70
20
Typ.
-
f(CLK)
-
30
Max.
10 M
-
260
50
Unit
Hz
Hz
Ω
mA
*3:
f(CLK)=10 MHz
*4:
Current consumption increases as the clock pulse frequency increases. The current consumption is 10 mA typ. at f(CLK)=200 kHz.
Electrical and optical characteristics [Ta=25 °C, Vdd=5 V, V(CLK)=V(ST)=5 V, f(CLK)=10 MHz]
Parameter
Spectral response range
Peak sensitivity wavelength
Photosensitivity*
5
Conversion efficiency*
6
Dark output voltage*
7
Saturation output voltage*
8
Readout noise
Dynamic range 1*
9
Dynamic range 2*
10
Output offset voltage
Photoresponse nonuniformity*
5
*
11
Image lag
Symbol
λ
λp
R
CE
Vd
Vsat
Nr
DR1
DR2
Vo
PRNU
IL
Min.
-
-
-
0
0.8
0.3
-
-
0.3
-
-
Typ.
400 to 1000
700
50
13
0.3
1.2
0.6
2000
4000
0.5
±2
-
Max.
-
-
-
3
1.8
1.5
-
-
0.9
±10
0.6
Unit
nm
nm
V/(lx·s)
μV/e
-
mV
V
mV rms
times
times
V
%
mV
*5:
Measured with a tungsten lamp of 2856 K
*6:
Output voltage generated per one electron
*7:
Integration time Ts=10 ms
*8:
Difference from Vo
*9:
DR1= Vsat/Nr
*10:
DR2= Vsat/Vd
Integration time Ts=10 ms
Dark output voltage is proportional to the integration time and so the shorter the integration time, the wider the dynamic range.
*11:
Photoresponse nonuniformity (PRNU) is the output nonuniformity that occurs when the entire photosensitive area is uniformly
illuminated by light which is 50% of the saturation exposure level. PRNU is measured using 2042 pixels excluding 3 pixels each at
both ends, and is defined as follows:
PRNU=
ΔX
/ X × 100 (%)
X: average output of all pixels,
ΔX:
difference between X and maximum output or minimum output
*12:
Signal components of the preceding line data that still remain even after the data is read out in a saturation output state
2
CMOS linear image sensor
S11108
Spectral response (typical example)
100
(Ta=25 °C)
80
Relative sensitivity (%)
60
40
20
0
400
600
800
1000
1200
Wavelength (nm)
KMPDB0308EB
Block diagram
Trig 23
Shift register
15 EOS
CLK 3
ST 24
Timing
generator
Hold circuit
Amp array
Photodiode array
Bias
generator
13 Video
22
BSW
KMPDC0312ED
3
CMOS linear image sensor
S11108
Output waveform of one pixel
The timing for acquiring the Video signal is synchronized with the rising edge of a trigger pulse (See red arrow below.).
f(CLK)=VR=10 MHz
CLK
5 V/div.
GND
Trig
5 V/div.
GND
1.7 V (saturation output voltage=1.2 V)
Video
0.5 V (output offset voltage)
1 V/div.
20 ns/div.
GND
f(CLK)=VR=1 MHz
CLK
5 V/div.
GND
Trig
5 V/div.
GND
1.7 V (saturation output voltage=1.2 V)
Video
1 V/div.
200 ns/div.
0.5 V (output offset voltage)
GND
4
CMOS linear image sensor
S11108
Timing chart
1 2 3 4 5
CLK
Integration time
ST
tlp(ST)
thp(ST)
tpi(ST)
87 clocks
2048
Video*
1
Trig
EOS
Block switch enabled period
*
When reading from 1024 pixels, the Video signal is output from 513 to 1536 channels.
tf(CLK)
tr(CLK)
89
1
2048
1 2 3 4
51 52 53
87 88 89
CLK
1/f(CLK)
ST
tr(ST)
thp(ST)
tpi(ST)
KMPDC0319EF
tf(ST)
tlp(ST)
Parameter
Start pulse width interval*
13
Start pulse high period*
13
*
14
Start pulse low period
Start pulse rise and fall times
Clock pulse duty
Clock pulse rise and fall times
Symbol
tpi(ST)
thp(ST)
tlp(ST)
tr(ST), tf(ST)
-
tr(CLK), tf(CLK)
Min.
98/f(CLK)
6/f(CLK)
92/f(CLK)
0
45
0
Typ.
-
-
-
10
50
10
Max.
-
-
-
30
55
30
Unit
s
s
s
ns
%
ns
*13:
Dark output increases if the start pulse period or the start pulse high period is lengthened.
*14:
The integration time equals the high period of ST plus 48 CLK cycles.
The shift register starts operation at the rising edge of CLK immediately after ST goes low.
The integration time can be changed by changing the ratio of the high and low periods of ST.
If the
fi
rst Trig pulse after ST goes low is counted as the
fi
rst pulse, the Video signal is acquired at the rising edge of the 89th Trig
pulse.
5