Si3462
S
INGLE
-P
ORT
IEEE 802.3
AT
P
O
E/P
O
E+ PSE I
NTERFACE
Features
IEEE 802.3at
TM
compliant PSE
Autonomous operation requires no
host processor interface
Complete reference design
available, including Si3462 controller
and schematic:
Low-cost BOM
Compact PCB footprint
Operates directly from a +50 V
isolated supply
Supports up to 30 W maximum
output power (Class 4)
Robust 3-point detection algorithm
eliminates false detection events
IEEE-compliant disconnect
Inrush current control
Short-circuit
Pin Assignments
protection
LED status signal (detect,
power good, output fault)
UNH Interoperability Test Lab
report available
Extended operating range
(–40 to +85 °C)
11-Pin Quad Flat No-Lead (QFN)
package
Tiny 3x3 mm PCB footprint;
RoHS-compliant
No-classify modes force power
after valid detection
Eliminates 10 BOM
components
output fault
Si3462
11
CLSMARK
DC1
VDD
DC2
CLSMODE
11
1
2
3
4
5
11
11
10
9
STATUS
ISENSE
RST
VSENSE
DETA
GND
8
7
6
11-pin QFN (3x3 mm)
Top View—Pads on bottom of package
Applications
IEEE 802.3at endpoints and
midspans
Environment A and B PSEs
Embedded PSEs
Set-top boxes
FTTH media converters
Cable modem and DSL gateways
Description
The Si3462 is a single-port power management controller for IEEE 802.3at-
compliant Power Sourcing Equipment (PSE). The Si3462 can be powered
from a 50 V input using a shunt regulator, or, to save power, it can be powered
from 50 V and 3.3 V power supplies. The IEEE-required Powered Device (PD)
detection feature uses a robust 3-point algorithm to avoid false detection
events. The Si3462's reference design kit also provides full IEEE-compliant
classification and PD disconnect. Intelligent protection circuitry includes input
under-voltage lockout (UVLO), classification-based current limiting, and output
short-circuit protection. The Si3462 is designed to operate completely
independently of host processor control. An LED status signal is provided to
indicate the port status, including detection, power good, and output fault
event information. The Si3462 is pin-programmable to support four available
power levels, endpoint and mid-span applications, and auto-retry or restart
after disconnect functions. A comprehensive reference design kit is available
(Si3462-EVB), including a complete schematic and bill of materials. The
Si3462 also features “no-classify” modes, for circumstances where detection
is desired but classification steps can be skipped. Example applications
include dedicated, point-to-point connections for IP cameras, point-of-sale
terminals, and wireless access points where the application power
requirements are well understood. These modes allow elimination of
classification-related components from the bill of materials.
Rev. 1.0 11/11
Copyright © 2011 by Silicon Laboratories
Si3462
Si3462
2
Rev. 1.0
Si3462
T
ABLE O F
C
ONTENTS
Section
Page
1. Typical Application Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Si3462 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
2.1. Si3462-EVB Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.2. PSE Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3. Typical Si3462-EVB Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Si3462-EVB Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1. Reset State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
4.2. Operating Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5. Operating Mode Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1. Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.2. Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3. Power-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4. Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.5. Disconnect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.6. UVLO and OVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.7. Status LED Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
6. Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
6.1. Isolation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2. External Component Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3. Input DC Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
7. Si3462 Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
8. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
9. Package Outline: 11-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
10. Solder Paste Mask . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
10.1. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
11. Top Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
11.1. Si3462 Top Marking (QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
11.2. Top Marking Explanation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Rev. 1.0
3
Si3462
1. Typical Application Schematic
V
IN
+50V
V
DD
+3.3V
VDD
CLSMARK
DC1
DC2
CLSMODE
DETA
VSENSE
ISENSE
STATUS
GND
DETECT
FAULT
PGOOD
+50V
Optional 3.3V regulator
+
Detect
&
Mark
Classification
(Optional)
and
Gate drive
V
OUT
48 V
PSE
output
(to port
magnetics)
Si3462
RST
GND
GND
-
Note: Refer to the Si3462-EVB User Guide for complete schematic details
Figure 1. Si3462 Typical Application Schematic
4
Rev. 1.0
Si3462
2. Electrical Specifications
The following specifications apply to the Si3462 controller. Refer to Tables 3 and 6 and the Si3462-EVB User's
Guide and schematics for additional details about the electrical specifications of the Si3462-EVB reference design.
Table 1. Recommended Operating Conditions
Description
Operating Temperature Range
Thermal Impedance
VDD Input Supply Voltage
Symbol
T
A
JA
VDD
No airflow
During all operating modes
(detect, classification, disconnect)
Test Conditions
Min
–40
—
2.7
Typ
25
75
3.3
Max
+85
—
3.6
Unit
°C
°C/W
V
Table 2. Electrical Characteristics*
Description
Symbol
Test Conditions
Min
Typ
Max
Unit
Digital Pins: CLSMARK, DC1, DC2, CLSMODE, STATUS (Output mode), RST
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
V
OH
V
OL
V
IH
V
IL
I
IL
I
OH
= –3 mA
I
OH
= –10 µA
I
OL
= 8.5 mA
I
OL
= 10 µA
Any digital pin
Any digital pin
V
IN
= 0 V
0.7 x VDD
VDD – 0.1
—
—
0.7 x VDD
—
—
—
±1
0.6
—
—
—
—
—
—
—
0.6
0.1
V
V
V
V
µA
Analog Pins: ISENSE, VSENSE, DETA, STATUS (Input mode)
Input Capacitance
Input Leakage Current
I
IL
—
—
5
±1
—
—
pF
µA
*Note:
VDD = 2.7 to 3.6 V, –40 to +85 °C unless otherwise specified.
Rev. 1.0
5
