SPP2301D
P-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPP2301D is the P-Channel logic enhancement
mode power field effect transistors are produced using
high cell density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application such as cellular phone and notebook
computer power management and other battery powered
circuits, and low in-line power loss are needed in a very
small outline surface mount package.
APPLICATIONS
Power Management in Note book
Portable Equipment
Battery Powered System
DC/DC Converter
Load Switch
DSC
LCD Display inverter
FEATURES
-20V/-2.4A,R
DS(ON)
=128mΩ@V
GS
=-4.5V
-20V/-2.0A,R
DS(ON)
=188mΩ@V
GS
=-2.5V
Super high density cell design for extremely low
R
DS (ON)
Exceptional on-resistance and maximum DC
current capability
SOT-23 package design
PIN CONFIGURATION(SOT-23)
PART MARKING
2011/10/25
Ver.3
Page 1
SPP2301D
P-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
Symbol
G
S
D
Description
Gate
Source
Drain
ORDERING INFORMATION
Part Number
SPP2301DS23RG
SPP2301DS23RGB
Package
SOT-23
SOT-23
Part
Marking
S01YW
S01YW
※
Week Code : A ~ Z( 1 ~ 26 ) ; a ~ z( 27 ~ 52 )
※
SPP2301DS23RG : Tape Reel ; Pb- Free ;
※
SPP2301DS23RGB : Tape Reel ; Pb- Free ; Halogen -Free
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
VDSS
VGSS
ID
IDM
IS
PD
TJ
TSTG
RθJA
Typical
-20
±12
-2.4
-1.8
-10
-1.6
1.25
0.8
-55/150
-55/150
120
Unit
V
V
A
A
A
W
℃
℃
℃/W
2011/10/25
Ver.3
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SPP2301D
P-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=-250uA
V
GS(th)
V
DS
=V
GS
,I
D
=-250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
V
DS
=0V,V
GS
=±12V
V
DS
=-20V,V
GS
=0V
V
DS
=-20V,V
GS
=0V
T
J
=55℃
V
DS
≦-5V,V
GS
=-4.5V
V
DS
≦-5V,V
GS
=-2.5V
V
GS
=-4.5V,I
D
=-2.4A
V
GS
=-2.5V,I
D
=-2.0A
V
DS
=-5V,I
D
=-2.8A
I
S
=-1.6A,V
GS
=0V
-20
-0.45
-1.5
±100
-1
-10
-6
-3
0.115
0.165
6.5
-0.8
0.128
0.188
-1.2
V
nA
uA
A
Ω
S
V
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DS
=-6V,V
GS
=-4.5V
I
D
≡-2.4A
V
DS
=-6V,V
GS
=0V
f=1MHz
4.8
0.75
1.3
35
150
60
10
8
nC
pF
20
45
55
50
ns
V
DD
=-6V,R
L
=6Ω
I
D
≡-1.0A,V
GEN
=-4.5V
R
G
=6Ω
32
38
30
2011/10/25
Ver.3
Page 3
SPP2301D
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2011/10/25
Ver.3
Page 4
SPP2301D
P-Channel Enhancement Mode MOSFET
TYPICAL CHARACTERISTICS
2011/10/25
Ver.3
Page 5
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