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TSF18N60MR

漏源电压(Vdss):600V 连续漏极电流(Id)(25°C 时):18A(Tc) 栅源极阈值电压:5V @ 250uA 漏源导通电阻:450mΩ @ 9A,10V 最大功率耗散(Ta=25°C):40W(Tc) 类型:N沟道 N沟道 18A,600V

器件类别:分立半导体    MOS(场效应管)   

厂商名称:信安(Truesemi)

厂商官网:http://www.truesemi.com

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器件参数
参数名称
属性值
漏源电压(Vdss)
600V
连续漏极电流(Id)(25°C 时)
18A(Tc)
栅源极阈值电压
5V @ 250uA
漏源导通电阻
450mΩ @ 9A,10V
最大功率耗散(Ta=25°C)
40W(Tc)
类型
N沟道
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TSF18N60MR
TSF18N60MR
600V N-Channel MOSFET
General Description
This Power MOSFET is produced using Truesemi‘s
advanced planar stripe DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction based on half bridge
topology.
Features
• 18A,600V,Max.R
DS(on)
=0.45Ω @ V
GS
=10V
• Low gate charge(typical 50nC)
• High ruggedness
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Absolute Maximum Ratings
Symbol
V
DSS
V
GS
I
D
I
DM
E
AS
E
AR
I
AR
P
D
T
J
, T
STG
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Pulsed Drain Current
T
C
=25℃ unless otherwise specified
Value
Parameter
Units
V
V
A
A
A
mJ
mJ
A
W
600
±
30
T
C
= 25℃
T
C
= 100℃
(Note 2)
(Note 1)
(Note 1)
18*
10.1*
72*
698
4
16
40
-55 to +150
Single Pulsed Avalanche Energy
Repetitive Avalanche Energy
Repetitive avalanche current
Power Dissipation (T
C
= 25℃)
Operating and Storage Temperature Range
* Drain current limited by maximum junction temperature.
Thermal Resistance Characteristics
Symbol
R
θJC
R
θJA
Parameter
Thermal Resistance,Junction-to-Case
Thermal Resistance,Junction-to-Ambient
Value
Units
℃/W
℃/W
3.13
62.5
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF18N60MR
Electrical Characteristics
T
C
=25
Symbol
Parameter
unless otherwise specified
Test Conditions
Min
Typ
Max
Units
On Characteristics
V
GS
R
DS(ON)
g
fs
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward transfer conductance(note 3)
V
DS
= V
GS
, I
D
= 250 uA㎂
V
GS
= 10 V, I
D
=
9A
V
DS
= 10 V, I
D
=
9A
3
--
--
0.37
5
0.45
V
(Note 3)
--
11
--
S
Off Characteristics
BV
DSS
I
DSS
I
GSSF
I
GSSR
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body Leakage Current,Forward
Gate-Body Leakage Current,Reverse
V
GS
= 0 V, I
D
= 250 uA㎂
V
DS
= 600 V, V
GS
= 0 V
V
DS
= 600 V, T
C
=125℃
V
GS
= 30 V, V
DS
= 0 V
V
GS
=- 30 V, V
DS
= 0 V
600
--
--
--
--
--
--
--
--
--
--
1
V
uA
100
100
-100
nA㎁
nA㎁
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
--
--
3325
225
22
--
--
--
pF㎊
pF㎊
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 480 V, I
D
= 16A,
V
GS
= 10 V
(Note 3,4)
V
DS
= 300 V, I
D
= 16A,
R
G
= 25 Ω
(Note 3,4)
--
--
--
--
--
--
--
175
121
373
64
50
20
10
--
--
--
--
55
--
--
ns
ns㎱
ns㎱
ns㎱
nC
nC
nC
Source-Drain Diode Maximum Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous Source-Drain Diode Forward Current
Pulsed Source-Drain Diode Forward Current
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
= 16A, V
GS
= 0 V
I
S
=16A, V
GS
= 0 V
di
F
/dt = 100 A/μs (Note 3,4)
--
--
--
--
--
--
--
--
484
1.62
16
A
64
1.4
--
--
V
ns㎱
uC
Note:
1. Repeated rating: Pulse width limited by safe operating area
2. L=5mH, IAS=16A, VDD=50V, RG=25Ω, Starting TJ=25℃
3. Pulse test: Pulse width≤300us, Duty cycle≤2%
4. Essentially independent of operating temperature typical characteristics
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
Typical Characteristics
TSF18N60MR
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF18N60MR
Typical Characteristics
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF18N60MR
Fig 12. Gate Charge Test Circuit & Waveform
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
10V
V
GS
Q
gs
Q
gd
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
V
DS
R
G
R
L
V
DD
( 0.5 rated V
DS
)
V
DS
90%
10V
DUT
V
in
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
V
DS
V
DD
I
D
R
G
BV
DSS
I
AS
1
E
AS
= ---- L
L
I
AS2
2
I
D
(t)
10V
DUT
V
DD
t
p
V
DS
(t)
Time
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
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