TSF840MR
TSF840MR
500V N-Channel MOSFET
General Description
This Power MOSFET is produced using Truesemi‘s
advanced planar stripe DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction based on half bridge
topology.
Features
• 9.0A,500V,Max.R
DS(on)
=0.8 Ω @ V
GS
=10V
• Low gate charge(typical 30nC)
• High ruggedness
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
Absolute Maximum Ratings
Symbol
V
DSS
V
GS
I
D
I
DM
E
AS
E
AR
dv/dt
P
D
T
J
, T
STG
T
L
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Pulsed Drain Current
T
J
=25℃ unless otherwise specified
Parameter
Value
500
±30
T
C
= 25℃
T
C
= 100℃
(Note 1)
(Note 2)
(Note 1)
(Note 3)
9.0*
5.4*
36*
360
13.9
4.5
45.5
0.36
-55 to +150
300
Units
V
V
A
A
A
mJ
mJ
V/ns
W
W/℃
℃
℃
Single Pulsed Avalanche Energy
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (T
C
= 25℃)
-Derate above 25℃
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8” from case for 5 seconds
* Drain current limited by maximum junction temperature.
Thermal Resistance Characteristics
Symbol
R
θJC
R
θCS
R
θJA
Parameter
Thermal Resistance,Junction-to-Case
Thermal Resistance,Case-to-Sink Typ.
Thermal Resistance,Junction-to-Ambient
Value
2.75
--
62.5
Units
℃/W
℃/W
℃/W
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF840MR
Electrical Characteristics
T
J
=25
℃
Symbol
Parameter
unless otherwise specified
Test Conditions
Min
Typ
Max
Units
On Characteristics
V
GS
R
DS(ON)
Gate Threshold Voltage
Static Drain-Source
On-Resistance
V
DS
= V
GS
, I
D
= 250 uA㎂
V
GS
= 10 V, I
D
= 4.5 A
2.0
--
--
0.68
4.0
0.8
V
Ω
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0 V, I
D
= 250 uA㎂
ID = 250 uA, Referenced to
25℃
V
DS
= 500 V, V
GS
= 0 V
V
DS
= 400 V, T
J
= 125℃
Gate-Body Leakage Current,Forward
Gate-Body Leakage Current,Reverse
500
--
--
--
--
--
--
0.6
--
--
--
--
--
--
1
10
100
-100
V
V/℃
uA
uA
nA㎁
nA㎁
△BVDSS
Breakdown Voltage Temperature
/
△TJ
Coefficient
I
DSS
I
GSSF
I
GSSR
Zero Gate Voltage Drain Current
V
GS
= 30 V, V
DS
= 0 V
V
GS
=- 30 V, V
DS
= 0 V
Dynamic Characteristics
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
V
DS
= 25 V, V
GS
= 0 V,
f = 1.0 MHz
--
--
--
1050
130
25
--
--
--
pF㎊
pF㎊
pF
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
Turn-On Time
Turn-On Rise Time
Turn-Off Delay Time
Turn-Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 400 V, I
D
= 9.0A,
V
GS
= 10 V
(Note 4,5)
V
DS
= 250 V, I
D
= 9.0A,
R
G
= 25 Ω
(Note 4,5)
--
--
--
--
--
--
--
20
70
90
60
30
4.0
15
--
--
--
--
--
--
--
ns
ns㎱
ns㎱
ns㎱
nC
nC
nC
Source-Drain Diode Maximum Ratings and Characteristics
I
S
I
SM
V
SD
t
rr
Q
rr
NOTES:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. L=8mH, I
AS
=9.0A, V
DD
=50V, R
G
=25
Ω,
Starting TJ=25
℃
3. I
SD
≤9.0A, di/dt ≤ 200A/us, V
DD
≤ BV
DSS
, Starting TJ = 25
℃
4. Pulse Test: Pulse width ≤ 300us, Duty Cycle ≤ 2%
5. Essentially Independent of Operating Temperature Typical Characteristics
Continuous Source-Drain Diode Forward Current
Pulsed Source-Drain Diode Forward Current
Source-Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
I
S
= 9.0 A, V
GS
= 0 V
I
S
=9.0A, V
GS
= 0 V
di
F
/dt = 100 A/μs
(Note 4)
--
--
--
--
--
--
--
--
340
3.0
9.0
A
36.0
1.4
--
--
V
ns㎱
uC
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
Typical Characteristics
TSF840MR
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF840MR
Typical Characteristics
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
Figure 11. Transient Thermal Response Curve
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
TSF840MR
Fig 12. Gate Charge Test Circuit & Waveform
50KΩ
12V
200nF
300nF
Same Type
as DUT
V
DS
V
GS
Q
g
10V
V
GS
Q
gs
Q
gd
DUT
3mA
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
V
DS
R
G
R
L
V
DD
( 0.5 rated V
DS
)
V
DS
90%
10V
DUT
V
in
10%
t
d(on)
t
on
t
r
t
d(off)
t
off
t
f
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
L
V
DS
V
DD
I
D
R
G
BV
DSS
I
AS
1
E
AS
= ---- L
L
I
AS2
2
I
D
(t)
10V
DUT
V
DD
t
p
V
DS
(t)
Time
© 2018 Truesemi Semiconductor Corporation
Ver.B1
www.truesemi.com
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