UM5075/5079
Single Line ESD Protection Diode Array
UM5075 SOD523 1.2×0.8
UM5079 DFN2/FBP2 1.0×0.6
General Description
The UM5075/5079 ESD protection diode is designed to replace multilayer varistors (MLVs) in
portable applications such as cell phones, notebook computers, and PDA’s. They feature large
cross-sectional area junctions for conducting high transient currents, offer desirable electrical
characteristics for board level protection, such as fast response time, lower operating voltage,
lower clamping voltage and no device degradation when compared to MLVs.
The UM5075/5079 ESD protection diode protects sensitive semiconductor components from
damage or upset due to electrostatic discharge (ESD) and other voltage induced transient events.
The UM5075 is available in SOD523 1.2×0.8mm
2
package and the UM5079 is available in
DFN2/FBP2 1.0×0.6mm
2
(compatible with SOD882/SOD923) package, both with working
voltage of 7 volt.
It gives designer the flexibility to protect one unidirectional line in applications where arrays are
not practical. Additionally, it may be “sprinkled” around the board in applications where board
space is at a premium. It may be used to meet the ESD immunity requirements of IEC 61000-4-2,
Level 4 (±15kV air, ±8kV contact discharge).
Applications
Cell Phone Handsets and Accessories
Personal Digital Assistants (PDA’s)
Notebooks, Desktops, and Servers
Portable Instrumentation
Cordless Phones
Digital Cameras
Peripherals
MP3 Players
Features
Transient protection for data lines to
IEC 61000-4-2 (ESD) ±15kV (air), ±8kV
(contact)
Small package for use in portable electronics
Suitable replacement for MLV’s in ESD
protection applications
Protect one I/O or power line
Low clamping voltage
Stand off voltage: 7V
Low leakage current
Solid-state silicon-avalanche technology
Pin Configurations
Top View
UM5075
SOD523 1.2×0.8
UM5079
DFN2/FBP2 1.0×0.6
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UM5075/5079
Ordering Information
Part
Number
UM5075
UM5079
UM5079
Working
Voltage
7.0V
Packaging
Type
SOD523 1.2×0.8mm
2
DFN2 1.0×0.6mm
2
FBP2 1.0×0.6mm
2
Channel
1
Marking
Code
ZB
E3
E3
Shipping
Qty
3000pcs/7Inch Reel
5000pcs/7Inch Reel
Absolute Maximum Ratings
Rating
Peak Pulse Power (tp = 8/20μs)
Maximum Peak Pulse Current (t=8/20μs)
Lead Soldering Temperature
Operating Temperature
Storage Temperature
Symbol
P
PK
I
PP
T
L
T
J
T
STG
Value
200
12
260 (10 sec.)
-55 to +125
-55 to +150
Units
Watts
Amps
°C
°C
°C
Symbol Definition
Parameter
Maximum Reverse Peak Pulse Current
Clamping Voltage @ I
pp
Working Peak Reverse Voltage
Maximum Reverse Leakage Current @ V
RWM
Breakdown Voltage @ I
t
Test Current
Forward Current
Forward Voltage @ I
F
Peak Power Dissipation
Max. Capacitance @ V
R
= 0V, f = 1MHz
Symbol
I
PP
V
C
V
RWM
I
R
V
BR
I
t
I
F
V
F
P
PK
C
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UM5075/5079
Electrical Characteristics
(T=25°C, Device for 7.0V Reverse Stand-off Voltage)
Parameter
Symbol
Conditions
Reverse Stand-Off
V
RWM
Voltage
Reverse Breakdown
V
BR
It = 1mA
Voltage
Reverse Leakage
I
R
V
RWM
= 7V, T=25°C
Current
I
PP
= 5A, t
p
= 8/20μS
Clamping Voltage
V
C
I
PP
=12A, t
p
= 8/20μS
Forward Voltage
Junction Capacitance
Junction Capacitance
V
F
C
J
C
J
I
F
= 10mA
V
R
= 0V, f = 1MHz
V
R
= 2.5V, f = 1MHz
Min
Typ
Max
7
Unit
V
V
μA
V
V
7.3
7.6
0.005
8.0
1
11.4
16.4
0.8
40
30
50
40
pF
pF
Typical Operating Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
10
Clamping Voltage vs. Peak Pulse Current
17
16
Peak Pulse Power - Ppk(kW)
15
Clamping Voltage - Vc(V)
1
14
13
12
11
10
9
0.1
Waveform
parameters:
tr=8uS
td=20uS
0
2
4
6
8
10
12
0.01
0.1
8
1
10
100
1000
Pulse Duration - tp(uS)
Peak Pulse Current - Ipp(A)
Forward Voltage vs. Forward Current
7
6
Junction Capacitance vs. Reverse Voltage
50
Junction Capacitance(pF)
Forward Voltage - Vf(V)
45
5
4
40
3
35
2
Waveform
parameters:
tr=8uS
td=20uS
2
4
6
8
10
12
30
1
0
1
2
3
4
5
Reverse Voltage (V)
Forward Current - If(A)
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UM5075/5079
Applications Information
Device Connection Options
UM5075/5079 ESD protection diode is designed to protect one data, I/O, or power supply line.
The device is unidirectional and may be used on lines where the signal polarity is above ground.
The cathode band should be placed towards the line that is to be protected.
Circuit Board Layout Recommendations for Suppression of ESD
Good circuit board layout is critical for the suppression of ESD induced transients. The following
guidelines are recommended:
1. Place the TVS near the input terminals or connectors to restrict transient coupling.
2. Minimize the path length between the TVS and the protected line.
3. Minimize all conductive loops including power and ground loops.
4. The ESD transient return path to ground should be kept as short as possible.
5. Never run critical signals near board edges.
6. Use ground planes whenever possible. For multilayer printed-circuit boards, use ground
vias.
7. Keep parallel signal paths to a minimum.
8. Avoid running protection conductors in parallel with unprotected conductor.
9. Minimize all printed-circuit board conductive loops including power and ground loops.
10. Avoid using shared transient return paths to a common ground point.
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UM5075/5079
Package Information
UM5075 SOD523 1.2×0.8
Outline Drawing
Symbol
A
A1
b
c
D
E
E1
E2
L
θ
DIMENSIONS
MILLIMETERS
INCHES
Min
Max
Min
Max
0.510
0.770
0.020
0.031
0.500
0.700
0.020
0.028
0.250
0.350
0.010
0.014
0.080
0.150
0.003
0.006
0.750
0.850
0.030
0.033
1.100
1.300
0.043
0.051
1.500
1.700
0.059
0.067
0.200REF
0.008REF
0.010
0.070
0.001
0.003
7°REF
7°REF
Land Pattern
NOTES:
1. Compound dimension: 1.20×0.80;
2. Unit: mm;
3. General tolerance ±0.05mm unless otherwise specified;
4. The layout is just for reference.
Tape and Reel Orientation
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