UTRON
Rev. 1.2
512K X 16 BIT LOW POWER CMOS SRAM
UT66L51216
REVISION HISTORY
REVISION
Rev. 1.0
Rev. 1.1
Rev. 1.2
DESCRIPTION
Original.
Revised AC / DC ELECTRICAL CHARACTERISTICS
1. Revised Function block diagram
2. Revised 48TFBGA ball size
Release Date
Aug. 05.2002
Oct. 01.2002
Feb. 20.2003
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80101
1
UTRON
Rev. 1.2
512K X 16 BIT LOW POWER CMOS SRAM
UT66L51216
FEATURES
GENERAL DESCRIPTION
Fast access time : 55/70/100ns
CMOS Low power operating
Operating current: 45/35/25mA (Icc max.)
Standby current: 70uA (typ.) L-version
50uA (typ.) LL-version
Single 2.7V~3.6V power supply
Operating temperature:
Commercial : 0
℃
~70
℃
Industrial : -40
℃
~85
℃
All TTL compatible inputs and outputs
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min)
Data byte control :
LB
(I/O1~I/O8)
UB (I/O9~I/O16)
Package : 44-pin 400mil TSOP-
Ⅱ
48-pin 6mm × 8mm TFBGA
The UT66L51216 is a 8,362,608-bit low power CMOS
static random access memory organized as 524,288
words by 16 bits.
The UT66L51216 operates from a single 2.7V ~ 3.6V
power supply and all inputs and outputs are fully TTL
compatible.
The UT66L51216 is designed for low power system
applications. It is particularly suited for use in
high-density Low-Power system applications.
FUNCTIONAL BLOCK DIAGRAM
512K
×
16
M EM O R Y
AR R AY
A0-A18
DECODER
Vcc
Vss
I/O 1-I/O 8
Low er Byte
I/O 9-I/O 16
U pper Byte
I/O D ATA
C IR C U IT
C O LU M N I/O
CE
OE
WE
UB
LB
C O N TR O L
C IR C U IT
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80101
2
UTRON
Rev. 1.2
512K X 16 BIT LOW POWER CMOS SRAM
UT66L51216
PIN CONFIGURATION
A4
A3
A2
A1
A0
CE
I/O1
I/O2
I/O3
I/O4
Vcc
Vss
I/O5
I/O6
I/O7
I/O8
WE
A18
A17
A16
A15
A14
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O16
I/O15
I/O14
I/O13
Vss
Vcc
I/O12
I/O11
I/O10
I/O9
A8
A9
A10
A11
A12
A13
1
2
3
4
5
6
E
F
G
H
Vcc
I/O15
I/O16
A18
I/O13
I/O14
NC
A8
NC
A14
A12
A9
A16
A15
A13
A10
I/O5
I/O6
WE
A11
Vss
I/O7
I/O8
NC
D
C
B
A
LB
I/O9
I/O10
Vss
OE
UB
I/O11
I/O12
A0
A3
A5
A17
A1
A4
A6
A7
A2
CE
I/O2
I/O4
NC
I/O1
I/O3
Vcc
TFBGA
TSOP II
PIN DESCRIPTION
SYMBOL
A0 - A18
I/O1 - I/O16
CE
WE
OE
LB
UB
V
CC
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Lower Byte Control
Upper Byte Control
Power Supply
Ground
No Connection
TRUTH TABLE
MODE
Standby
Output Disable
Read
CE
OE
X
X
H
H
L
L
L
X
X
X
WE
LB
UB
X
H
X
L
H
L
L
H
L
L
Write
Note:
H
X
L
L
L
L
L
L
L
L
X
X
H
H
H
H
H
L
L
L
X
H
L
X
L
H
L
L
H
L
I/O OPERATION
I/O1-I/O8
I/O9-I/O16
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
High – Z
D
OUT
High – Z
High – Z
D
OUT
D
OUT
D
OUT
D
IN
High – Z
High – Z
D
IN
D
IN
D
IN
SUPPLY CURRENT
I
SB
, I
SB1
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
I
CC
,I
CC1
,I
CC2
H = V
IH
, L=V
IL
, X = Don't care.
P80101
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
3
UTRON
Rev. 1.2
512K X 16 BIT LOW POWER CMOS SRAM
UT66L51216
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Terminal Voltage with Respect to V
SS
Operating Temperature
Commercial
Industrial
Storage Temperature
Power Dissipation
DC Output Current
Soldering Temperature (under 10 secs)
SYMBOL
V
TERM
T
A
T
A
T
STG
P
D
I
OUT
Tsolder
RATING
-0.5 to 4.6
0 to 70
-40 to 85
-65 to 150
1
50
260
UNIT
V
℃
℃
℃
W
mA
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
= 2.7V~3.6V, T
A
= 0
℃
to 70
℃
/ -40
℃
to 85
℃
(I))
PARAMETER
SYMBOL
TEST CONDITION
Power Voltage
V
CC
Input High Voltage
V
IH
Input Low Voltage
V
IL
Input Leakage Current
I
LI
V
SS
≦
V
IN
≦
V
CC
Output Leakage Current
I
LO
V
SS
≦
V
I/O
≦
V
CC;
Output Disable
Output High Voltage
V
OH
I
OH
= -1mA
Output Low Voltage
V
OL
I
OL
= 2.1mA
Cycle time=min, 100%duty
Operating Power
I
CC
I
I/O
=0mA, CE =V
IL
Supply Current
Average Operation
Current
Standby Current (TTL)
Standby Current (CMOS)
I
CC1
I
CC2
I
SB
I
SB1
CE =V
IH,
other pins =V
IL
or V
IH
CE =V
CC
-0.2V
other pins at 0.2V or Vcc-0.2V
100%duty,I
I/O
=0mA, CE
≦
0.2V,
other pins at 0.2V or Vcc-0.2V
MIN. TYP. MAX. UNIT
2.7 3.0
3.6
V
2.2
-
V
CC
+0.3
V
-0.2
-
0.6
V
-1
-
1
µA
-1
-
1
µA
2.2
-
-
V
-
-
0.4
V
-
30
45
mA
-
25
35
mA
-
20
25
mA
-
-
-
-
-
4
8
0.3
70
50
5
10
0.5
100
80
mA
mA
mA
µA
µA
55
70
100
Tcycle=
1µs
Tcycle=
500ns
-L
-LL
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80101
4
UTRON
Rev. 1.2
512K X 16 BIT LOW POWER CMOS SRAM
UT66L51216
CAPACITANCE
(T
A
=25
℃
, f=1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
-
-
MAX
6
8
UNIT
pF
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
0V to 3.0V
5ns
1.5V
C
L
= 30pF, I
OH
/I
OL
= -1mA / 2.1mA
AC ELECTRICAL CHARACTERISTICS
(V
CC
=2.7V~3.6V, T
A
= 0
℃
to 70
℃
/ -40
℃
to 85
℃
(I))
(1) READ CYCLE
PARAMETER
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
LB
,
UB
Access Time
LB
,
UB
to High-Z Output
LB
,
UB
to Low-Z Output
SYMBOL
t
RC
t
AA
t
ACE
t
OE
t
CLZ*
t
OLZ*
t
CHZ*
t
OHZ*
t
OH
t
BA
t
BHZ
t
BLZ
UT66L51216-55
MIN.
MAX.
55
-
-
55
-
55
-
30
10
-
5
-
-
20
-
20
5
-
-
55
-
25
10
-
UT66L51216-70
MIN.
MAX.
70
-
-
70
-
70
-
35
10
-
5
-
-
25
-
25
5
-
-
70
-
30
10
-
UT62L51216-100
UNIT
MIN.
MAX.
100
-
ns
-
100
ns
-
100
ns
-
50
ns
10
-
ns
5
-
ns
-
30
ns
-
30
ns
5
-
ns
-
100
ns
-
40
ns
10
-
ns
(2) WRITE CYCLE
PARAMETER
Write Cycle Time
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High Z
SYMBOL
t
WC
t
AW
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
OW*
t
WHZ*
t
BW
LB
,
UB
Valid to End of Write
*These parameters are guaranteed by device characterization, but not production tested.
UT66L51216-55
MIN.
MAX.
55
-
50
-
50
-
0
-
45
-
0
-
25
-
0
-
5
-
-
30
45
-
UT66L51216-70
MIN.
MAX.
70
-
60
-
60
-
0
-
55
-
0
-
30
-
0
-
5
-
-
30
60
-
UT66L51216-100
UNIT
MIN.
MAX.
100
-
ns
80
-
ns
80
-
ns
0
-
ns
70
-
ns
0
-
ns
40
-
ns
0
-
ns
5
-
ns
-
40
ns
80
-
ns
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882
FAX: 886-3-5777919
P80101
5
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