M02040/43/49/50 Evaluation Module
User Guide
02049-EVMD-001-D
April, 2005
Revision History
Revision
D
C
B
A
Level
Final
Final
Final
Final
Date
April 2005
May 2004
April 2004
February 2004
Description
Update for -14 (3.3V only) and -15 (3.3V/5V)
versions of the parts.
Add peaking network description for 4.3 Gbps. Add
user instructions to Fig. 3-1.
Update RAMPSET and RST values
Initial Release
© 2005 Mindspeed Technologies
TM
, Inc. All rights reserved.
Information in this document is provided in connection with Mindspeed Technologies
TM
("Mindspeed
TM
") products.
These materials are provided by Mindspeed as a service to its customers and may be used for informational pur-
poses only. Except as provided in Mindspeed’s Terms and Conditions of Sale for such products or in any separate
agreement related to this document, Mindspeed assumes no liability whatsoever. Mindspeed assumes no respon-
sibility for errors or omissions in these materials. Mindspeed may make changes to specifications and product
descriptions at any time, without notice. Mindspeed makes no commitment to update the information and shall
have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications
and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property
rights is granted by this document.
THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR
IMPLIED, RELATING TO SALE AND/OR USE OF MINDSPEED PRODUCTS INCLUDING LIABILITY OR WAR-
RANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAM-
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02049-EVMD-001-D
Mindspeed Technologies™
1.0 Operation of Evaluation
Module
1.1
Functional Description
The M02040/43/49/50 Evaluation Module has been designed to demonstrate the
performance of the respective ICs, a highly integrated family of limiting amplifiers
targeted for use in optical receivers operating up to 4.3 Gbps (M02043/49).
The evaluation module enables the user to investigate the full functionality of the
device and facilitate programming of various features. The high speed data inputs and
outputs are AC-coupled, with controlled impedance lines and good quality SMA
connectors providing the interface to test equipment. The laminate (Nelco N4000-13)
used for the design of this board, offers superior high frequency performance and
ensures a good quality transmission medium for the signals delivered to and output
from the board.
Features:
Supports the -14 (3.3V only) and the -15 (3.3/5V) versions of the parts. Either
+3.3V or +5V supply selected by a switch. No components require changing
SMA connectors for all high-speed I/O connections with AC-coupling to the IC
allowing direct connection of inputs and outputs to test equipment
Operates with Differential input levels up to 1200 mVpp
Signal Detected (SD) indication
Two Analog Received Signal Strength Indicator outputs: RSSI
AVG
and RSSI
PP
Versions with PECL outputs (M02040/50) include a regulator to supply the
correct PECL termination voltage regardless of the supply voltage
Programmability
Programmable CML output levels (M02043/49)
Programmable Rate Select (M02049/50) or DC Servo Disable (M02040)
Loss of Signal threshold level adjustment
Selectable data output power down/squelch operation (Jam)
Selectable Signal Detect LED operation
Test Points Available
Receive Signal Strength (RSSI
AVG
and RSSI
PP
) levels
Bandgap reference
LOS Output
Jam input
LOS threshold setting voltage
AMPSET voltage that defines CML output levels
Regulated 3.3V output (5V operation)
All control inputs
02049-EVMD-001-D
Mindspeed Technologies™
1
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1
Operation of Evaluation Module
M02040/43/49/50 Evaluation Module User Guide
Figure 1-1. Typical 1.25 Gbps PECL Output (Low Rate Mode) Eye Diagram
10 mV
PP
differential input
1.25 Gbps
160 mV/div
140 ps/div
Figure 1-2. Typical 2.5 Gbps CML output (High Rate Mode) Eye Diagram
10 mV
PP
differential input
2.5 Gbps
50 mV/div
70 ps/div
02049-EVMD-001-D
Mindspeed Technologies™
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M02040/43/49/50 Evaluation Module User Guide
Operation of Evaluation Module
Figure 1-3. Typical 2.5 Gbps PECL output (High Rate Mode) Eye Diagram
10 mV
PP
differential input
2.5 Gbps
160 mV/div
80 ps/div
Figure 1-4. Typical 4.3 Gbps CML output (High Rate Mode) Eye Diagram
10 mV
PP
differential input
4.3 Gbps
45 mV/div
50 ps/div
02049-EVMD-001-D
Mindspeed Technologies™
1
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微控制器 MCU
