REV
N
DESCRIPTION
CO-27937
DATE
6/20/17
PREP
DF/SM
APPD
LT
EXAMPLES SHOWN IN ACTUAL SIZE
Oscillator Specification, Hybrid Clock
MOUNT HOLLY SPRINGS, PA 17065
THE RECORD OF APPROVAL FOR THIS
DOCUMENT IS MAINTAINED ELECTRONICALLY
WITHIN THE ERP SYSTEM
CODE IDENT NO
Hi-Rel Standard
SIZE
DWG. NO.
REV
00136
A
OS-68338
N
UNSPECIFIED TOLERANCES: N/A
SHEET 1 0F 35
1.
1.1
SCOPE
General. This specification defines the design, assembly and functional evaluation of high
reliability, hybrid clock oscillators produced by Vectron International. Devices delivered to
this specification represent the standardized Parts, Materials and Processes (PMP) Program
developed, implemented and certified for advanced applications and extended environments.
Applications Overview. The designs represented by these products were primarily developed
for the MIL-Aerospace community. The lesser Design Pedigrees and Screening Options
imbedded within OS-68338 bridge the gap between Space and COTS hardware by providing
custom hardware with measures of mechanical, assembly and reliability assurance needed for
Military or Ruggedized COTS environments.
APPLICABLE DOCUMENTS
Specifications and Standards. The following specifications and standards form a part of this
document to the extent specified herein. The issue currently in effect on the date of quotation
will be the product baseline, unless otherwise specified. In the event of conflict between the
texts of any references cited herein, the text of this document shall take precedence.
Military
MIL-PRF-55310
MIL-PRF-38534
Standards
MIL-STD-202
MIL-STD-883
Other
DOC007131
QSP-90100
DOC011627
DOC203982
QSP-91502
1.2
2.
2.1
Oscillators, Crystal Controlled, General Specification For
Hybrid Microcircuits, General Specification For
Test Method Standard, Electronic and Electrical Component Parts
Test Methods and Procedures for Microelectronics
Test Specification, OS-68338 Hybrids, Hi-Rel Standard
Quality Systems Manual, Vectron International
Identification Common Documents, Materials and Processes, Hi-Rel XO
DPA Specification
Procedure for Electrostatic Discharge Precautions
3.
3.1
GENERAL REQUIREMENTS
Classification. All devices delivered to this specification are of hybrid technology conforming
to Type 1, Class 2 of MIL-PRF-55310. Primarily developed as a Class S equivalent
specification, options are imbedded within it to also produce Class B, Engineering Model and
Ruggedized COTS devices. Devices carry a Class 2 ESDS classification per MIL-PRF-38534.
Item Identification. External packaging choices are of metal flatpacks, DIP’s and ceramic J-
lead 9x14mm and LCC’s with either TTL or ACMOS logic output. Unique Model Number
Series’ are utilized to identify device package configurations and output logic as listed in Table
1.
UNSPECIFIED TOLERANCES
3.2
SIZE
CODE IDENT NO.
DWG NO.
REV.
SHEET
A
00136
N/A
OS-68338
N
2
3.3
Absolute Maximum Ratings.
a. Supply Voltage Range (V
CC
):
b. Storage Temperature Range (T
STG
):
c. Junction Temperature (T
J
):
d. Lead Temperature (soldering, 10 seconds):
e. Output Source/Sink Current:
-0.5Vdc to +7.0Vdc
-65°C to +125°C
+175°C
+300°C
±70 mA
3.4
3.4.1
Design, Parts, Materials and Processes, Assembly, Inspection and Test.
Design. The ruggedized designs implemented for these devices are proven in military and
space applications under extreme environments. All designs (except Model 1157) utilize a 4-
point crystal mount in compliment with Established Reliability (MIL-ER) componentry. The
Model 1157 utilizes a 3-point crystal mount and replaces the Model 1118 which utilized a 2-
point crystal mount. When specified, radiation hardening up to 100krad(Si) (RHA level R) can
be included without altering the device’s internal topography.
3.4.1.1 Design and Configuration Stability. Barring changes to improve performance by reselecting
passive chip component values to offset component tolerances, there will not be fundamental
changes to the design or assembly or parts, materials and processes after first product delivery
of that item without written approval from the procuring activity.
3.4.1.2 Environmental Integrity. Designs have passed the environmental qualification levels of MIL-
PRF-55310. These designs have also passed extended dynamic levels of at least:
a. Sine Vibration: MIL-STD-202, Method 204, Condition G (30g pk.)
b. Random Vibration: MIL-STD-202, Method 214, Condition II-J (43.92g rms, three
minute duration in each of three mutually perpendicular directions)
c. Mechanical Shock: MIL-STD-202, Method 213, Condition F (1500g, 0.5ms)
3.4.2
Prohibited Parts, Materials and Processes. The items listed are prohibited for use in high
reliability devices produced to this specification.
a. Gold metallization of package elements without a barrier metal.
b. Zinc chromate as a finish.
c. Cadmium, zinc, or pure tin external or internal to the device.
d. Plastic encapsulated semiconductor devices.
e. Ultrasonically cleaned electronic parts.
f. Heterojunction Bipolar Transistor (HBT) technology.
g. ‘getter’ materials
Assembly. Manufacturing utilizes standardized procedures, processes and verification
methods to produce MIL-PRF-55310 Class S / MIL-PRF-38534 Class K equivalent devices.
MIL-PRF-38534 Group B Option 1 in-line inspection is included on radiation hardened part
numbers to further verify lot pedigree. Traceability of all components and production lots are
in accordance with MIL-PRF-38534, as a minimum. Tabulated records are provided as a part
of the deliverable data package. Devices are handled in accordance with Vectron document
QSP-91502 (Procedure for Electrostatic Discharge Precautions).
3.4.3
SIZE
CODE IDENT NO.
UNSPECIFIED TOLERANCES
DWG NO.
REV.
SHEET
A
00136
N/A
OS-68338
N
3
3.4.4
Inspection. The inspection requirements of MIL-PRF-55310 apply to all devices delivered to
this document. Inspection conditions and standards are documented in accordance with the
Quality Assurance, ISO-9001 and AS9100 derived, System of QSP-90100.
Test. The Screening test matrix of Table 5 is tailored for selectable-combination testing to
eliminate costs associated with the development/maintenance of device-specific documentation
packages while maintaining performance integrity.
Marking. Device marking shall be in accordance with the requirements of MIL-PRF-55310.
Ruggedized COTS Design Implementation. Design Pedigree “D” devices (see ¶ 5.2) use the
same robust designs found in the other device pedigrees. They do not include the provisions of
traceability or the Class-qualified componentry noted in paragraphs 3.4.3 and 4.1.
DETAIL REQUIREMENTS
Components
Crystals. Cultured quartz crystal resonators are used to provide the selected frequency for the
devices. The optional use of Premium Q swept quartz can, because of its processing to remove
impurities, be specified to minimize frequency drift when operating in radiation environments.
In accordance with MIL-PRF-55310, the manufacturer has a documented crystal element
evaluation program.
Passive Components. Passive components will have the same pedigree as the die specified in
paragraph 7.1. When required, Established Reliability (ER) failure level R minimum passive
components are used to the maximum extent possible and procured from QPL suppliers. Lot
evaluations are in accordance with MIL-PRF-38534 or Enhanced Element Evaluation as
specified in Table 7. When used, inductors may be open construction and may use up to 47
gauge wire.
Class S Microcircuits. Microcircuits are procured from wafer lots that have passed MIL-PRF-
38534 Class K Lot Acceptance Tests for Class S/K active devices. The prescribed die carries a
Class 2 ESDS classification in accordance with MIL-PRF-38534. When optionally specified,
further testing in accordance with MIL-PRF-55310 and MIL-PRF-38534 is performed for
radiation hardness assurance and for Enhanced Element Evaluation as specified in Table 6.
Those microcircuits, identified by a unique part number, are certified for 100krad(Si) total
ionizing dose (TID), RHA level R (2X minimum margin). NSC, as the original 54ACT
designer, rates the SEU LET at >40 MeV and SEL at >120MeV for the FACT™ family (AN-
932). Vectron has conducted additional SEE testing in 2008 to verify this performance since
our lot wafer testing does not include these parameters and determinations.
3.4.5
3.4.6
3.4.7
4.
4.1
4.1.1
4.1.2
4.1.3
4.1.3.1 Class B Microcircuits. When specified, microcircuits assembled into OS-68338 Design
Pedigree letters “B” and “C” devices (¶ 5.2a) are procured from wafer lots that have passed
MIL-PRF-55310 element evaluations for Class B devices.
SIZE
CODE IDENT NO.
UNSPECIFIED TOLERANCES
DWG NO.
REV.
SHEET
A
00136
N/A
OS-68338
N
4
4.1.4
Packages. Packages are procured that meet the construction, lead materials and finishes as
specified in MIL-PRF-55310. All leads are Kovar with gold plating over a nickel underplate
.
Package lots are upscreened in accordance with the requirements of MIL-PRF-38534 as
applicable.
Traceability and Homogeneity. All design pedigrees except option D have active device lots
that are traceable to the manufacturer’s individual wafer; all other elements and materials are
traceable to their manufacturer and incoming inspection lots. Design pedigrees E, R, V and X
have homogenous material. In addition, swept quartz crystals are traceable to the quartz bar
and the processing details of the autoclave lot, as applicable.
Enhanced Element Evaluation. When Design Pedigree Option “E” is specified, active and
passive devices with Enhanced Element Evaluation as listed in Table 6 and 7 shall be
implemented for the highest reliability preference.
Mechanical.
Package Outline. Table 1 links each Hi-Rel Standard Model Number of this specification to a
corresponding package style. Mechanical Outline information of each package style is found
in the referenced Figure.
Thermal Characteristics. The worst case thermal characteristics of each package style are
found in Table 4.
Electrical.
Input Power. Devices are available with an input voltage of either +5.0 Vdc (±10%) or +3.3
Vdc (±10%). Current is measured, no load, at maximum rated operating voltage.
Temperature Range. Operating range is -55°C to +125°C.
Frequency Tolerance. Initial accuracy at +23°C is ±15 ppm maximum. Frequency-
Temperature Stability is ±50 ppm maximum from +23°C reference. Frequency-Voltage
Tolerance is ±4 ppm maximum.
Frequency Aging. Aging limits, and when tested in accordance with MIL-PRF-55310 Group B
inspection, shall not exceed ±1.5 ppm the first 30 days, ±5 ppm Year 1 and ±2 ppm per year
thereafter.
4.1.5
4.1.6
4.2
4.2.1
4.2.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.4.1 Frequency Aging Duration Option. By customer request, the Aging test may be terminated
after 15 days if the measured aging rate is less than half of the specified aging rate. This is a
common method of expediting 30-Day Aging without incurring risk to the hardware and used
quite successfully for numerous customers. It is based on the ‘least squares fit’ determinations
of MIL-PRF-55310 paragraph 4.8.35. The ‘half the time/half the spec’ limit is generally
conservative as roughly 2/3 of a unit’s Aging deviation occurs within that period of time.
Vectron’s automated aging systems take about 6 data points per day, so a lot of data is
available to do very accurate projections, much more data than what is required by MIL-PRF-
SIZE
CODE IDENT NO.
UNSPECIFIED TOLERANCES
DWG NO.
REV.
SHEET
A
00136
N/A
OS-68338
N
5
stm32/stm8
