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24AA08E/MS

256 X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8

器件类别:存储    存储   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
零件包装代码
MSOP
包装说明
ROHS COMPLIANT, PLASTIC, MSOP-8
针数
8
Reach Compliance Code
compli
ECCN代码
EAR99
最大时钟频率 (fCLK)
0.1 MHz
JESD-30 代码
S-PDSO-G8
JESD-609代码
e3
长度
3 mm
内存密度
2048 bi
内存集成电路类型
EEPROM
内存宽度
8
湿度敏感等级
1
功能数量
1
端子数量
8
字数
256 words
字数代码
256
工作模式
SYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-40 °C
组织
256X8
封装主体材料
PLASTIC/EPOXY
封装代码
TSSOP
封装形状
SQUARE
封装形式
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行
SERIAL
峰值回流温度(摄氏度)
260
认证状态
Not Qualified
座面最大高度
1.1 mm
串行总线类型
I2C
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
1.7 V
标称供电电压 (Vsup)
2.5 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子面层
Matte Tin (Sn)
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
40
宽度
3 mm
最长写入周期时间 (tWC)
5 ms
Base Number Matches
1
文档预览
24AA08/24LC08B
8K I
2
C™ Serial EEPROM
Device Selection Table
Part
Number
24AA08
24LC08B
Note 1:
V
CC
Range
1.7-5.5
2.5-5.5
Max. Clock
Frequency
400 kHz
(1)
400 kHz
Temp.
Ranges
I
I, E
Description:
The Microchip Technology Inc. 24AA08/24LC08B
(24XX08*) is a 8 Kbit Electrically Erasable PROM. The
device is organized as four blocks of 256 x 8-bit
memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.7V, with standby
and active currents of only 1
A
and 1 mA, respectively.
The 24XX08 also has a page write capability for up to
16 bytes of data. The 24XX08 is available in the
standard 8-pin PDIP, surface mount SOIC, TSSOP, 2x3
DFN, 2x3 TDFN and MSOP packages, and is also
available in the 5-lead SOT-23, or 4-lead Chip Scale
package. All packages are Pb-free and RoHS
compliant.
100 kHz for V
CC
<2.5V.
Features:
• Single Supply with Operation down to 1.7V for
24AA08 Devices, 2.5V for 24LC08B Devices
• Low-Power CMOS Technology:
- Read current 1 mA, max.
- Standby current 1
A,
max.
• 2-Wire Serial Interface, I
2
C™ Compatible
• Schmitt Trigger inputs for Noise Suppression
• Output Slope Control to eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 3 ms, typical
• Self-Timed Erase/Write Cycle
• 16-Byte Page Write Buffer
• Hardware Write-Protect
• ESD Protection >4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention >200 Years
• Factory Programming Available
• Packages include 8-lead PDIP, SOIC, TSSOP,
DFN, TDFN, MSOP and 5-lead SOT-23, or 4-lead
Chip Scale
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I):
-40°C to +85°C
- Automotive (E): -40°C to +125°C
Block Diagram
WP
HV
Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page
Latches
I/O
SCL
YDEC
SDA
V
CC
V
SS
Sense Amp.
R/W Control
Package Types
PDIP/MSOP/SOIC/TSSOP
A0
A1
A2
V
SS
Note:
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
Vss
SDA
SCL
1
2
3
4
Vcc
SOT-23-5
5
WP
A0 1
A1 2
A2 3
V
SS
4
DFN/TDFN
8 V
CC
7 WP
6 SCL
5 SDA
(Top Down View,
Balls Not Visible)
CS (Chip Scale)
2
V
CC
SCL
1
3
2
4
V
SS
SDA
Pins A0, A1 and A2 are not used by the 24XX08. (No
internal connections).
2002-2012 Microchip Technology Inc.
DS21710K-page 1
24AA08/24LC08B
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
......................................................................................................... -0.3V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins

4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
V
CC
= +1.7V to +5.5V
Industrial (I):
T
A
= -40°C to +85°C
Automotive (E): T
A
= -40°C to +125°C
Min.
DC CHARACTERISTICS
Param.
Symbol
No.
D1
D2
D3
V
IH
V
IL
V
HYS
Characteristic
WP, SCL and SDA pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs (SDA,
SCL pins)
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
Typ.
Max.
0.3 V
CC
Units
V
V
V
(Note)
Conditions
0.7 V
CC
0.05 V
CC
D4
D5
D6
D7
D8
D9
D10
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
0.1
0.05
0.01
0.40
±1
±1
10
3
1
1
5
V
A
A
pF
mA
mA
A
A
I
OL
= 3.0 mA, V
CC
= 2.5V
V
IN
= .1V to V
CC
V
OUT
= .1V to V
CC
V
CC
= 5.0V
(Note)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
Industrial
Automotive
SDA = SCL = V
CC
WP = V
SS
I
CC
write
Operating current
Standby current
Note:
This parameter is periodically sampled and not 100% tested.
DS21710K-page 2
2002-2012 Microchip Technology Inc.
24AA08/24LC08B
TABLE 1-2:
AC CHARACTERISTICS
V
CC
= +1.7V to +5.5V
Industrial (I):
T
A
= -40°C to +85°C
Automotive (E):
T
A
= -40°C to +125°C
Min.
600
4000
1300
4700
600
4000
600
4700
0
100
250
600
4000
1300
4700
Typ.
Max.
400
100
300
1000
300
900
3500
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
(Note
1)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
(Note
2)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
AC CHARACTERISTICS
Param.
Symbol
No.
1
2
3
4
5
6
7
8
9
10
11
12
F
CLK
T
HIGH
Characteristic
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note
1)
SDA and SCL fall time
Start condition hold time
Start condition setup
time
Data input hold time
Data input setup time
Stop condition setup
time
Output valid from clock
(Note
2)
Bus free time: Time the
bus must be free before
a new transmission can
start
Output fall time from V
IH
minimum to V
IL
maximum
Input filter spike
suppression
(SDA and SCL pins)
Write cycle time (byte or
page)
Endurance
T
LOW
T
R
T
F
T
HD
:
STA
T
SU
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
AA
T
BUF
13
T
OF
250
250
50
ns
2.5V
V
CC
5.5V
1.7V
V
CC
2.5V
(24AA08)
(Notes
1
and
3)
14
T
SP
ns
15
16
Note 1:
2:
3:
4:
T
WC
1M
5
ms
cycles 25°C,
(Note
4)
Not 100% tested. C
B
= total capacitance of one bus line in pF.
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a
T
I
specification for standard operation.
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site
at www.microchip.com.
2002-2012 Microchip Technology Inc.
DS21710K-page 3
24AA08/24LC08B
FIGURE 1-1:
BUS TIMING DATA
5
3
SCL
7
SDA
IN
6
14
11
SDA
OUT
12
8
9
10
2
4
FIGURE 1-2:
BUS TIMING START/STOP
D3
SCL
7
SDA
6
10
Start
Stop
DS21710K-page 4
2002-2012 Microchip Technology Inc.
24AA08/24LC08B
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in
Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
V
SS
SDA
SCL
WP
V
CC
PDIP
1
2
3
4
5
6
7
8
PIN FUNCTION TABLE
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
DFN
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
SOT-23
2
3
1
5
4
CS
2
4
3
1
Description
Not Connected
Not Connected
Not Connected
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
2.1
Serial Address/Data Input/Output
(SDA)
2.3
Write-Protect (WP)
The WP pin must be connected to either V
SS
or V
CC
.
If tied to V
SS
, normal memory operation is enabled
(read/write the entire memory 000-3FF).
If tied to V
CC
, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
The Chip Scale package does not support the write-
protect feature.
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to V
CC
(typical 10 k for 100 kHz, 2 k for 400 kHz).
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
2.2
Serial Clock (SCL)
2.4
A0, A1, A2
The SCL input is used to synchronize the data transfer
to and from the device.
The A0, A1 and A2 pins are not used by the 24XX08.
They may be left floating or tied to either V
SS
or V
CC
.
2002-2012 Microchip Technology Inc.
DS21710K-page 5
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