24AA32AF/24LC32AF
32K I
2
C
™
Serial EEPROM with Quarter-Array Write-Protect
Device Selection Table
Part
Number
24AA32AF
24LC32AF
Note 1:
V
CC
Range
1.7-5.5
2.5-5.5
Max. Clock
Frequency
400 kHz
(1)
400 kHz
Temp.
Ranges
I
I, E
Description:
The Microchip Technology Inc. 24AA32AF/24LC32AF
(24XX32AF*) is a 32 Kbit Electrically Erasable PROM.
The device is organized as a single block of 4K x 8-bit
memory with a 2-wire serial interface. Low-voltage
design permits operation down to 1.7V, with standby
and read currents of only 1
μA
and 400
μA,
respectively. It has been developed for advanced, low-
power applications such as personal communications
or data acquisition. The 24XX32AF also has a page
write capability for up to 32 bytes of data. Functional
address lines allow up to eight devices on the same
bus, for up to 256 Kbits address space. The 24XX32AF
is available in the standard 8-pin PDIP, surface mount
SOIC, TSSOP, TDFN and MSOP packages. The
24XX32AF is also available in the 5-lead SOT-23
package.
100 kHz for V
CC
<2.5V.
Features:
• Single Supply with Operation down to 1.7V for
24AA32AF devices, 2.5V for 24LC32AF devices
• Low-Power CMOS Technology:
- Read current 400
μA,
max.
- Standby current 1
μA,
max. (I-temp)
• 2-Wire Serial Interface, I
2
C™ Compatible
• Packages with 3 Address Pins are Cascadable up
to Eight Devices
• Schmitt Trigger Inputs for Noise Suppression
• Output Slope Control to Eliminate Ground Bounce
• 100 kHz and 400 kHz Clock Compatibility
• Page Write Time 5 ms max.
• Self-Timed Erase/Write Cycle
• 32-Byte Page Write Buffer
• Hardware Write-Protect for 1/4 Array
(C00h-FFFh)
• ESD Protection > 4,000V
• More than 1 Million Erase/Write Cycles
• Data Retention > 200 Years
• Factory Programming Available
• Packages Include 8-lead PDIP, SOIC, TSSOP,
MSOP, TDFN and 5-lead SOT-23
• Pb-Free and RoHS Compliant
• Temperature Ranges:
- Industrial (I):
-40°C to +85°C
- Automotive (E): -40°C to +125°C
Block Diagram
A0 A1 A2 WP
HV Generator
I/O
Control
Logic
Memory
Control
Logic
XDEC
EEPROM
Array
Page Latches
I/O
SDA
Vcc
V
SS
SCL
YDEC
Sense Amp.
R/W Control
Package Types
PDIP, MSOP, SOIC, TSSOP
A0
A1
A2
V
SS
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
SDA
3
4
V
CC
SCL
V
SS
1
2
SOT-23
5
WP
A0 1
A1 2
A2 3
V
SS
4
TDFN
8 V
CC
7 WP
6 SCL
5 SDA
*24XX32AF is used in this document as a generic part number for the 24AA32AF/24LC32AF devices.
©
2009 Microchip Technology Inc.
DS22184A-page 1
24AA32AF/24LC32AF
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
(†)
V
CC
.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. V
SS
......................................................................................................... -0.3V to V
CC
+1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied ................................................................................................-40°C to +125°C
ESD protection on all pins
......................................................................................................................................................≥
4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
T
A
= -40°C to +85°C, V
CC
= +1.7V to +5.5V
Automotive (E): T
A
= -40°C to +125°C, V
CC
= +2.5V to +5.5V
Min.
—
DC CHARACTERISTICS
Param.
Symbol
No.
D1
D2
D3
D4
—
V
IH
V
IL
V
HYS
Characteristic
A0, A1, A2, WP, SCL
and SDA pins
High-level input voltage
Low-level input voltage
Hysteresis of Schmitt
Trigger inputs (SDA,
SCL pins)
Low-level output voltage
Input leakage current
Output leakage current
Pin capacitance
(all inputs/outputs)
Typ.
—
—
—
—
Max.
—
—
0.3 V
CC
0.2 V
CC
—
Units
—
V
V
V
V
—
—
Conditions
0.7 V
CC
—
0.05 V
CC
V
CC
≥
2.5V
V
CC
< 2.5V
V
CC
≥
2.5V
(Note 1)
D5
D6
D7
D8
D9
D10
D11
V
OL
I
LI
I
LO
C
IN
,
C
OUT
I
CC
read
I
CCS
—
—
—
—
—
—
—
—
—
—
—
—
0.1
0.05
0.01
—
0.40
±1
±1
10
3
400
1
5
V
μA
μA
pF
mA
μA
μA
μA
I
OL
= 3.0 mA, V
CC
= 4.5V
I
OL
= 2.1 mA, Vcc = 2.5V
V
IN
= V
SS
or V
CC
V
OUT
= V
SS
or V
CC
V
CC
= 5.0V
(Note 1)
T
A
= 25°C, F
CLK
= 1 MHz
V
CC
= 5.5V, SCL = 400 kHz
Industrial
Automotive
SDA = SCL = V
CC
= 5.5V
A0, A1, A2, WP = V
SS
I
CC
write
Operating current
Standby current
Note 1:
2:
This parameter is periodically sampled and not 100% tested.
Typical measurements taken at room temperature.
DS22184A-page 2
©
2009 Microchip Technology Inc.
24AA32AF/24LC32AF
TABLE 1-2:
AC CHARACTERISTICS
Electrical Characteristics:
Industrial (I):
V
CC
= +1.7V to 5.5V T
A
= -40°C to +85°C
Automotive (E): V
CC
= +2.5V to 5.5V T
A
= -40°C to 125°C
Characteristic
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
(Note 1)
SDA and SCL fall time
(Note 1)
Start condition hold time
Start condition setup time
Data input hold time
Data input setup time
Stop condition setup time
WP setup time
WP hold time
Output valid from clock
(Note 2)
Bus free time: Time the bus
must be free before a new
transmission can start
Output fall time from V
IH
minimum to V
IL
maximum
C
B
≤
100 pF
Input filter spike suppression
(SDA and SCL pins)
Write cycle time (byte or
page)
Endurance
Min.
—
—
4000
600
4700
1300
—
—
—
4000
600
4700
600
0
250
100
4000
600
4000
600
4700
1300
—
—
4700
1300
10 +
0.1C
B
—
—
1,000,000
Max.
100
400
—
—
—
—
1000
300
300
—
—
—
—
—
—
—
—
—
—
—
—
—
3500
900
—
—
250
Units
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
(Note 2)
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7 V
≤
V
CC
<
2.5V
2.5 V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
(Note 1)
Conditions
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
1.7V
≤
V
CC
<
2.5V
2.5V
≤
V
CC
≤
5.5V
AC CHARACTERISTICS
Param.
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Sym.
F
CLK
T
HIGH
T
LOW
T
R
T
F
T
HD
:
STA
T
SU
:
STA
T
HD
:
DAT
T
SU
:
DAT
T
SU
:
STO
T
SU
:
WP
T
HD
:
WP
T
AA
T
BUF
15
T
OF
ns
16
17
18
T
SP
T
WC
—
50
5
—
ns
ms
(Notes 1 and 3)
—
cycles 25°C
(Note 4)
Note 1:
Not 100% tested. C
B
= total capacitance of one bus line in pF.
2:
As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3:
The combined T
SP
and V
HYS
specifications are due to new Schmitt Trigger inputs, which provide improved
noise spike suppression. This eliminates the need for a T
I
specification for standard operation.
4:
This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site
at www.microchip.com.
©
2009 Microchip Technology Inc.
DS22184A-page 3
24AA32AF/24LC32AF
FIGURE 1-1:
BUS TIMING DATA
5
4
2
D4
SCL
SDA
IN
7
6
16
3
8
9
10
13
SDA
OUT
(protected)
(unprotected)
14
WP
11
12
DS22184A-page 4
©
2009 Microchip Technology Inc.
24AA32AF/24LC32AF
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
Name
A0
A1
A2
V
SS
SDA
SCL
WP
V
CC
PIN FUNCTION TABLE
PDIP
1
2
3
4
5
6
7
8
SOIC
1
2
3
4
5
6
7
8
TSSOP
1
2
3
4
5
6
7
8
TDFN
1
2
3
4
5
6
7
8
MSOP
1
2
3
4
5
6
7
8
SOT-23
—
—
—
2
3
1
5
4
Description
Chip Address Input
Chip Address Input
Chip Address Input
Ground
Serial Address/Data I/O
Serial Clock
Write-Protect Input
+1.7V to 5.5V Power Supply
2.1
A0, A1, A2 Chip Address Inputs
2.3
Serial Clock (SCL)
The A0, A1 and A2 inputs are used by the 24XX32AF
for multiple device operation. The levels on these
inputs are compared with the corresponding bits in the
slave address. The chip is selected if the comparison is
true.
Up to eight devices may be connected to the same bus
by using different Chip Select bit combinations. These
inputs must be connected to either V
CC
or V
SS
.
In most applications, the chip address inputs A0, A1
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For
applications in which these pins are controlled by a
microcontroller or other programmable device, the chip
address pins must be driven to logic ‘0’ or logic ‘1’
before normal device operation can proceed. Address
pins are not available in the SOT-23 package.
The SCL input is used to synchronize the data transfer
to and from the device.
2.4
Write-Protect (WP)
This pin must be connected to either V
SS
or V
CC
. If tied
to V
SS
, write operations are enabled. If tied to V
CC
,
write operations are inhibited for the upper 1/4 of the
array (C00h-FFFh), but read operations are not
affected.
2.2
Serial Data (SDA)
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. It is an open-drain
terminal, therefore, the SDA bus requires a pull-up
resistor to V
CC
(typical 10 kΩ for 100 kHz, 2 kΩ for
400 kHz)
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
©
2009 Microchip Technology Inc.
DS22184A-page 5
