28C16A
16K (2K x 8) CMOS EEPROM
FEATURES
• Fast Read Access Time—150 ns
• CMOS Technology for Low Power Dissipation
- 30 mA Active
- 100
µ
A Standby
• Fast Byte Write Time—200
µ
s or 1 ms
• Data Retention >200 years
• High Endurance - Minimum 10
4
Erase/Write Cycles
• Automatic Write Operation
- Internal Control Timer
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
• Data polling
• Chip Clear Operation
• Enhanced Data Protection
- V
CC
Detector
- Pulse Filter
- Write Inhibit
• Electronic Signature for Device Identification
• 5-Volt-Only Operation
• Organized 2Kx8 JEDEC Standard Pinout
• 24-pin Dual-In-Line Package
• 32-pin PLCC Package
• 28-pin Thin Small Outline Package (TSOP)
8x20mm
• 28-pin Very Small Outline Package (VSOP)
8x13.4mm
• Available for Extended Temperature Ranges:
- Commercial: 0˚C to +70˚C
- Industrial: -40˚C to +85˚C
PACKAGE TYPES
32
Vcc
31
WE
18
19
4
A7
3
NC
2
NC
1
NU
• Pin 1 indicator on PLCC on top of package
OE
NC
A9
A8
NC
WE
Vcc
NC
NC
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
OE
NC
A9
A8
NC
WE
V
CC
NC
NC
A7
A6
A5
A4
A3
22
23
24
25
26
27
28
1
2
3
4
5
6
7
I/O1
I/O2
Vss
NU
I/O3
I/O4
I/O5
28
27
26
25
24
23
22
21
20
19
18
17
16
15
21
20
19
18
17
16
15
14
13
12
11
10
9
8
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
V
SS
I/O2
I/O1
I/O0
A0
A1
A2
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
•1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A8
A6
A9
A5
WE
A4
OE
A3
A10
A2
CE
A1
I/O7 A0
I/O6 NC
I/O5 I/O0
I/O4
I/O3
30
NC
29
A8
28
A9
27
NC
26
NC
25
OE
24
A10
23
CE
22
I/O7
21
I/O6
20
5
6
7
PLCC
8
9
10
11
12
13
14
15
16
17
DESCRIPTION
The Microchip Technology Inc. 28C16A is a CMOS 16K
non-volatile electrically Erasable PROM. The 28C16A
is accessed like a static RAM for the read or write
cycles without the need of external components. Dur-
ing a “byte write”, the address and data are latched
internally, freeing the microprocessor address and data
bus for other operations. Following the initiation of
write cycle, the device will go to a busy state and auto-
matically clear and write the latched data using an
internal control timer. To determine when a write cycle
is complete, the 28C16A uses Data polling. Data poll-
ing allows the user to read the location last written to
when the write operation is complete. CMOS design
and processing enables this part to be used in systems
where reduced power consumption and reliability are
required. A complete family of packages is offered to
provide the utmost flexibility in applications.
BLOCK DIAGRAM
I/O0
I/O7
DIP
A10
CE
I/07
I/06
I/05
I/04
I/03
Vss
I/02
I/01
I/00
A0
A1
A2
TSOP
VSOP
V
SS
V
CC
CE
OE
WE
Data Protection
Circuitry
Chip Enable/
Output Enable
Control Logic
Auto Erase/Write
Timing
Data
Poll
Input/Output
Buffers
Program Voltage
Generation
A0
L
a
t
c
h
e
s
A10
Y
Decoder
Y Gating
X
Decoder
16K bit
Cell Matrix
©
1996 Microchip Technology Inc.
DS11125G-page 1
This document was created with FrameMaker 4 0 4
28C16A
1.0
1.1
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS*
TABLE 1-1:
Name
A0 - A10
CE
OE
WE
I/O0 - I/O7
V
CC
V
SS
NC
NU
PIN FUNCTION TABLE
Function
Address Inputs
Chip Enable
Output Enable
Write Enable
Data Inputs/Outputs
+5V Power Supply
Ground
No Connect; No Internal Connection
Not Used; No External Connection is
Allowed
V
CC
and input voltages w.r.t. V
SS
....... -0.6V to + 6.25V
Voltage on OE w.r.t. V
SS
..................... -0.6V to +13.5V
Voltage on A9 w.r.t. V
SS
...................... -0.6V to +13.5V
Output Voltage w.r.t. V
SS
................ -0.6V to V
CC
+0.6V
Storage temperature .......................... -65˚C to +125˚C
Ambient temp. with power applied ....... -50˚C to +95˚C
*Notice:
Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
TABLE 1-2:
READ/WRITE OPERATION DC CHARACTERISTICS
V
CC
= +5V
±
10%
Commercial (C): Tamb = 0˚C
to
Industrial
(I): Tamb = -40˚C to
+70˚C
+85˚C
Conditions
Parameter
Input Voltages
Input Leakage
Input Capacitance
Output Voltages
Output Leakage
Output Capacitance
Power Supply Current,
Active
Power Supply Current,
Standby
Note 1:
Status
Logic ‘1’
Logic ‘0;
—
—
Logic ‘1’
Logic ‘0’
—
—
TTL input
TTL input
TTL input
CMOS input
Symbol
V
IH
V
IL
I
LI
C
IN
V
OH
V
OL
I
LO
C
OUT
I
CC
I
CC
(
S
)
TTL
I
CC
(
S
)
TTL
I
CC
(
S
)
CMOS
Min
2.0
-0.1
-10
—
2.4
Max
V
CC
+1
0.8
10
10
Units
V
V
µ
A
pF
V
V
µ
A
pF
mA
mA
mA
µ
A
V
IN
= -0.1V to V
CC
+1
V
IN
= 0V; Tamb = 25˚C;
f = 1 MHz
I
OH
= -400
µ
A
I
OL
= 2.1 mA
V
OUT
= -0.1V to V
CC
+0.1V
V
IN
= 0V; Tamb = 25˚C;
f = 1 MHz
f = 5 MHz (Note 1)
V
CC
= 5.5V;
CE = V
IH
(0˚C to +70˚C)
CE = V
IH
(-40˚C to +85˚C)
CE = V
CC
-0.3 to V
CC
+1
0.45
-10
—
—
—
10
12
30
2
3
100
AC power supply current above 5 MHz; 1 mA/MHz.
DS11125G-page 2
©
1996 Microchip Technology Inc.
28C16A
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise and Fall Times:
Ambient Temperature:
28C16A-15
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE High to Output Float
Output Hold from CE or OE,
whichever occurs first
Endurance
Sym
Min
t
ACC
t
CE
t
OE
t
OFF
t
OH
—
—
—
—
0
0
1M
Max
150
150
70
50
—
—
Min
—
—
—
0
0
1M
Max
200
200
80
55
—
—
Min
—
—
—
0
0
1M
Max
250
250
100
70
—
—
ns
ns
ns
ns
ns
cycles 25
°
C, Vcc =
5.0V, Block
Mode (Note)
OE = CE = V
IL
OE = V
IL
CE = V
IL
V
IH
= 2.4V; V
IL
= 0.45V; V
OH
= 2.0V; Vol = 0.8V
1 TTL Load + 100pF
20 ns
Commercial (C): Tamb = 0˚C to +70˚0˚C
Industrial (I):
Tamb = -40˚C to +85˚C
28C16A-20
28C16A-25
Units
Conditions
Note: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-1:
READ WAVEFORMS
V
IH
Address
V
IL
V
IH
CE
V
IL
t
CE(2)
Address Valid
V
IH
OE
V
IL
V
OH
Data
V
OL
WE
V
IH
V
IL
Notes: (1) t
OFF
is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
(3) This parameter is sampled and is not 100% tested
t
ACC
t
OFF(1,3)
t
OE(2)
High Z
t
OH
Valid Output
High Z
©
1996 Microchip Technology Inc.
DS11125G-page 3
28C16A
TABLE 1-4:
BYTE WRITE AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise/Fall Times:
Ambient Temperature:
Parameter
Address Set-Up Time
Address Hold Time
Data Set-Up Time
Data Hold Time
Write Pulse Width
Write Pulse High Time
OE Hold Time
OE Set-Up Time
Data Valid Time
Write Cycle Time (28C16A)
Write Cycle Time (28C16AF)
Symbol
t
AS
t
AH
t
DS
t
DH
t
WPL
t
WPH
t
OEH
t
OES
t
DV
t
WC
t
WC
Min
10
50
50
10
100
50
10
10
—
—
—
V
IH
= 2.4V and V
IL
= 0.45V; V
OH
= 2.0V; V
OL
= 0.8V
1 TTL Load + 100 pF
20 ns
Commercial (C):
Tamb = 0˚C to +70˚C
Industrial
(I):
Tamb = -40˚C to +85˚C
Max
—
—
—
—
—
—
—
—
1000
1
200
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
µ
s
Note 2
0.5 ms typical
100
µ
s typical
Note 1
Remarks
Note 1: A write cycle can be initiated be CE or WE going low, whichever occurs last. The data is latched on the pos-
itive edge of CE or WE, whichever occurs first.
2: Data must be valid within 1000ns max. after a write cycle is initiated and must be stable at least until t
DH
after the positive edge of WE or CE, whichever occurs first.
FIGURE 1-2:
PROGRAMMING WAVEFORMS
V
IH
Address
V
IL
V
IH
CE, WE
V
IL
t
DV
Data In
V
IH
V
IL
t
OES
V
IH
OE
V
IL
t
OEH
t
DS
t
AS
t
AH
t
WPL
t
DH
DS11125G-page 4
©
1996 Microchip Technology Inc.
28C16A
FIGURE 1-3:
DATA POLLING WAVEFORMS
V
IH
Address
V
IL
Address Valid
t
ACC
t
CE
t
WPH
Last Written
Address Valid
V
IH
CE
V
IL
V
IH
WE
V
IL
t
WPL
t
OE
V
IH
OE
V
IL
t
DV
V
IH
Data
V
IL
Data In
Valid
t
WC
I/O7 Out
True Data Out
FIGURE 1-4:
CHIP CLEAR WAVEFORMS
V
IH
CE
V
IL
V
H
OE
V
IH
V
IH
WE
V
IL
t
W
= 10ms
t
S
= t
H
= 1µs
V
H
= 12.0V
±0.5V
t
S
t
W
t
H
TABLE 1-5:
Mode
Chip Clear
Extra Row Read
Extra Row Write
SUPPLEMENTARY CONTROL
CE
V
IL
V
IL
*
OE
V
H
V
IL
V
IH
WE
V
IL
V
IH
*
A9
X
A9 = V
H
A9 = V
H
V
CC
V
CC
V
CC
V
CC
Data Out
Data In
I/O
I
Note 1: V
H
= 12.0V
±
0.5V
* Pulsed per programming waveforms.
©
1996 Microchip Technology Inc.
DS11125G-page 5
