Vcc
OUT
15
ECL 3-Bit
Schematic
P2
10
P3
9
3-Bit Programmable Delay Modules
PECL3 Series
10K ECL Logic
3PECLH Series
10K
H ECL Logic
Available in Surface Mount
Electrical Specifications at 25
O
C
3Bit 10K ECL
3-Bit 10KH ECL
DIP Part Number DIP Part Number
"000"=3±0.5ns ** "000"=1.5±.5ns **
16
Output
Buffer
3-Bit Programmable
Delay Line
1
Vcc
2
E
6
IN
7
8
P1 Vee
_
ENABLE
input E , Pin 2, is active low.
Output is disabled (low) when Pin 2 is logic high.
Delay per
Step (ns)
0.5 ± .25
0.75 ± .3
1.0 ± .4
1.25 ± .5
1.5 ± .5
2.0 ± .7
2.5 ± .7
3.0 ± .7
5.0 ± 1.0
10.0 ± 1.5
Error ref.
to "000"
(ns)
± .30
± .50
± .50
± .70
± .70
± .80
± .90
± 1.0
± 1.5
± 3.0
Referenced to "000" - Delay (ns) per Program Setting (P3*P2*P1)
000
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
0.0
001
0.5
0.75
1.0
1.25
1.5
2.0
2.5
3.0
5.0
10.0
010
1.0
1.50
2.0
2.50
3.0
4.0
5.0
6.0
10.0
20.0
011
1.5
2.25
3.0
3.75
4.5
6.0
7.5
9.0
15.0
30.0
100
2.0
3.00
4.0
5.00
6.0
8.0
10.0
12.0
20.0
40.0
101
2.5
3.75
5.0
6.25
7.5
10.0
12.5
15.0
25.0
50.0
110
3.0
4.50
6.0
7.50
9.0
12.0
15.0
18.0
30.0
60.0
111
3.5
5.25
7.0
8.75
10.5
14.0
17.5
21.0
35.0
70.0
PECL3-0.5
PECL3-0.75
PECL3-1
PECL3-1.25
PECL3-1.5
PECL3-2
PECL3-2.5
PECL3-3
PECL3-5
PECL3-10
3PECLH-0.5
3PECLH0.75
3PECLH-1
3PECLH1.25
3PECLH-1.5
3PECLH-2
3PECLH-2.5
3PECLH-3
3PECLH-5
3PECLH-10
** INITIAL DELAY & CUMULATIVE TOLERANCES:
"Error" Tolerance is for Programmed Delays Referenced to Initial Delay, Setting "000."
For example, the setting "111" delay of PECL3-2 is 14.0
±
0.8 ns ref. to "000," and 17.0
±
1.3 ns referenced to the input,
and the setting "111" delay of 3PECLH-2 is 14.0
±
0.8 ns ref. to "000," and 15.5
±
1.3 ns referenced to the input.
INPUT LOADING:
Input, Pin 6, internally connected to eight ECL
gate inputs terminated by Thevenin equivalent of 100 Ohms to -2V.
Dimensions in Inches (mm)
OPERATING SPECIFICATIONS
(10K, PECL3)
V
EE
Supply Voltage ........................................... -5.20
±
0.25VDC
I
EE
Supply Current ............................................... 60 mA typical
Logic “1” Input:
V
IH
................................................. -.98V min.
I
IH
.............................................. 265
µA
max.
I
IH
(Pin 6) * ................................... -11mA typ.
Logic “0” Input:
V
IL
.............................................. -1.63V max.
I
IL
................................................ 0.5
µA
min.
I
IL
(Pin 6) * ...................................... -2mA typ.
V
OH
Logic “1” Voltage Out ......................................... -.96V min.
V
OL
Logic “0” Voltage Out ....................................... -1.65V max.
P
WI
Input Pulse Width .......................... 40% of Max. Delay min.
Operating Temp. Range (10K, PECL3) ................... -30 to +85
O
C
Storage Temperature Range ................................ -65 to +150
O
C
.810
(20.57)
MAX.
.400
(10.16)
MAX.
.260 .300
(6.60) (7.62)
TYP. MAX.
.120
(3.05)
MIN.
.010
(0.25)
TYP.
.020
(0.51)
TYP.
.050 .100
(1.27) (2.54)
TYP.
TYP.
.300
(7.62)
OPERATING SPECIFICATIONS
(10KH, 3PECLH)
V
EE
Supply Voltage ........................................... -5.20
±
0.25VDC
I
EE
Supply Current ............................................... 75 mA typical
Logic “1” Input:
V
IH
................................................. -.98V min.
I
IH
.............................................. 320
µA
max.
I
IH
(Pin 6) * ................................... -11mA typ.
Logic “0” Input:
V
IL
.............................................. -1.63V max.
I
IL
................................................ 0.7
µA
min.
I
IL
(Pin 6) * ...................................... -2mA typ.
V
OH
Logic “1” Voltage Out ......................................... -.96V min.
V
OL
Logic “0” Voltage Out ....................................... -1.65V max.
P
WI
Input Pulse Width .......................... 40% of Max. Delay min.
Operating Temp. Range (10KH, 3PECLH) ................ -0 to +75
O
C
Storage Temperature Range ................................ -65 to +150
O
C
* Refer to Input (Pin 6) Loading note above.
16-Pin SMD Pkg. Unused leads are NOT removed.
To Specify SMD Package, Add "H" Suffix to P/N
Examples: PECL3-1.25H, 3PECLH-2H
.895
(22.73)
MAX.
.590
(14.99)
MAX.
.295
(7.49)
MAX.
.020
(0.51)
TYP.
.045
(1.14)
TYP.
.100
(2.54)
TYP.
.010
(0.25)
.070
(1.78)
.815
(20.70)
.010
(0.25)
TYP.
6SHFLILFDWLRQV VXEMHFW WR FKDQJH ZLWKRXW QRWLFH
www.rhombus-ind.com
UKRPEXV LQGXVWULHV LQF
)RU RWKHU YDOXHV &XVWRP 'HVLJQV FRQWDFW IDFWRU\
sales@rhombus-ind.com
27
TEL: (714) 898-0960
FAX: (714) 896-0971
PECL3-H 2001-02
FPGA/CPLD