Standard Products
PWM5031 / PWM5032 RadHard High Speed PWM Controller
www.aeroflex.com/RadHard
November 3, 2008
FEATURES
❑
Radiation hardness:
- Total dose 1MRad(Si)
- Single event latchup (SEL) immune to 100MeV-cm
2
/mg
- Single event upset (SEU) 20MeV-cm
2
/mg
(Upsets found were benign and non-stressful to the PWM or supporting electronic components)
CMOS low power design
Sleep & enable control lines
Optimized for applications: buck, boost, flyback, forward and center tapped push-pull converters
Supports current mode or voltage mode operations
Selectable 50% / 100% duty cycle
Under-Voltage lockout with hysteresis
Dual ±1Amp peak totem pole outputs
1 MHz maximum – user selectable
Low RO error amp
Auxiliary op amp with shut down pin
Power OK indicator
PWM5034 - Same as PMW5032 except straight leads
Designed for commercial, industrial and aerospace applications
Ceramic 24-lead, hermetic package, .6L x .3W x .13H
- PWM5031/5032 Gull Wing leads
- PWM5034 Straight leads
- Weight: 1.2 g max
- Contact factory for die availability
Evaluation board available for test and evaluation. See Aeroflex Application Note AN5031-1
DSCC SMD: 5962-06251 approved
NOTE: Aeroflex Plainview does not currently have a DSCC Certified Radiation Hardened Assurance Program
Developed in Partnership with JHU/APL and the Technology Application Group for the
Mars Technology Program; Part of NASA’s Mars Exploration Program
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OVERVIEW AND GENERAL OPERATION
The chip is a fixed frequency Pulse Width Modulator based on the industry standard UC1843x Series with significant
enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide
variety of converter topologies.
Radiation hardened by design techniques ensure the chip’s outstanding radiation tolerance (>1MRads) while reducing operating
current by more than an order of magnitude over comparable parts.
The PWM5031 provides an under voltage lockout feature with hysteresis that also provides an output to indicate Power is OK.
An input called Sleep is used to power down the entire chip, the Enable input is used to shut down the Oscillator / Output Drives,
and the Soft input drives the Output to zero. There is also a signal input called ENAUX that is used to disable the output to the
auxiliary op-amp.
The dual output drivers are designed using a Totem Pole output capable of sinking and sourcing 50mA constant current and peak
currents up to 1 Amp to support a large variety of Power MOSFETs.
Additional features that boost the appeal and utility of the part are:
◆
Dual break-before-make Totem Pole output stage is employed that virtually eliminates cross conduction and current shoot
through
◆
Logic level input that allows the user to select either 50% or 100% maximum duty cycle operation
◆
Improved oscillator stage that vastly increases waveform linearity and reduces output voltage error
◆
Uncommitted on-board op-amp which can be used for signal conditioning, pulse feedback, or any other user defined
purpose
SCD5031 Rev L
VREF
11
VCC
1,24
PWROK SLEEP
10
3
EN
17
50%
2
DRVP
22,23
Undervoltage
Lockout
OUTA
Reference
Internal Bias
Internal Enable /
Shutdown Control
8
9
Logic & Control
Functions
Duty Cycle
Limiting
(50% or 100%)
Oscillator
Output
Drive
21
Cset
Rset
SOFT
Comp
7
4
2.5V
2R
5
1.4V
Error Amp
R
VFB
Current Sense
Comparators
S
R
Q
Q
OUTB
20
Isense 6
Uncommited
Op-Amp
1V
12
VEE
15
AOUT
16
14
ENAUX PIN
13
NIN
18,19
DRVN
FIGURE 1 – Block Diagram
SCD5031 Rev L 11/3/08
Aeroflex Plainview
2
PWM5031 PWM PIN DESCRIPTION
PIN #
1
24
2
SIGNAL NAME
VCC
50%
Logic Power
Input selects maximum duty cycle (50% or 100%). Logic ''1'' selects 50% max duty cycle
and Output B is the complement of Output A. Logic ''0'' selects 100% and Output A is
in-phase with Output B.
This Input shuts down all functions on chip when asserted (Active Hi)
Output of the error amplifier. Place compensation network from this pin to V
FB
to stabilize
converter.
Negative Input to the error amplifier
Input Current sense pin used for current mode control
This High impedance Input is used to limit the error amplifier output voltage. Applying an
RC circuit to this pin provides the standard softstart function. Pull the pin to ground to force
zero duty cycle. This input is internally shorted to ground when Enable (pin 17) is low or
Sleep (pin 3) is high or an Under Voltage is detected.
Works with Rset to establish oscillator free running frequency. Place cap from this Input pin
to ground. Can synchronize oscillator by overdriving this pin with an external frequency
source.
Works with Cset to establish oscillator free running frequency. Place resistor from this Input
pin to ground.
Logical output of UV lockout circuit -- logic ''1'' indicates chip has valid Vcc
Buffered 3V Output reference voltage
Logic Ground
Auxiliary Op-Amp Inverting Input
Auxiliary Op-Amp Non-Inverting Input
Auxiliary Op-Amp Output (Short circuit protected)
Input Enable of Auxiliary Op-Amp (Active Hi)
Logic Input that enables the oscillator and output drivers. Reference voltage remains valid
(Active Hi).
Output stage negative rail
Totem pole Output B
Totem pole Output A
Output stage positive rail
FUNCTION DESCRIPTION
3
4
SLEEP
COMP
5
6
7
VFB
ISENSE
SOFT
8
CSET
9
RSET
10
11
12
13
14
15
16
17
PWROK
VREF
VEE
NIN
PIN
AOUT
ENAUX
EN
18
19
20
21
22
23
DRVN
OUT B
OUTA
DRVP
SCD5031 Rev L 11/3/08
Aeroflex Plainview
3
ABSOLUTE MAXIMUM RATINGS
1, 4
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
V
CC
Supply Voltage
DRVP Supply Voltage
Steady State Output Current
Peak Output Current (Internally Limited)
Analog Inputs (Pins 5, 6, 13, 14)
Power Dissipation at T
A
= +25°C
ESD Rating Note 2
Lead Temperature (soldering, 10 seconds)
-55°C to +125°C
+135°C
-65°C to +150°C
7.0V
DC
7.0V
DC
14.0V
DC
±50mA
±1.0A
V
EE
- 0.5V to V
CC
+ 0.5V
500mW
450V
300°C
PWM5031
PWM5032
NOTICE: Stresses above those listed under "Absolute Maximums Rating" may cause permanent damage to the device. These are stress rating only;
functional operation beyond the "Operation Conditions" is not recommended and extended exposure beyond the "Operation Conditions"
may effect device reliability.
OPERATING CONDITIONS
PARAMETER
DC Operating Voltage
Quiescent Current
PWM5031
PWM5032
PWM5031
PWM5032
CONDITION
-
SLEEP @ '0'; EN & ENAUX
@ '1': No loads on Outputs
PWROK, AOUT and VREF
-
1, 4
SYMBOL
V
CC
I
CC
MIN
4.5
-
-
TYP
5.0
-
-
-
-
-
-
-
-
MAX
5.5
5.8
7.1
5.0
12.0
-
50
6.0
20
UNIT
V
mA
mA
V
V
%
%
°C/W
µA
Output Drive Voltage
Output Duty Cycle – Maximum
50% Pin = Logic 0
50% Pin = Logic 1
Thermal Resistance T
JC
Sleep Mode
DRVP
-
-
97*
-
-
-
100% Duty Cycle
50% Duty Cycle
-
-
-
-
-
I
CCS
*
Dependent on Value of C
SET
& Operating Frequency
ELECTRICAL CHARACTERISTICS
PARAMETER
Reference Section
Reference Voltage
Line Regulation
Load Regulation
Thermal Regulation
Output Short Circuit
Oscillator Section
Initial Accuracy Range
Frequency Range
Frequency Stability (Part to Part)
Temperature Stability
R
SET
Range
C
SET
Range
SCD5031 Rev L 11/3/08
1, 4
4.5 V < Vcc < 5.5V, -55°C < T
A
< +125°C, unless otherwise specified
TEST CONDITIONS
T
A
= 25°C, I
O
= -1 mA
0 < I
O
< 3 mA Note 3
Note 3
PWM5031
PWM5032
Note 3
MIN
3.00
-
-
-
-
208.5
190
20
-
TYP
3.05
±.1
±.05
±1
-
212
210
-
±1.5
±0.5
-
-
MAX
3.10
±.12
±.075
±1.6
-40
219
230
1,000
±2.5
±1
-
600
UNITS
V
%
%
%
mA
KHz
KHz
KHz
%
%
KΩ
pF
T
MIN
< T
A
< T
MAX
, Note 3
Note 3
-
50
-
Aeroflex Plainview
4
ELECTRICAL CHARACTERISTICS
PARAMETER
Error Amp Section
Input Offset Voltage
Input Common Mode Voltage Range
Input Bias Current
Open Loop Voltage Gain (AVOL)
Unity Gain Bandwidth
Power Supply Rejection Ratio (PSRR)
Output Sink Current
Output Source Current
V
OUT
High (Limited by V
SOFT
)
V
OUT
Low
Gain (V
COMP
/VI
SENSE
)
Current Sense Section
Input Offset Voltage
Common Mode Input Voltage
Input Bias Current
I
SENSE
to Output Delay
Output Section
Output Low Level
I
SINK
= 1.0mA
I
SINK
= 50mA PWM5031
I
SINK
= 50mA PWM5032
Output High Level-PWM5031
I
SOURCE
= 1.0mA, DRVP = 5V
I
SOURCE
= 50mA, DRVP = 5V
Output High Level-PWM5032
I
SOURCE
= 1.0mA, DRVP = 12V
I
SOURCE
= 50mA, DRVP = 12V
Peak Output Current
Steady State Output Current
Rise Time
Fall Time
Enable Output Off Delay
Sleep Output Off Delay
Under Voltage Output Off Delay
T
A
=
25°C
,
C
L
=
20pF, DRVP = 5V
Note 3
Note 3
Note 3
Note 3
V
SOFT
= 5V, Note 3 & 4
Note 3
V
FB
= 3.0V, V
SOFT
= 1.1V, Note 3
V
FB
= 2.0V, V
SOFT
= 5V, Note 3
V
FB
= 2.0V, R
L
= 15K to GND
V
FB
= 3.0V, R
L
= 15K to +5V
Note 3
Note 3
TEST CONDITIONS
1, 4
con’t
MIN
-
TYP
-
-
-
-
2.0
-
-
-
-
-
3
MAX
3.3
V
CC
- 0.2
-1.0
-
-
-
+10
-28
-
V
EE
+ 0.2
3.15
UNITS
mV
V
µA
dB
MHz
dB
mA
mA
V
V
V/V
4.5 V < Vcc < 5.5V, -55°C < T
A
< +125°C, unless otherwise specified
V
EE
+ 0.2
-
100
1.0
60
-
-
V
SOFT
-
0.2
-
2.85
-
0.1
-
-
-
-
-
80
3.3
1.0
1.0
100
mV
V
µA
ns
-
-
-
4.9
4.6
11.9
11.4
±1.0
-
-
-
-
-
-
-
-
-
-
-
-
-
±1.35
-
8
6
-
-
-
0.1
0.25
0.6
-
-
-
-
-
50
18
28
100
100
100
V
V
V
V
V
V
V
A
mA
ns
ns
ns
ns
ns
SCD5031 Rev L 11/3/08
Aeroflex Plainview
5
