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5962-9223703MSA

Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20

器件类别:逻辑    逻辑   

厂商名称:e2v technologies

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器件参数
参数名称
属性值
零件包装代码
DFP
包装说明
DFP, FL20,.3
针数
20
Reach Compliance Code
compliant
其他特性
WITH DUAL OUTPUT ENABLE
控制类型
ENABLE LOW
系列
FCT
JESD-30 代码
R-GDFP-F20
JESD-609代码
e0
负载电容(CL)
50 pF
逻辑集成电路类型
BUS DRIVER
最大I(ol)
0.048 A
位数
8
功能数量
1
端口数量
2
端子数量
20
最高工作温度
125 °C
最低工作温度
-55 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
CERAMIC, GLASS-SEALED
封装代码
DFP
封装等效代码
FL20,.3
封装形状
RECTANGULAR
封装形式
FLATPACK
电源
5 V
Prop。Delay @ Nom-Sup
5.1 ns
传播延迟(tpd)
5.1 ns
认证状态
Qualified
筛选级别
MIL-STD-883
座面最大高度
2.3368 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
TIN LEAD
端子形式
FLAT
端子节距
1.27 mm
端子位置
DUAL
宽度
6.9215 mm
Base Number Matches
1
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REVISIONS
LTR
A
DESCRIPTION
Change is in accordance with the notice of revision 5962-R177-93. – mbk
Change is in accordance with the notice of revision 5962-R099-94. – tvn
Update the boilerplate to current requirements as specified in MIL-PRF-38535.
Editorial changes throughout. – jak
Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. -
LTG
DATE (YR-MO-DA)
93-06-18
94-03-09
06-12-11
13-05-16
APPROVED
Michael A. Frye
Monica L. Poelking
Thomas M. Hess
Thomas M. Hess
B
C
D
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
D
15
D
16
D
17
REV
SHEET
PREPARED BY
Joseph A. Kerby
CHECKED BY
Thomas J. Ricciuti
APPROVED BY
Monica L. Poelking
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
DRAWING APPROVAL DATE
93-03-26
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
8
D
9
D
10
D
11
D
12
D
13
D
14
STANDARD
MICROCIRCUIT
DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
MICROCIRCUIT, DIGITAL, FAST CMOS,
OCTAL BUFFER/LINE DRIVER WITH THREE-
STATE OUTPUTS, TTL COMPATIBLE INPUTS
AND LIMITED OUTPUT VOLTAGE SWING,
MONOLITHIC SILICON
SIZE
CAGE CODE
REVISION LEVEL
D
DSCC FORM 2233
APR 97
A
67268
SHEET
1 OF 17
5962-92237
5962-E381-13
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following example:
5962
-
92237
01
M
R
A
Federal
stock class
designator
\
RHA
designator
(see 1.2.1)
/
Device
type
(see 1.2.2)
Device
class
designator
(see 1.2.3)
Case
outline
(see 1.2.4)
Lead
finish
(see 1.2.5)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type
01, 02
Generic number
54FCT541T
Circuit function
Octal buffer/line driver with three-state outputs,
TTL compatible inputs and limited output voltage swing
Octal buffer/line driver with three-state outputs,
TTL compatible inputs and limited output voltage swing
Octal buffer/line driver with three-state outputs,
TTL compatible inputs and limited output voltage swing
03, 04
54FCT541AT
05, 06
54FCT541CT
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as
follows:
Device class
M
Device requirements documentation
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-
JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Certification and qualification to MIL-PRF-38535
Q or V
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter
R
S
2
Descriptive designator
GDIP1-T20 or CDIP2-T20
GDFP2-F20 or CDFP3-F20
CQCC1-N20
Terminals
20
20
20
Package style
Dual-in-line
Flat pack
Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535,
appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-92237
SHEET
D
2
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (V
CC
) ...........................................................................
DC input voltage range (V
IN
) .........................................................................
DC output voltage range (V
OUT
) ....................................................................
DC input clamp current (I
IK
) (V
IN
= -0.5 V) ....................................................
DC output clamp current (I
OK
) (V
OUT
= -0.5V and +7.0 V) .............................
DC output source current (per output) (I
OH
) ..................................................
DC output sink current (per output) (I
OL
) .......................................................
DC V
CC
current (I
CC
) .....................................................................................
DC GND current (I
GND
) .................................................................................
Storage temperature range (T
STG
) ................................................................
Case temperature range under bias (T
BIAS
) ..................................................
Maximum power dissipation (P
D
) ..................................................................
Lead temperature (soldering, 10 seconds) ...................................................
Thermal resistance, junction-to-case (θ
JC
) ....................................................
Junction temperature (T
J
) .............................................................................
1.4 Recommended operating conditions 2/ 3/
Supply voltage range (V
CC
) ...........................................................................
Input voltage range (V
IN
) ...............................................................................
Output voltage range (V
OUT
)..........................................................................
Maximum low level input voltage (V
IL
)...........................................................
Minimum high level input voltage (V
IH
) ..........................................................
Case operating temperature range (T
C
) ........................................................
Maximum input rise or fall rate (t
r
, t
f
):
(from V
IN
= 0.3 V to 2.7 V, 2.7 V to 0.3 V) ..................................................
Maximum high level output current (I
OH
):
Devices 01, 03, and 05 ...............................................................................
Devices 02, 04, and 06 ...............................................................................
Maximum low level output current (I
OL
) .........................................................
+4.5 V dc to +5.5 V dc
0.0 V to V
CC
0.0 V to V
CC
0.8 V
2.0 V
-55°C to +125°C
5 ns/V
-6 mA
-12 mA
48 mA
-0.5 V dc to +7.0 V dc
-0.5 V dc to V
CC
+ 0.5 V dc 4/
-0.5 V dc to V
CC
+ 0.5 V dc 4/
-20 mA
±20
mA
-30 mA
+70 mA
±260
mA
+550 mA
-65°C to +150°C
-65°C to +135°C
500 mW
+300°C
See MIL-STD-1835
+175°C
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Unless otherwise noted, all voltages are referenced to GND.
3/ The limits for the parameters specified shall apply over the full specified V
CC
range and case temperature range of
-55°C to +125°C.
4/ For V
CC
≥ 6.5 V, the upper limit on the range is limited to 7.0 V.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-92237
SHEET
D
3
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the
solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 -
MIL-STD-1835 -
Test Method Standard Microcircuits.
Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 -
MIL-HDBK-780 -
List of Standard Microcircuit Drawings.
Standard Microcircuit Drawings.
(Copies of these documents are available online at
http://quicksearch.dla.mil
or from the Standardization Document Order
Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).
2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text
of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a
specific exemption has been obtained.
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 as specified herein, or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be as specified on
figure 4.
3.2.6 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 5.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the
electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full
case operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical
tests for each subgroup are defined in table I.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-92237
SHEET
D
4
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be
in accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103
(see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source
of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of
MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of
product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime’s agent,
and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore
documentation shall be made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in
microcircuit group number 37 (see MIL-PRF-38535, appendix A).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
DSCC FORM 2234
APR 97
SIZE
A
REVISION LEVEL
5962-92237
SHEET
D
5
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参数对比
与5962-9223703MSA相近的元器件有:5962-9223705MSA、5962-9223701M2A、5962-9223703MRA、5962-9223701MRA、5962-9223701MSA、5962-9223705MRA、5962-9223705M2A、5962-9223703M2A。描述及对比如下:
型号 5962-9223703MSA 5962-9223705MSA 5962-9223701M2A 5962-9223703MRA 5962-9223701MRA 5962-9223701MSA 5962-9223705MRA 5962-9223705M2A 5962-9223703M2A
描述 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDFP20, CERPACK-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP20, 0.300 INCH, CERDIP-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20 Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CQCC20, CERAMIC, LCC-20
零件包装代码 DFP DFP QLCC DIP DIP DFP DIP QLCC QLCC
包装说明 DFP, FL20,.3 DFP, FL20,.3 QCCN, LCC20,.35SQ DIP, DIP20,.3 0.300 INCH, CERDIP-20 DFP, FL20,.3 DIP, DIP20,.3 QCCN, LCC20,.35SQ QCCN, LCC20,.35SQ
针数 20 20 20 20 20 20 20 20 20
Reach Compliance Code compliant compli compli compliant compliant compliant compliant compliant compliant
其他特性 WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE
控制类型 ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW ENABLE LOW
系列 FCT FCT FCT FCT FCT FCT FCT FCT FCT
JESD-30 代码 R-GDFP-F20 R-GDFP-F20 S-CQCC-N20 R-GDIP-T20 R-GDIP-T20 R-GDFP-F20 R-GDIP-T20 S-CQCC-N20 S-CQCC-N20
JESD-609代码 e0 e0 e0 e0 e0 e0 e0 e0 e0
负载电容(CL) 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF 50 pF
逻辑集成电路类型 BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
最大I(ol) 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A 0.048 A
位数 8 8 8 8 8 8 8 8 8
功能数量 1 1 1 1 1 1 1 1 1
端口数量 2 2 2 2 2 2 2 2 2
端子数量 20 20 20 20 20 20 20 20 20
最高工作温度 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C -55 °C
输出特性 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE TRUE
封装主体材料 CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
封装代码 DFP DFP QCCN DIP DIP DFP DIP QCCN QCCN
封装等效代码 FL20,.3 FL20,.3 LCC20,.35SQ DIP20,.3 DIP20,.3 FL20,.3 DIP20,.3 LCC20,.35SQ LCC20,.35SQ
封装形状 RECTANGULAR RECTANGULAR SQUARE RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR SQUARE SQUARE
封装形式 FLATPACK FLATPACK CHIP CARRIER IN-LINE IN-LINE FLATPACK IN-LINE CHIP CARRIER CHIP CARRIER
电源 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
传播延迟(tpd) 5.1 ns 4.6 ns 9 ns 5.1 ns 9 ns 9 ns 4.6 ns 4.6 ns 5.1 ns
认证状态 Qualified Qualified Qualified Qualified Qualified Qualified Qualified Qualified Qualified
筛选级别 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883 MIL-STD-883
座面最大高度 2.3368 mm 2.3368 mm 1.905 mm 5.08 mm 5.08 mm 2.3368 mm 5.08 mm 1.905 mm 1.905 mm
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES YES YES NO NO YES NO YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY MILITARY
端子面层 TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD TIN LEAD
端子形式 FLAT FLAT NO LEAD THROUGH-HOLE THROUGH-HOLE FLAT THROUGH-HOLE NO LEAD NO LEAD
端子节距 1.27 mm 1.27 mm 1.27 mm 2.54 mm 2.54 mm 1.27 mm 2.54 mm 1.27 mm 1.27 mm
端子位置 DUAL DUAL QUAD DUAL DUAL DUAL DUAL QUAD QUAD
宽度 6.9215 mm 6.9215 mm 8.89 mm 7.62 mm 7.62 mm 6.9215 mm 7.62 mm 8.89 mm 8.89 mm
Base Number Matches 1 1 1 1 1 1 1 1 1
Prop。Delay @ Nom-Sup 5.1 ns - - 5.1 ns 9 ns 9 ns 4.7 ns 4.7 ns 5.1 ns
长度 - - 8.89 mm 24.13 mm 24.13 mm - 24.13 mm 8.89 mm 8.89 mm
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