Specifications for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-303ARH and
HS-303BRH are contained in SMD 5962-95813. A “hot-link”
is provided from our website for downloading
Pinouts
HS1-303ARH, HS-303BRH (SBDIP), CDIP2-T14
TOP VIEW
NC
S3
D3
D1
S1
IN1
GND
1
2
3
4
5
6
7
14 V+
13 S4
12 D4
11 D2
10 S2
9 IN2
8 V-
HS9-303ARH, HS-303BRH (FLATPACK) CDFP3-F14
TOP VIEW
1
NC
S3
D3
D1
S1
IN1
GND
2
3
4
5
6
7
14
13
12
11
10
9
8
V+
S4
D4
D2
S2
IN2
V-
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
HS-303ARH, HS-303BRH
Ordering Information
ORDERING NUMBER
5962F9581304QCC
5962F9581304QXC
5962F9581304V9A
5962F9581304VCC
5962F9581304VXC
HS0-303ARH/SAMPLE
HS1-303ARH/PROTO
HS9-303ARH/PROTO
5962F9581305QCC
5962F9581305QXC
5962F9581305V9A
5962F9581305VCC
5962F9581305VXC
HS0-303BRH/SAMPLE
HS1-303BRH/PROTO
HS9-303BRH/PROTO
PART NUMBER
HS1-303ARH-8
HS9-303ARH-8
HS0-303ARH-Q
HS1-303ARH-Q
HS9-303ARH-Q
HS0-303ARH/SAMPLE
HS1-303ARH/PROTO
HS9-303ARH/PROTO
HS1-303BRH-8
HS9-303BRH-8
HS0-303BRH-Q
HS1-303BRH-Q
HS9-303BRH-Q
HS0-303BRH/SAMPLE
HS1-303BRH/PROTO
HS9-303BRH/PROTO
TEMP. RANGE
(°C)
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
-55 to +125
14 LD SBDIP
14 LD Flatpack
D14.3
K14.A
14 LD SBDIP
14 LD Flatpack
14 LD SBDIP
14 LD Flatpack
14 LD SBDIP
14 LD SBDIP
14 LD Flatpack
D14.3
K14.A
D14.3
K14.A
D14.3
D14.3
K14.A
PKG.
14 LD SBDIP
14 LD Flatpack
14 Ld SBDIP
14 LD SBDIP
14 LD Flatpack
PKG.
DWG. #
D14.3
K14.A
D14.3
D14.3
K14.A
2
FN6411.1
July 7, 2008
HS-303ARH, HS-303BRH
Functional Diagram
TRUTH TABLE
IN
N
P
D
LOGIC
0
1
SW1 AND SW2
OFF
ON
SW3 AND SW4
ON
OFF
Die Characteristics
DIE DIMENSIONS:
2690µm x 5200µm (106 milsx205 mils)
Thickness: 483µm
±
25.4µm (19 mils
±
1 mil)
INTERFACE MATERIALS:
Glassivation:
Type: PSG (Phosphorous Silicon Glass)
Thickness: 8.0kÅ
±
1.0kÅ
Top Metallization:
Type: AlSiCu
Thickness: 16.0kÅ
±
2kÅ
Substrate:
Radiation Hardened Silicon Gate,
Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential:
Unbiased (DI)
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 10
5
A/cm
2
Transistor Count:
196
Metallization Mask Layout
HS-303ARH, HS-303BRH
IN2
V-
V+
GND
IN1
D4
D2
S4
S2
S1
S3
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com