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5962F9683001VPC

1 CHANNEL, VIDEO AMPLIFIER, CDIP8, CERAMIC, DIP-8

器件类别:模拟混合信号IC    消费电路   

厂商名称:Renesas(瑞萨电子)

厂商官网:https://www.renesas.com/

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器件参数
参数名称
属性值
厂商名称
Renesas(瑞萨电子)
零件包装代码
DIP
包装说明
DIP,
针数
8
Reach Compliance Code
compliant
ECCN代码
USML XV(E)
标称带宽
360000 kHz
商用集成电路类型
VIDEO AMPLIFIER
JESD-30 代码
R-GDIP-T8
JESD-609代码
e4
信道数量
1
功能数量
1
端子数量
8
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
CERAMIC, GLASS-SEALED
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
认证状态
Not Qualified
筛选级别
MIL-PRF-38535 Class V
座面最大高度
5.08 mm
最大供电电压 (Vsup)
5 V
最小供电电压 (Vsup)
5 V
表面贴装
NO
技术
BIPOLAR
温度等级
MILITARY
端子面层
GOLD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
总剂量
300k Rad(Si) V
宽度
7.62 mm
文档预览
HS-1145RH
Data Sheet
August 1999
File Number
4227.1
Radiation Hardened, High Speed, Low
Power, Current Feedback Video
Operational Amplifier with Output Disable
The HS-1145RH is a high speed, low power current
feedback amplifier built with Intersil’s proprietary
complementary bipolar UHF-1 (DI bonded wafer) process.
These devices are QML approved and are processed and
screened in full compliance with MIL-PRF-38535.
This amplifier features a TTL/CMOS compatible disable
control, pin 8, which when pulled low, reduces the supply
current and forces the output into a high impedance state.
This allows easy implementation of simple, low power video
switching and routing systems. Component and composite
video systems also benefit from this op amp’s excellent gain
flatness, and good differential gain and phase specifications.
Multiplexed A/D applications will also find the HS-1145RH
useful as the A/D driver/multiplexer.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed here must be used when ordering.
Detailed Electrical Specifications for these devices are
contained in SMD 5962-96830. A “hot-link” is provided
on our homepage for downloading.
http://www.intersil.com/spacedefense/space.htm
Features
• Electrically Screened to SMD # 5962-96830
• QML Qualified per MIL-PRF-38535 Requirements
• Low Supply Current . . . . . . . . . . . . . . . . . . . . 5.9mA (Typ)
• Wide -3dB Bandwidth. . . . . . . . . . . . . . . . . .360MHz (Typ)
• High Slew Rate. . . . . . . . . . . . . . . . . . . . . .1000V/µs (Typ)
• Excellent Gain Flatness (to 50MHz). . . . . .
±0.07dB
(Typ)
• Excellent Differential Gain . . . . . . . . . . . . . . . 0.02% (Typ)
• Excellent Differential Phase . . . . . . . . 0.03 Degrees (Typ)
• High Output Current . . . . . . . . . . . . . . . . . . . .60mA (Typ)
• Output Enable/Disable Time . . . . . . . . . 180ns/35ns (Typ)
• Total Gamma Dose. . . . . . . . . . . . . . . . . . . . 300kRAD(Si)
• Latch Up . . . . . . . . . . . . . . . . . . . . . None (DI Technology)
Applications
• Multiplexed Flash A/D Driver
• RGB Multiplexers/Preamps
• Video Switching and Routing
• Pulse and Video Amplifiers
• Wideband Amplifiers
• RF/IF Signal Processing
Ordering Information
ORDERING NUMBER
5962F9683001VPA
5962F9683001VPC
INTERNAL
MKT. NUMBER
HS7-1145RH-Q
HS7B-1145RH-Q
TEMP. RANGE
(
o
C)
-55 to 125
-55 to 125
• Imaging Systems
Pinout
HS-1145RH
GDIP1-T8 (CERDIP)
OR CDIP2-T8 (SBDIP)
TOP VIEW
NC
-IN
+IN
V-
1
2
3
4
8
DISABLE
V+
OUT
NC
-
+
7
6
5
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
HS-1145RH
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth
dependency on closed loop gain isn’t as severe as that of a
voltage feedback amplifier, there can be an appreciable
decrease in bandwidth at higher gains. This decrease may
be minimized by taking advantage of the current feedback
amplifier’s unique relationship between bandwidth and R
F
.
All current feedback amplifiers require a feedback resistor,
even for unity gain applications, and R
F
, in conjunction with
the internal compensation capacitor, sets the dominant pole
of the frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to R
F
. The HS-1145RH design is
optimized for R
F
= 510Ω at a gain of +2. Decreasing R
F
decreases stability, resulting in excessive peaking and
overshoot (Note: Capacitive feedback will cause the same
problems due to the feedback impedance decrease at higher
frequencies). At higher gains, however, the amplifier is more
stable so R
F
can be decreased in a trade-off of stability for
bandwidth.
The table below lists recommended R
F
values for various
gains, and the expected bandwidth. For a gain of +1, a
resistor (
+
R
S
) in series with +IN is required to reduce gain
peaking and increase stability.
GAIN
(A
CL
)
-1
+1
+2
+5
+10
BANDWIDTH
(MHz)
300
270
330
300
130
Optional GND Pad (Die Use Only) for TTL
Compatibility
The die version of the HS-1145RH provides the user with a
GND pad for setting the disable circuitry GND reference.
With symmetrical supplies the GND pad may be left
unconnected, or tied directly to GND. If asymmetrical
supplies (e.g., +10V, 0V) are utilized, and TTL compatibility
is desired, die users must connect the GND pad to GND.
With an external GND, the DISABLE input is TTL compatible
regardless of supply voltage utilized.
Pulse Undershoot and Asymmetrical Slew Rates
The HS-1145RH utilizes a quasi-complementary output
stage to achieve high output current while minimizing
quiescent supply current. In this approach, a composite
device replaces the traditional PNP pulldown transistor. The
composite device switches modes after crossing 0V,
resulting in added distortion for signals swinging below
ground, and an increased undershoot on the negative
portion of the output waveform (See Figures 5, 8, and 11).
This undershoot isn’t present for small bipolar signals, or
large positive signals. Another artifact of the composite
device is asymmetrical slew rates for output signals with a
negative voltage component. The slew rate degrades as the
output signal crosses through 0V (See Figures 5, 8, and 11),
resulting in a slower overall negative slew rate. Positive only
signals have symmetrical slew rates as illustrated in the
large signal positive pulse response graphs (See Figures 4,
7, and 10).
R
F
(Ω)
425
510 (+RS = 510Ω)
510
200
180
PC Board Layout
This amplifier’s frequency response depends greatly on the
care taken in designing the PC board.
The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid
ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
(0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
device’s input and output connections. Capacitance,
parasitic or planned, connected to the output must be
minimized, or isolated as discussed in the next section.
Care must also be taken to minimize the capacitance to
ground at the amplifier’s inverting input (-IN), as this
capacitance causes gain peaking, pulse overshoot, and if
large enough, instability. To reduce this capacitance, the
designer should remove the ground plane under traces
connected to -IN, and keep connections to -IN as short as
possible.
An example of a good high frequency layout is the
Evaluation Board shown in Figure 2.
Non-Inverting Input Source Impedance
For best operation, the DC source impedance seen by the
non-inverting input should be
≥50Ω.
This is especially
important in inverting gain configurations where the non-
inverting input would normally be connected directly to GND.
DISABLE Input TTL Compatibility
The HS-1145RH derives an internal GND reference for the
digital circuitry as long as the power supplies are symmetrical
about GND. With symmetrical supplies the digital switching
threshold (V
TH
= (V
IH
+ V
IL
)/2 = (2.0 + 0.8)/2) is 1.4V, which
ensures the TTL compatibility of the DISABLE input. If
asymmetrical supplies (e.g., +10V, 0V) are utilized, the
switching threshold becomes:
V+
+
V-
V
TH
= ------------------- +
1.4V
2
and the V
IH
and V
IL
levels will be V
TH
±
0.6V, respectively.
2
HS-1145RH
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly
terminated transmission line will degrade the amplifier’s
phase margin resulting in frequency response peaking and
possible oscillations. In most cases, the oscillation can be
avoided by placing a resistor (R
S
) in series with the output
prior to the capacitance.
Figure 1 details starting points for the selection of this
resistor. The points on the curve indicate the R
S
and C
L
combinations for the optimum bandwidth, stability, and
settling time, but experimental fine tuning is recommended.
Picking a point above or to the right of the curve yields an
overdamped response, while points below or left of the curve
indicate areas of underdamped performance.
R
S
and C
L
form a low pass network at the output, thus
limiting system bandwidth well below the amplifier bandwidth
of 270MHz (for A
V
= +1). By decreasing R
S
as C
L
increases
(as illustrated in the curves), the maximum bandwidth is
obtained without sacrificing stability. In spite of this, the
bandwidth decreases as the load capacitance increases. For
example, at A
V
= +1, R
S
= 62Ω, C
L
= 40pF, the overall
bandwidth is limited to 180MHz, and bandwidth drops to
75MHz at A
V
= +1, R
S
= 8Ω, C
L
= 400pF.
50
SERIES OUTPUT RESISTANCE (Ω)
V
H
1
+IN
OUT
V
L
V-
GND
V+
FIGURE 2A. TOP LAYOUT
40
FIGURE 2B. BOTTOM LAYOUT
30
20
A
V
= +2
10
A
V
= +1
510
R
1
1
50Ω
2
3
4
10µF
0.1µF
-5V
510
V
H
8
7
0.1µF
50Ω
10µF
+5V
OUT
0
0
50
100
150
200
250
300
350
400
LOAD CAPACITANCE (pF)
IN
6
5
GND
GND
V
L
FIGURE 1. RECOMMENDED SERIES OUTPUT RESISTOR vs
LOAD CAPACITANCE
FIGURE 2C. SCHEMATIC
FIGURE 2. EVALUATION BOARD SCHEMATIC AND LAYOUT
Evaluation Board
The performance of the HS-1145RH may be evaluated using
the HFA11XX Evaluation Board.
The layout and schematic of the board are shown in Figure 2.
The V
H
connection may be used to exercise the DISABLE
pin, but note that this connection has no 50
termination. To
order evaluation boards (part number HFA11XXEVAL),
please contact your local sales office.
3
HS-1145RH
Typical Performance Curves
200
150
OUTPUT VOLTAGE (mV)
100
50
0
-50
-100
-150
-200
5ns/DIV.
A
V
= +1
+R
S
= 510Ω
V
SUPPLY
=
±5V,
R
F
= 510Ω, T
A
= 25
o
C, R
L
= 100Ω, Unless Otherwise Specified
3.0
2.5
OUTPUT VOLTAGE (V)
2.0
1.5
1.0
0.5
0
-0.5
-1.0
5ns/DIV.
A
V
= +1
+R
S
= 510Ω
FIGURE 3. SMALL SIGNAL PULSE RESPONSE
FIGURE 4. LARGE SIGNAL POSITIVE PULSE RESPONSE
2.0
1.5
OUTPUT VOLTAGE (V)
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
A
V
= +1
+R
S
= 510Ω
OUTPUT VOLTAGE (mV)
200
A
V
= +2
150
100
50
0
-50
-100
-150
-200
5ns/DIV.
5ns/DIV.
FIGURE 5. LARGE SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 6. SMALL SIGNAL PULSE RESPONSE
3.0
A
V
= +2
2.5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
2.0
1.5
1.0
0.5
0
-0.5
-1.0
5ns/DIV.
2.0
A
V
= +2
1.5
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
5ns/DIV.
FIGURE 7. LARGE SIGNAL POSITIVE PULSE RESPONSE
FIGURE 8. LARGE SIGNAL BIPOLAR PULSE RESPONSE
4
HS-1145RH
Typical Performance Curves
200
150
OUTPUT VOLTAGE (mV)
100
50
0
-50
-100
-150
-200
5ns/DIV.
A
V
= +10
R
F
= 180Ω
OUTPUT VOLTAGE (V)
V
SUPPLY
=
±5V,
R
F
= 510Ω, T
A
= 25
o
C, R
L
= 100Ω, Unless Otherwise Specified
(Continued)
3.0
2.5
2.0
1.5
1.0
0.5
0
-0.5
-1.0
5ns/DIV.
A
V
= +10
R
F
= 180Ω
FIGURE 9. SMALL SIGNAL PULSE RESPONSE
FIGURE 10. LARGE SIGNAL POSITIVE PULSE RESPONSE
2.0
1.5
OUTPUT VOLTAGE (V)
1.0
0.5
0
-0.5
-1.0
-1.5
-2.0
5ns/DIV.
0V
A
V
= +1, V
IN
= 1V
50ns/DIV.
OUT
400mV/DIV.
A
V
= +10
R
F
= 180Ω
DISABLE
800mV/DIV.
(0.4V to 2.4V)
FIGURE 11. LARGE SIGNAL BIPOLAR PULSE RESPONSE
FIGURE 12. OUTPUT ENABLE AND DISABLE RESPONSE
GAIN (dB)
3
0
-3
V
OUT
= 200mV
P-P
+R
S
= 510Ω (+1)
+R
S
= 0Ω (-1)
NORMALIZED GAIN (dB)
A
V
= +1
3
0
-3
A
V
= +10
A
V
= +5
A
V
= +2
NORMALIZED PHASE (DEGREES)
A
V
= -1
A
V
= +2
A
V
= -1
0
90
180
A
V
= +1
0.3
1
10
FREQUENCY (MHz)
100
500
270
V
OUT
= 200mV
P-P
R
F
= 510Ω (+2)
R
F
= 200Ω (+5)
R
F
= 180Ω (+10)
0.3
1
A
V
= +5
A
V
= +10
90
180
270
500
10
FREQUENCY (MHz)
100
FIGURE 13. FREQUENCY RESPONSE
FIGURE 14. FREQUENCY RESPONSE
5
PHASE (DEGREES)
0
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参数对比
与5962F9683001VPC相近的元器件有:HS7-1145RH-Q。描述及对比如下:
型号 5962F9683001VPC HS7-1145RH-Q
描述 1 CHANNEL, VIDEO AMPLIFIER, CDIP8, CERAMIC, DIP-8 HS7-1145RH-Q
厂商名称 Renesas(瑞萨电子) Renesas(瑞萨电子)
零件包装代码 DIP DIP
包装说明 DIP, DIP,
针数 8 8
Reach Compliance Code compliant not_compliant
JESD-30 代码 R-GDIP-T8 R-GDIP-T8
JESD-609代码 e4 e0
功能数量 1 1
端子数量 8 8
封装主体材料 CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
封装代码 DIP DIP
封装形状 RECTANGULAR RECTANGULAR
封装形式 IN-LINE IN-LINE
认证状态 Not Qualified Not Qualified
座面最大高度 5.08 mm 5.08 mm
表面贴装 NO NO
温度等级 MILITARY MILITARY
端子面层 GOLD Tin/Lead (Sn/Pb)
端子形式 THROUGH-HOLE THROUGH-HOLE
端子节距 2.54 mm 2.54 mm
端子位置 DUAL DUAL
宽度 7.62 mm 7.62 mm
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