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5PB1104CMGI/W

Clock Buffer 1.8V to 3.3V 1:4 LVCMOS 50ps 50fs

器件类别:逻辑    逻辑   

厂商名称:IDT (Integrated Device Technology)

器件标准:

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器件参数
参数名称
属性值
Brand Name
Integrated Device Technology
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
IDT (Integrated Device Technology)
零件包装代码
COL
包装说明
VSSOP,
针数
8
制造商包装代码
CMG8
Reach Compliance Code
compliant
Samacsys Description
COL 2 x 2mm
其他特性
IT ALSO OPERATES WITH 2.5V,3.3V
系列
5PB11
输入调节
STANDARD
JESD-30 代码
S-PDSO-G8
JESD-609代码
e3
长度
2 mm
逻辑集成电路类型
LOW SKEW CLOCK DRIVER
湿度敏感等级
1
功能数量
1
反相输出次数
端子数量
8
实输出次数
4
最高工作温度
105 °C
最低工作温度
-40 °C
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
VSSOP
封装形状
SQUARE
封装形式
SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度)
260
传播延迟(tpd)
2.9 ns
Same Edge Skew-Max(tskwd)
0.05 ns
座面最大高度
0.55 mm
最大供电电压 (Vsup)
3.465 V
最小供电电压 (Vsup)
1.71 V
标称供电电压 (Vsup)
1.8 V
表面贴装
YES
温度等级
INDUSTRIAL
端子面层
Tin (Sn)
端子形式
GULL WING
端子节距
0.5 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
2 mm
文档预览
1.8V to 3.3V LVCMOS High-Performance
Clock Buffer Family
Description
The 5PB11xx is a high-performance LVCMOS clock buffer
family. It has best-in-class additive phase jitter of 50fsec
RMS.
There are five different fan-out variations available: 1:2 to
1:10.
The 5PB11xx also supports a synchronous glitch-free output
enable (OE) function to eliminate any potential intermediate
incorrect output clock cycles when enabling or disabling
outputs. It’s available in various packages and can operate
from a 1.8V to 3.3V supply.
5PB11xx
DATASHEET
Features
High-performance 1:2, 1:4, 1:6, 1:8, 1:10 LVCMOS clock
buffer
Very low pin-to-pin skew < 50ps
Very low additive jitter < 50fs
Supply voltage: 1.8V to 3.3V
3.3V tolerant input clock
f
MAX
= 200MHz
Integrated serial termination for 50 channel
Packaged in 8-, 14-, 16-, 20-pin TSSOP and as small as
2 × 2 mm DFN and QFN packages
Industrial (-40°C to +85°C) and extended (-40°C to
+105°C) temperature ranges
Block Diagram
CLKIN
LVCMOS
LVCMOS
Y0
LVCMOS
Y1
LVCMOS
Y2
LVCMOS
Y3
LVCMOS
Yn
1G
5PB11xx FEBRUARY 20, 2018
1
©2018 Integrated Device Technology, Inc.
5PB11xx DATASHEET
Pin Assignments for TSSOP Packages
CLKIN 1
1G 2
Y0 3
GND 4
8
7
6
5
Y1
NC
VDD
NC
CLKIN
1G
Y0
GND
VDD
Y4
GND
1
2
3
4
5
6
7
5PB1106PGG
5PB1102PGG
14 Y1
13 Y3
12 VDD
11 Y2
10 GND
9
8
Y5
VDD
CLKIN
1G
Y0
GND
VDD
Y4
GND
1
2
3
4
5
6
5PB1110PGG
20 Y1
19 Y3
18 VDD
17 Y2
16 GND
15
14
13
12
11
Y5
VDD
Y7
Y8
GND
CLKIN
1G
Y0
GND
1
2
3
4
5PB1104PGG
8
7
6
5
Y1
Y3
VDD
Y2
CLKIN
1G
Y0
GND
VDD
Y4
GND
Y6
1
2
3
4
5
6
7
8
5PB1108PGG
16 Y1
15 Y3
14 VDD
13 Y2
12 GND
11 Y5
10 VDD
9 Y7
7
Y6 8
VDD 9
Y9 10
Pin Descriptions for TSSOP Packages
Device Number
5PB1102PGG
5PB1104PGG
5PB1106PGG
5PB1108PGG
5PB1110PGG
LVCMOS
Clock Input
CLKIN
1
1
1
1
1
Clock Output
Enable
1G
2
2
2
2
2
LVCMOS Clock Output
Y0, Y1, . . . Y9
3, 8
3, 8, 5, 7
3, 14, 11, 13, 6, 9
3, 16, 13, 15, 6, 11, 8, 9
3, 20, 17, 19, 6, 15, 8, 13, 12, 10
Supply Voltage
V
DD
6
6
5, 8, 12
5, 10, 14
5, 9, 14, 18
Ground
GND
4
4
4, 7, 10
4, 7, 12
4, 7, 11, 16
1.8V TO 3.3V LVCMOS HIGH-PERFORMANCE CLOCK BUFFER FAMILY
2
FEBRUARY 20, 2018
5PB11xx DATASHEET
Pin Assignments for DFN/QFN Packages
CLKIN
CLKIN
CLKIN
1G
Y0
GND
1
2
3
4
5PB1102CMG
8
7
6
5
1G
Y1
Y3
1G
Y1
NC
VDD
NC
16 15 14 13
Y0
GND
VDD
Y4
1
2
12
11
5PB1106CMG
10
3
9
4
5 6 7 8
GND
NC
VDD
NC
VDD
Y2
GND
Y5
Y0
GND
VDD
Y4
GND
1
2
4
5
20 19 18 17 16
15 Y2
14 GND
3
5PB1110NDG
13 Y5
12
11
6 7 8 9 10
VDD
Y7
CLKIN 1
1G 2
Y0
GND
3
4
5PB1104CMG
8
7
6
5
Y1
Y3
VDD
Y2
CLKIN
1G
16 15 14 13
Y0
GND
VDD
Y4
1
2
12
11
5PB1108CMG
10
3
9
4
5 6 7 8
GND
Y7
VDD
Y6
VDD
Y2
GND
Y5
Pin Descriptions for DFN/QFN Packages
Device Number
5PB1102CMG
5PB1104CMG
5PB1106CMG
5PB1108CMG
5PB1110NDG
LVCMOS
Clock Input
CLKIN
1
1
15
15
19
Clock Output
Enable
1G
2
2
16
16
20
LVCMOS Clock Output
Y0, Y1, . . . Y9
3, 8
3, 5, 7, 8
1, 4, 9, 11, 13, 14
1, 4, 6, 7, 9, 11, 13, 14
1, 4, 6, 8, 10, 11, 13, 15, 17, 18
Y1
Y3
Supply Voltage
V
DD
6
6
3, 8, 12
3, 8, 12
3, 7, 12, 16
Y6
VDD
Y9
GND
Y8
Y3
Y1
VDD
Ground
GND
4
4
2, 5, 10
2, 5, 10
2, 5, 9, 14
Output Logic Table
Inputs
CLKIN
X
L
H
Output
1G
L
H
H
Yn
L
L
H
After at least three cycles of input clock toggling. Output Enable function is asynchronous to eliminate any intermediate incorrect output clock cycles during transition which may cause
frequency peaking to the downstream device.
FEBRUARY 20, 2018
3
1.8V TO 3.3V LVCMOS HIGH-PERFORMANCE CLOCK BUFFER FAMILY
5PB11xx DATASHEET
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 5PB11xx. These ratings, which are standard values
for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions
above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended
operating temperature range.
Item
Supply Voltage, V
DD
Output Enable and All Outputs
CLKIN
Ambient Operating Temperature (industrial)
Ambient Operating Temperature (extended)
Storage Temperature
Junction Temperature
Soldering Temperature
3.8V
-0.4 V to V
DD
+ 0.5 V
-0.4 V to 3.465V
-40 to +85
C
-40 to +105
C
-65 to +150
C
125
C
260
C
Rating
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (industrial)
Ambient Operating Temperature (extended)
Power Supply Voltage (measured in respect to GND)
Min.
-40
-40
+1.71
Typ.
Max.
+85
+105
+3.465
Units
C
C
V
DC Electrical Characteristics
(V
DD
= 1.8V, 2.5V, 3.3V)
V
DD
= 1.8V ±5%,
Ambient temperature -40° to +105°C, unless stated otherwise.
Parameter
Operating Voltage
Input High Voltage, CLKIN
Input Low Voltage, CLKIN
Input High Voltage, 1G
Input Low Voltage, 1G
Output High Voltage
Output Low Voltage
Nominal Output Impedance
Input Capacitance
Operating Supply Current
Symbol
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
Z
O
C
IN
Conditions
Note 1.
Note 1.
Min.
1.71
0.7 x V
DD
1.6
Typ.
Max.
1.89
3.465
0.3 x V
DD
V
DD
0.6
Units
V
V
V
V
V
V
V
I
OH
= -5mA.
I
OL
= 5mA.
1.4
0.4
50
5
6
12
15
20
23
8
13
18
23
27
CLKIN, 1G pin.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
pF
5PB1102
5PB1104
5PB1106
5PB1108
5PB1110
I
DD
100MHz, no load, 25°C.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
mA
Notes: 1. Nominal switching threshold is V
DD
/2.
1.8V TO 3.3V LVCMOS HIGH-PERFORMANCE CLOCK BUFFER FAMILY
4
FEBRUARY 20, 2018
5PB11xx DATASHEET
V
DD
= 2.5V ±5%
, Ambient temperature -40° to +105°C, unless stated otherwise.
Parameter
Operating Voltage
Input High Voltage, CLKIN
Input Low Voltage, CLKIN
Input High Voltage, 1G
Input Low Voltage, 1G
Output High Voltage
Output Low Voltage
Nominal Output Impedance
Input Capacitance
Operating Supply Current
Symbol
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
Z
O
C
IN
Conditions
Note 1.
Note 1.
Min.
2.375
0.7 x V
DD
1.8
Typ.
Max.
2.625
3.465
0.3 x V
DD
V
DD
0.7
Units
V
V
V
V
V
V
V
I
OH
= -8mA.
I
OL
= 8mA.
1.9
0.5
50
5
9
15
21
27
32
11
18
24
31
37
CLKIN, 1G pin.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
pF
5PB1102
5PB1104
5PB1106
5PB1108
5PB1110
I
DD
100MHz, no load, 25°C.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
mA
V
DD
= 3.3V ±5%
, Ambient temperature -40° to +105°C, unless stated otherwise.
Parameter
Operating Voltage
Input High Voltage, CLKIN
Input Low Voltage, CLKIN
Input High Voltage, 1G
Input Low Voltage, 1G
Output High Voltage
Output Low Voltage
Nominal Output Impedance
Input Capacitance
Operating Supply Current
Symbol
V
DD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
Z
O
C
IN
Conditions
Note 1.
Note 1.
Min.
3.135
0.7 x V
DD
2
Typ.
Max.
3.465
3.465
0.3 x V
DD
V
DD
0.8
Units
V
V
V
V
V
V
V
I
OH
= -12mA.
I
OL
= 12mA.
2.4
0.7
50
5
12
20
25
35
40
13
22
30
38
45
CLKIN, 1G pin.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
pF
5PB1102
5PB1104
5PB1106
5PB1108
5PB1110
I
DD
100MHz, no load, 25°C.
100MHz, no load, 25°C.
100MHz, no load, 25°C.
mA
FEBRUARY 20, 2018
5
1.8V TO 3.3V LVCMOS HIGH-PERFORMANCE CLOCK BUFFER FAMILY
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参数对比
与5PB1104CMGI/W相近的元器件有:CMF20180R00GNEB88、CMF2018K000GLBF88、5PB1110PGGI8、CPF2180R00GKRE6、5PB1106CMGI8。描述及对比如下:
型号 5PB1104CMGI/W CMF20180R00GNEB88 CMF2018K000GLBF88 5PB1110PGGI8 CPF2180R00GKRE6 5PB1106CMGI8
描述 Clock Buffer 1.8V to 3.3V 1:4 LVCMOS 50ps 50fs Fixed Resistor, Metal Film, 1W, 180ohm, 500V, 2% +/-Tol, 200ppm/Cel, Through Hole Mount, AXIAL LEADED, ROHS COMPLIANT Fixed Resistor, Metal Film, 1W, 18000ohm, 500V, 2% +/-Tol, 150ppm/Cel, Clock Buffer High Perf LVCMOS 1.8V to 3.3V 200MHz Fixed Resistor, Metal Film, 2W, 180ohm, 350V, 2% +/-Tol, 100ppm/Cel, Through Hole Mount, AXIAL LEADED Clock Buffer High Perf LVCMOS 1.8V to 3.3V 200MHz
是否无铅 不含铅 不含铅 - 不含铅 含铅 -
是否Rohs认证 符合 符合 不符合 符合 不符合 -
包装说明 VSSOP, AXIAL LEADED, ROHS COMPLIANT - TSSOP, AXIAL LEADED -
Reach Compliance Code compliant compliant compliant compliant compliant -
其他特性 IT ALSO OPERATES WITH 2.5V,3.3V FLAME PROOF, PRECISION - IT ALSO OPERATES WITH 2.5V,3.3V FLAME PROOF, PRECISION -
JESD-609代码 e3 e3 e0 e3 e0 -
端子数量 8 2 2 16 2 -
最高工作温度 105 °C 165 °C 175 °C 105 °C 230 °C -
最低工作温度 -40 °C -55 °C -55 °C -40 °C -65 °C -
封装形状 SQUARE TUBULAR PACKAGE TUBULAR PACKAGE RECTANGULAR TUBULAR PACKAGE -
封装形式 SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH Axial Axial SMALL OUTLINE, THIN PROFILE, SHRINK PITCH Axial -
表面贴装 YES NO - YES NO -
端子面层 Tin (Sn) Matte Tin (Sn) Tin/Lead (Sn/Pb) Matte Tin (Sn) Tin/Lead (Sn/Pb) -
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器件捷径:
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