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633L4003A2T

LVDS Output Clock Oscillator

器件类别：无源元件    振荡器   

厂商名称：CTS

器件标准：

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参数 预览
器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
CTS
Reach Compliance Code
compliant
其他特性
STANDBY; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT; TR, 7 INCH
最长下降时间
0.7 ns
频率调整-机械
NO
频率稳定性
50%
安装特点
SURFACE MOUNT
标称工作频率
40 MHz
最高工作温度
60 °C
最低工作温度
-10 °C
振荡器类型
LVDS
输出负载
100 OHM
物理尺寸
3.2mm x 2.5mm x 0.9mm
最长上升时间
0.7 ns
最大供电电压
2.625 V
最小供电电压
2.375 V
标称供电电压
2.5 V
表面贴装
YES
最大对称度
55/45 %
端子面层
Gold Flash (Au) - with Nickel (Ni) barrier
Base Number Matches
1
文档预览
Model 633
Features
Very Low Jitter LVPECL or LVDS Clock
Ceramic Surface Mount Package
Very Low Phase Jitter Performance, 500fs Maximum
Fundamental or 3
rd
Overtone Crystal Design
Frequency Range 10 – 220MHz *
+2.5V or +3.3V Operation
Output Enable Standard
Tape and Reel Packaging, EIA-418
SerDes
Storage Area Networking
Broadband Access
SONET/SDH/DWDM
PON
Ethernet/GbE/SyncE
Fiber Channel
Test and Measurement
Part Dimensions:
3.2 × 2.5 × 1.0mm
•
25.00mg
Applications
Standard Frequencies
- 50.00MHz
- 125.00MHz
- 148.3516MHz
- 200.0000MHz
- 155.52MHz
- 156.25MHz
- 161.1328MHz
* Check with factory for availability.
Description
CTS Model 633 is a low cost, high performance clock oscillator supporting differential LVPECL or LVDS outputs.
Employing the latest IC technology, M633 has excellent stability and very low jitter/phase noise performance.
Ordering Information
Model
633
Output
Type
P
Frequency Code
[MHz]
XXX or XXXX
Frequency
Stability
3
Temperature
Range
I
Supply
Voltage
3
Packaging
T
Code
P
L
E
V
Output
LVPECL - Pin 1 Enable
LVDS - Pin 1 Enable
LVPECL - Pin 2 Enable
LVDS - Pin 2 Enable
Code
6
5
3
2
Stability
±20ppm
±25ppm
±50ppm
±100ppm
2
Code
2
3
Voltage
+2.5Vdc
+3.3Vdc
Code
Frequency
Product Frequency Code
1
Code Temp. Range
-10°C to +60°C
A
-20°C to +70°C
C
-40°C to +85°C
I
Packing
Code
1k pcs./reel
T
Notes:
1] Refer to document 016-1454-0, Frequency Code Tables. 3-digits for frequencies <100MHz, 4-digits for frequencies 100MHz or greater.
2] Consult factory for availability of 6I Stability/Temperature combination.
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
This product is specified for use only in standard commercial applications. Supplier disclaims all express and implied warranties and liability in connection with any use of this
product in any non-commercial applications or in any application that may expose the product to conditions that are outside of the tolerances provided in its specification.
DOC# 008-0578-0 Rev. B
Page 1 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Very Low Jitter LVPECL or LVDS Clock
Model 633
Electrical Specifications
Operating Conditions
P ARAMETER
Maximum Supply Voltage
Supply Voltage
Supply Current
LVP ECL
LVDS
O perating Temperature
Storage Temperature
T
A
T
STG
-
-
I
CC
Maximum Load
-
-
-20
-40
-40
55
45
+25
-
88
66
+70
+85
+125
mA
°C
°C
SYMBO L
V
CC
V
CC
CO NDITIO NS
-
±5%
MIN
-0.5
2.375
3.135
TYP
-
2.5
3.3
MAX
5.0
2.625
3.465
UNIT
V
V
Frequency Stability
P ARAMETER
Frequenc y Range
LVP ECL
LVDS
Frequenc y Stability
[Note 1]
SYMBO L
f
O
CO NDITIO NS
-
MIN
TYP
10 - 220
10 - 220
MAX
UNIT
MHz
±ppm
3
ppm
Δf/f
O
Δf/f
25
-
First Year @ +25°C, nominal V
CC
-3
20, 25, 50 or 100
-
Aging
1.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
Output Parameters
P ARAMETER
O utput Type
O utput Load
SYMBO L
-
R
L
V
OH
O utput Voltage Levels
V
OL
V
OH
V
OL
O utput Duty Cyc le
Rise and Fall Time
O utput Type
O utput Load
O utput Voltage Levels
O utput Duty Cyc le
Differential O utput Voltage
O ffset Voltage
Rise and Fall Time
SYM
T
R
, T
F
-
R
L
V
OH
V
OL
SYM
V
OD
V
OS
T
R
, T
F
CO NDITIO NS
-
Terminated to V
CC
- 2.0V
PECL Load, -20°C to +70°C
PECL Load, -40°C to +85°C
@ V
CC
- 1.3V
@ 20%/80% Levels, R
L
= 50 Ohms
-
Between Outputs
LVDS Load
@ 1.25V
R
L
= 100 Ohms
LVDS Load
@ 20%/80% Levels, R
L
= 100 Ohms
-
-
0.90
45
247
1.125
-
-
V
CC
- 1.025
V
CC
- 1.810
V
CC
- 1.085
V
CC
- 1.830
45
-
MIN
TYP
LVPECL
50
-
-
-
-
-
0.3
LVDS
100
1.43
1.10
-
330
1.25
0.4
-
1.60
-
55
454
1.375
0.7
-
V
CC
- 0.880
V
CC
- 1.620
V
CC
- 0.880
V
CC
- 1.555
55
0.7
MAX
UNIT
-
Ohms
V
V
%
ns
-
Ohms
V
%
mV
V
ns
DOC# 008-0578-0 Rev. B
Page 2 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Very Low Jitter LVPECL or LVDS Clock
Model 633
Electrical Specifications
Output Parameters
P ARAMETER
Start Up Time
Enable Func tion [Standby]
Enable Input Voltage
Disable Input Voltage
Disable Time
Enable Time
P hase Jitter, RMS
P eriod Jitter, RMS
P eriod Jitter, pk-pk
V
IH
V
IL
T
PLZ
T
PLZ
tjrms
pjrms
pjpk-pk
Pin 1 or 2 Logic '1', Output Enabled
Pin 1 or 2 Logic '0', Output Disabled
Pin 1 or 2 Logic '0', Output Disabled
Pin 1 or 2 Logic '1', Output Enabled
Bandwidth 12 kHz - 20 MHz
-
-
0.7V
CC
-
-
-
-
-
-
-
-
-
-
300
2.6
25
-
0.3V
CC
200
2
500
-
-
V
V
ns
ms
fs
ps
ps
SYMBO L
T
S
CO NDITIO NS
Application of V
CC
MIN
-
TYP
2
MAX
5
UNIT
ms
Enable Truth Table
Pin 1 or Pin 2
Logic ‘1’
Open
Logic ‘0’
Pin 4 & Pin 5
Output
Output
High Imp.
Test Circuit
LVPECL
LVDS
Output Waveform
LVPECL or LVDS
DOC# 008-0578-0 Rev. B
Page 3 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Very Low Jitter LVPECL or LVDS Clock
Model 633
Electrical Specifications
Performance Data
Phase Noise [typical]
25MHz, LVPECL, V
CC
= 3.3V, T
A
= +25°C
100MHz, LVPECL, V
CC
= 3.3V, T
A
= +25°C
DOC# 008-0578-0 Rev. B
Page 4 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Very Low Jitter LVPECL or LVDS Clock
Model 633
Electrical Specifications
Performance Data
Phase Noise [typical]
312.50MHz, LVPECL, V
CC
= 3.3V, T
A
= +25°C
155.52MHz, LVDS, V
CC
= 3.3V, T
A
= +25°C
DOC# 008-0578-0 Rev. B
Page 5 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
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