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656C12503C3T

OSC XO 125.0000MHZ HCMOS SMD

器件类别:无源元件   

厂商名称:CTS [CTS Corporation]

器件标准:

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器件参数
参数名称
属性值
类型
XO(标准)
频率
125MHz
功能
启用/禁用
输出
HCMOS
电压 - 电源
3.3V
频率稳定度
±50ppm
工作温度
-20°C ~ 70°C
电流 - 电源(最大值)
20mA(标准)
安装类型
表面贴装
封装/外壳
6-SMD,无引线
大小/尺寸
0.276" 长 x 0.197" 宽(7.00mm x 5.00mm)
高度 - 安装(最大值)
0.079"(2.00mm)
电流 - 电源(禁用)(最大值)
20µA
文档预览
Model 656C
Features
Advanced PLL HCMOS Clock
Ceramic Surface Mount Package
Low Phase Jitter Performance, 600fs Typical
Advanced PLL Design w/ Low Fundamental Crystal
Frequency Range 10 – 250MHz *
+2.5V or +3.3V Operation
Output Enable Standard, Pin 2 Option Available
Tape and Reel Packaging, EIA-418
Broadcast Video Systems
Storage Area Networking
Broadband Access
PCI Express
Networking Equipment
Ethernet/GbE/SyncE
Fiber Channel
Test and Measurement
Part Dimensions:
7.0 × 5.0 × 1.85mm
178.462mg
Applications
Standard Frequencies
- 25.00MHz
- 106.25MHz
- 27.00MHz
- 125.00MHz
- 50.00MHz
- 148.50MHz
- 74.25MHz
- 153.60MHz
- 100.00MHz
- 155.52MHz
- 156.25MHz
- 200.00MHz
- 250.00MHz
* See Page 8 for additional developed frequencies.
Check with factory for availability of frequencies not listed.
Description
CTS Model 656C is a low cost, high performance PLL clock oscillator supporting HCMOS output. Employing the
latest IC technology, M656C has excellent stability and low phase jitter performance.
Ordering Information
Model
656
Output
Type
C
Frequency Code
[MHz]
XXX or XXXX
Frequency
Stability
3
Temperature
Range
I
Supply
Voltage
3
Packaging
T
Code
C
M
Output
HCMOS - Pin 1 Enable
HCMOS - Pin 2 Enable
Code
6
5
4
3
Stability
±20ppm
2
±25ppm
3
±30ppm
±50ppm
Code
2
3
Voltage
+2.5Vdc
+3.3Vdc
Code
Frequency
Product Frequency Code
1
Notes:
1] Refer to document 016-1454-0, Frequency Code Tables.
3-digits for frequencies <100MHz, 4-digits for frequencies 100MHz or greater.
2] 6I Stability/Temperature combination not available.
3] Check factory availability when paired with 'I' temperature code.
Code Temp. Range
C
-20°C to +70°C
-40°C to +85°C
I
Packing
Code
T
1k pcs./reel
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
This product is specified for use only in standard commercial applications. Supplier disclaims all express and implied warranties and liability in connection with any use of this
product in any non-commercial applications or in any application that may expose the product to conditions that are outside of the tolerances provided in its specification.
DOC# 008-0342-1 Rev. C
Page 1 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Advanced PLL HCMOS Clock
Model 656C
Electrical Specifications
Operating Conditions
P ARAMETER
Maximum Supply Voltage
Supply Voltage
Supply Current
O perating Temperature
Storage Temperature
SYMBO L
V
CC
V
CC
I
CC
T
A
T
STG
CO NDITIO NS
-
±5%
Maximum Load
-
-
MIN
-0.5
2.375
3.135
-
-20
-40
-55
TYP
-
2.5
3.3
20
+25
-
MAX
4.0
2.625
3.465
65
+70
+85
+125
UNIT
V
V
mA
°C
°C
Frequency Stability
P ARAMETER
Frequenc y Range
Frequenc y Stability
[Note 1]
SYMBO L
f
O
Δf/f
O
Δf/f
25
CO NDITIO NS
-
-
First Year @ +25°C, nominal V
CC
MIN
TYP
10 - 250
20, 25 or 50
MAX
UNIT
MHz
±ppm
Aging
-3
-
3
ppm
1.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
Output Parameters
P ARAMETER
O utput Type
O utput Load
O utput Voltage Levels
O utput Duty Cyc le
Rise and Fall Time
Start Up Time
Enable Func tion [Tri-State]
Enable Input Voltage
Disable Input Voltage
Disable Current
Enable Time
P hase Jitter, RMS
P eriod Jitter, RMS
P eriod Jitter, pk-pk
V
IH
V
IL
I
IL
T
PLZ
tjrms
pjrms
pjpk-pk
Pin 1 or 2 Logic '1', Output Enabled
Pin 1 or 2 Logic '0', Output Disabled
Pin 1 or 2 Logic '0', Output Disabled
Pin 1 or 2 Logic '1', Output Enabled
Bandwidth 12 kHz - 20 MHz
-
-
0.7V
CC
-
-
-
-
-
-
-
-
16
-
600
3.0
30
-
0.3V
CC
22
200
<1000
-
-
V
V
mA
ns
fs
ps
ps
SYMBO L
-
C
L
V
OH
V
OL
SYM
T
R
, T
F
T
S
CO NDITIO NS
-
-
CMOS Load
@ 50% Level
@ 20%/80% Levels, C
L
= 15pF
Application of V
CC
-
0.9V
CC
-
45
-
-
MIN
TYP
HCMO S
-
-
-
-
5
3
15
-
0.1V
CC
55
10
5
MAX
UNIT
-
pF
V
%
ns
ms
DOC# 008-0342-1 Rev. C
Page 2 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Advanced PLL HCMOS Clock
Model 656C
Electrical Specifications
Enable Truth Table
Pin 1 or Pin 2
Logic ‘1’
Open
Logic ‘0’
Pin 4
Output
Output
High Imp.
Test Circuit
HCMOS
Output Waveform
HCMOS
DOC# 008-0342-1 Rev. C
Page 3 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Advanced PLL HCMOS Clock
Model 656C
Electrical Specifications
Performance Data
Phase Noise [typical]
62.50MHz, HCMOS, V
CC
= 3.3V, T
A
= +25°C
100.00MHz, HCMOS, V
CC
= 3.3V, T
A
= +25°C
125.00MHz, HCMOS, V
CC
= 3.3V, T
A
= +25°C
250.00MHz, HCMOS, V
CC
= 3.3V, T
A
= +25°C
DOC# 008-0342-1 Rev. C
Page 4 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Advanced PLL HCMOS Clock
Model 656C
Electrical Specifications
Performance Data
Phase Noise Tabulated
Typical, HCMOS, V
CC
= 3.3V, T
A
= +25°C
P ARAMETER
HCMO S @ 6 2 .5 MHz
P hase Noise
Single Side Band
@ 10Hz
@ 100Hz
@ 1kHz
-
@ 10kHz
@ 100kHz
@ 1MHz
@ 10MHz
@ 40MHz
P hase Jitter, RMS
tjrms
-80.50
-105.40
-121.40
-130.50 dBc/Hz
-134.50
-150.10
-154.30
-154.40
fs
P hase Jitter, RMS
tjrms
-
SYMBO L
CO NDITIO NS
TYP
UNIT
P ARAMETER
HCMO S @ 1 0 0 .0 0 MHz
P hase Noise
Single Side Band
@ 10Hz
@ 100Hz
@ 1kHz
@ 10kHz
@ 100kHz
@ 1MHz
@ 10MHz
@ 40MHz
-82.60
-101.40
-111.50
-125.10 dBc/Hz
-130.10
-143.40
-154.20
-156.60
fs
SYMBO L
CO NDITIO NS
TYP
UNIT
Integration Bandwidth 12kHz - 20MHz 632.41
Integration Bandwidth 12kHz - 20MHz 579.53
P ARAMETER
HCMO S @ 1 2 5 .0 0 MHz
P hase Noise
SYMBO L
CO NDITIO NS
Single Side Band
@ 10Hz
@ 100Hz
@ 1kHz
TYP
UNIT
P ARAMETER
HCMO S @ 2 5 0 .0 0 MHz
P hase Noise
SYMBO L
CO NDITIO NS
Single Side Band
@ 10Hz
@ 100Hz
@ 1kHz
TYP
UNIT
-69.00
-89.80
-115.30
-123.10 dBc/Hz
-128.50
-144.20
-152.60
-153.00
fs
P hase Jitter, RMS
tjrms
-
-86.00
-95.40
-110.40
-119.10 dBc/Hz
-120.70
-137.70
-149.30
-153.30
fs
-
@ 10kHz
@ 100kHz
@ 1MHz
@ 10MHz
@ 40MHz
@ 10kHz
@ 100kHz
@ 1MHz
@ 10MHz
@ 40MHz
P hase Jitter, RMS
tjrms
Integration Bandwidth 12kHz - 20MHz 543.39
Integration Bandwidth 12kHz - 20MHz 560.64
DOC# 008-0342-1 Rev. C
Page 5 of 8
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
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