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7026S55J

sram 256k(16kx16) dual port

器件类别:半导体    其他集成电路(IC)   

厂商名称:IDT(艾迪悌)

厂商官网:http://www.idt.com/

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器件参数
参数名称
属性值
Manufacture
IDT (Integrated Device Technology)
产品种类
Product Category
SRAM
RoHS
N
Memory Size
256 kbi
Organizati
16 k x 16
封装 / 箱体
Package / Case
PLCC-84
系列
Packaging
Tube
工厂包装数量
Factory Pack Quantity
15
文档预览
HIGH-SPEED
16K X 16 DUAL-PORT
STATIC RAM
Features
IDT7026S/L
True Dual-Ported memory cells which allow simultaneous
access of the same memory location
High-speed access
– Commercial: 15/20/25/35/55ns (max.)
– Industrial: 20/25/35/55ns (max.)
– Military: 20/25/35/55ns (max.)
Low-power operation
– IDT7026S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7026L
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for multi-
plexed bus compatibility
IDT7026 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = H for
BUSY
output flag on Master,
M/S = L for
BUSY
input on Slave
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
TTL-compatible, single 5V (±10%) power supply
Available in 84-pin PGA and 84-pin PLCC
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Functional Block Diagram
R/
W
L
UB
L
R/
W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
BUSY
L
A
13L
A
0L
(1,2)
I/O
Control
I/O
Control
I/O
8R
-I/O
15R
I/O
0R
-I/O
7R
BUSY
R
A
13R
A
0R
(1,2)
Address
Decoder
14
MEMORY
ARRAY
14
Address
Decoder
CE
L
ARBITRATION
SEMAPHORE
LOGIC
CE
R
SEM
L
M/S
NOTES:
1. (MASTER):
BUSY
is output; (SLAVE):
BUSY
is input.
2.
BUSY
outputs are non-tri-stated push-pull.
SEM
R
2939 drw 01
JANUARY 2009
1
DSC 2939/13
©2009 Integrated Device Technology, Inc.
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Description
The IDT7026 is a high-speed 16K x 16 Dual-Port Static RAM. The
IDT7026 is designed to be used as a stand-alone Dual-Port RAM or as
a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word
systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-
bit or wider memory system applications results in full-speed, error-free
operation without the need for additional discrete logic.
This device provides two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access for
reads or writes to any location in memory. An automatic power down
feature controlled by
CE
permits the on-chip circuitry of each port to enter
a very low standby power mode.
Fabricated using IDT’s CMOS high-performance technology, these
devices typically operate on only 750mW of power.
The IDT7026 is packaged in a ceramic 84-pin PGA, and a 84-pin
PLCC. Military grade product is manufactured in compliance with the latest
revision of MIL-PRF-38535 QML, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.
Pin Configurations
(1,2,3)
11/16/01
SEM
L
R/W
L
I/O
7L
I/O
6L
I/O
5L
I/O
4L
I/O
3L
I/O
2L
I/O
1L
I/O
0L
GND
A
13L
A
12L
A
11L
A
10L
OE
L
V
CC
CE
L
UB
L
LB
L
INDEX
11 10 9 8 7 6
I/O
8L
I/O
9L
I/O
10L
I/O
11L
I/O
12L
I/O
13L
GND
I/O
14L
I/O
15L
V
CC
GND
I/O
0R
I/O
1R
I/O
2R
V
CC
I/O
3R
I/O
4R
I/O
5R
I/O
6R
I/O
7R
I/O
8R
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
5 4 3 2 1 84 83 82 81 80 79 78 77 76 75
74
73
72
71
70
69
68
67
IDT7026J
J84-1
(4)
84-Pin PLCC
Top View
(5)
66
65
64
63
62
61
60
59
58
57
56
55
A
9L
A
8L
A
7L
A
6L
A
5L
A
4L
A
3L
A
2L
A
1L
A
0L
BUSY
L
GND
M/S
BUSY
R
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
,
54
32
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53
I/O
14R
GND
LB
R
A
13R
A
12R
A
11R
R/W
R
GND
SEM
R
I/O
11R
I/O
15R
A
10R
CE
R
OE
R
UB
R
I/O
12R
I/O
10R
I/O
13R
I/O
9R
A
9R
A
8R
2939 drw 02
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. Package body is approximately 1.15 in x 1.15 in x .17 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
6.42
2
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Pin Configurations
(1,2,3)
(con't.)
11/16/01
63
61
60
58
55
54
51
48
46
45
42
11
I/O
7L
66
I/O
5L
64
I/O
4L
62
I/O
2L
59
I/O
0L
56
OE
L
49
SEM
L
50
LB
L
47
A
12L
44
A
11L
43
A
8L
40
10
I/O
10L
67
I/O
8L
65
I/O
6L
I/O
3L
I/O
1L
57
UB
L
53
CE
L
52
A
13L
A
10L
A
9L
41
A
6L
39
09
I/O
11L
69
I/O
9L
68
GND
V
CC
R/W
L
A
7L
38
A
5L
37
08
I/O
13L
72
I/O
12L
71
73
33
A
4L
35
A
3L
34
07
I/O
15L
75
I/O
14L
70
V
CC
74
BUSY
L
IDT7026G
G84-3
(4)
84-Pin PGA
Top View
(5)
32
A
1L
31
A
0L
36
06
I/O
0R
76
GND
77
GND
78
GND
28
M/S
29
A
2L
30
05
I/O
1R
79
I/O
2R
80
V
CC
A
1R
A
0R
26
BUSY
R
27
04
I/O
3R
81
I/O
4R
83
7
11
12
A
3R
23
A
2R
25
03
I/O
5R
82
1
I/O
7R
2
5
GND
8
GND
10
SEM
R
14
17
20
A
6R
22
A
4R
24
02
I/O
6R
84
3
I/O
9R
I/O
10R
4
I/O
13R
6
I/O
15R
9
R/W
R
15
UB
R
13
A
12R
16
A
9R
18
A
7R
19
A
5R
21
01
I/O
8R
A
I/O
11R
B
I/O
12R
C
I/O
14R
D
OE
R
E
LB
R
F
CE
R
G
A
13R
H
A
11R
J
A
10R
K
A
8R
L
2939 drw 03
Index
NOTES:
1. All V
CC
pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. Package body is approximately 1.12 in x 1.12 in x .16 in.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Maximum Operating Temperature
and Supply Voltage
(1)
Grade
Ambient
Temperature
-55
O
C to+125
O
C
0
O
C to +70
O
C
-40
O
C to +85
O
C
GND
0V
0V
0V
Vcc
5.0V
+
10%
5.0V
+
10%
5.0V
+
10%
2939 tbl 02
Pin Names
Left Port
CE
L
R/W
L
OE
L
A
0L
- A
13L
I/O
0L
- I/O
15L
SEM
L
UB
L
LB
L
BUSY
L
CE
R
R/W
R
OE
R
A
0R
- A
13R
I/O
0R
- I/O
15R
SEM
R
UB
R
LB
R
BUSY
R
M/S
V
CC
GND
Right Port
Chip Enable
Read/Write Enable
Output Enable
Address
Data Input/Output
Semaphore Enable
Upper Byte Select
Lower Byte Select
Busy Flag
Master or Slave Select
Power
Ground
2939 tbl 01
Names
Military
Commercial
Industrial
NOTES:
1. This is the parameter T
A
. This is the "instant on" case temperature.
Capacitance
(1)
(T
A
= +25°C, f = 1.0mhz)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Output
Capacitance
Conditions
(2)
V
IN
= 3dV
V
OUT
= 3dV
Max.
9
10
Unit
pF
pF
2939 tbl 03
NOTES:
1. This parameter is determined by device characterization but is not production
tested.
2. 3dV represents the interpolated capacitance when the input and output signals
switch from 0V to 3V or from 3V to 0V.
6.42
3
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Truth Table I – Non-Contention Read/Write Control
Inputs
(1)
CE
H
X
L
L
L
L
L
L
X
R/W
X
X
L
L
L
H
H
H
X
OE
X
X
X
X
X
L
L
L
H
UB
X
H
L
H
L
L
H
L
X
LB
X
H
H
L
L
H
L
L
X
SEM
H
H
H
H
H
H
H
H
X
Outputs
I/O
8-15
High-Z
High-Z
DATA
IN
High-Z
DATA
IN
DATA
OUT
High-Z
DATA
OUT
High-Z
I/O
0-7
High-Z
High-Z
High-Z
DATA
IN
DATA
IN
High-Z
DATA
OUT
DATA
OUT
High-Z
Mode
Deselected: Power-Down
Both Bytes Deselected
Write to Upper Byte Only
Write to Lower Byte Only
Write to Both Bytes
Read Upper Byte Only
Read Lower Byte Only
Read Both Bytes
Outputs Disabled
2939 tbl 04
NOTE:
1. A
0L
— A
13L
A
0R
— A
13R.
Truth Table II – Semaphore Read/Write Control
(1)
Inputs
CE
H
X
H
X
L
L
R/W
H
H
OE
L
L
X
X
X
X
UB
X
H
X
H
L
X
LB
X
H
X
H
X
L
SEM
L
L
L
L
L
L
Outputs
I/O
8-15
DATA
OUT
DATA
OUT
DATA
IN
DATA
IN
______
I/O
0-7
DATA
OUT
DATA
OUT
DATA
IN
DATA
IN
______
Mode
Read Data in Semaphore Flag
Read Data in Semaphore Flag
Write I/O
0
into Semaphore Flag
Write I/O
0
into Semaphore Flag
Not Allowed
Not Allowed
2939 tbl 05
X
X
______
______
NOTE:
1. There are eight semaphore flags written to via I/O
0
and read from all I/O's (I/O
0
-I/O
15
). These eight semaphores are addressed by A
0
- A
2
.
Absolute Maximum Ratings
(1)
Symbol
V
TERM
(2)
T
BIAS
T
STG
I
OUT
Rating
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
DC Output Current
Commercial
& Industrial
-0.5 to +7.0
-55 to +125
-55 to +125
50
Military
-0.5 to +7.0
-65 to +135
-65 to +150
50
Unit
V
o
C
C
o
mA
2939 tbl 06
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods may affect reliability.
2. V
TERM
must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited to < 20mA for the period of
V
TERM
> Vcc + 10%.
6.42
4
IDT7026S/L
High-Speed 16K x 16 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
Recommended DC Operating
Conditions
Symbol
V
CC
GND
V
IH
V
IL
Parameter
Supply Voltage
Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
-0.5
(1)
Typ.
5.0
0
____
Max.
5.5
0
6.0
(2)
0.8
Unit
V
V
V
V
2939 tbl 07
____
NOTES:
1. V
IL
> -1.5V for pulse width less than 10ns.
2. V
TERM
must not exceed Vcc + 10%.
DC Electrical Characteristics Over the Operating
Temperature and Supply Soltage Range
(V
CC
= 5.0V ± 10%)
7026S
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
(1)
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
V
CC
= 5.5V, V
IN
= 0V to V
CC
CE
= V
IH
, V
OUT
= 0V to V
CC
I
OL
= 4mA
I
OH
= -4mA
Min.
___
7026L
Max.
10
10
0.4
___
Min.
___
Max.
5
5
0.4
___
Unit
µA
µA
V
V
2939 tbl 08
___
___
___
___
2.4
2.4
NOTE:
1. At Vcc = 2.0V, input leakages are undefined.
AC Test Conditions
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
3ns
1.5V
1.5V
Figures 1 and 2
2939 tbl 09
5V
893Ω
DATA
OUT
BUSY
347Ω
30pF
DATA
OUT
347Ω
5V
893Ω
5pF*
,
2939 drw 04
2939 drw 05
Figure 1. AC Output Test Load
Figure 2. Output Test Load
(for t
LZ
, t
HZ
, t
WZ
, t
OW
)
* Including scope and jig.
6.42
5
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