INTEGRATED CIRCUITS
74ABT543A
Octal latched transceiver
with dual enable (3-State)
Product specification
Supersedes data of 1995 Apr 19
IC23 Data Handbook
1998 Sep 24
Philips
Semiconductors
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
FEATURES
•
Combines 74ABT245 and 74ABT373 type functions in one device
•
8-bit octal transceiver with D-type latch
•
Back-to-back registers for storage
•
Separate controls for data flow in each direction
•
Output capability: +64mA/–32mA
•
Live insertion/extraction permitted
•
Power-up 3-State
•
Power-up reset
•
Latch-up protection exceeds 500mA per Jedec Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
and 200 V per Machine Model
The 74ABT543A Octal Registered Transceiver contains two sets of
D-type latches for temporary storage of data flowing in either
direction. Separate Latch Enable (LEAB, LEBA) and Output Enable
(OEAB, OEBA) inputs are provided for each register to permit
independent control of data transfer in either direction. The outputs
are guaranteed to sink 64mA.
FUNCTIONAL DESCRIPTION
The 74ABT543A contains two sets of eight D-type latches, with
separate control pins for each set. Using data flow from A to B as an
example, when the A-to-B Enable (EAB) input and the A-to-B Latch
Enable (LEAB) input are Low the A-to-B path is transparent. A
subsequent Low-to-High transition of the LEAB signal puts the A
data into the latches where it is stored and the B outputs no longer
change with the A inputs. With EAB and OEAB both Low, the
3-State B output buffers are active and display the data present at
the outputs of the A latches.
Control of data flow from B to A is similar, but using the EBA, LEBA,
and OEBA inputs.
DESCRIPTION
The 74ABT543A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
I/O
I
CCZ
PARAMETER
Propagation delay
An to Bn or Bn to An
Input capacitance
I/O capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF; V
CC
= 5V
V
I
= 0V or V
CC
Outputs disabled;
V
O
= 0V or V
CC
Outputs disabled; V
CC
=5.5V
TYPICAL
2.9
3.6
4
7
110
UNIT
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
24-Pin Plastic DIP
24-Pin plastic SO
24-Pin Plastic SSOP Type II
24-Pin Plastic TSSOP Type I
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ABT543A N
74ABT543A D
74ABT543A DB
74ABT543A PW
NORTH AMERICA
74ABT543A N
74ABT543A D
74ABT543A DB
7ABT543APW DH
DWG NUMBER
SOT222-1
SOT137-1
SOT340-1
SOT355-1
PIN CONFIGURATION
LEBA
OEBA
1
2
24 V
CC
23 EBA
22 B0
21 B1
20 B2
19 B3
18 B4
17 B5
16 B6
15 B7
14 LEAB
13 OEAB
PIN DESCRIPTION
PIN NUMBER
14, 1
11, 23
13, 2
3, 4, 5, 6,
7, 8, 9, 10
22, 21, 20, 19,
18, 17, 16, 15
12
24
SYMBOL
LEAB / LEBA
EAB / EBA
OEAB / OEBA
A0 – A7
B0 – B7
GND
V
CC
FUNCTION
A to B / B to A Latch Enable
input (active-Low)
A to B / B to A Enable input
(active-Low)
A to B / B to A Output Enable
input (active-Low)
Port A, 3-State outputs
Port B, 3-State outputs
Ground (0V)
Positive supply voltage
A0 3
A1 4
A2
A3
5
6
A4 7
A5 8
A6
9
A7 10
EAB 11
GND 12
SA00168
1998 Sep 24
2
853-1794 20080
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
2
23
1
13
3
4
5
6
7
8
9
10
22
24
1EN3 (BA)
G1
1C5
2EN4 (AB)
G2
2C6
A0 A1 A2 A3 A4 A5 A6 A7
11
23
14
1
EAB
EBA
LEAB
LEBA
B0 B1 B2 B3 B4 B5 B6 B7
OEAB
OEBA
13
2
3
4
∇
3
6D
22
5D
2
∇
21
20
19
18
17
16
15
5
6
7
8
22 21 20 19 18 17 16 15
9
10
SA00169
SA00170
LOGIC DIAGRAM
DETAIL A
D
LE
Q
22
B0
A0
3
Q
D
LE
A1
A2
A3
A4
A5
A6
A7
4
5
6
7
8
9
10
DETAIL A X 7
21
20
19
18
17
16
15
B1
B2
B3
B4
B5
B6
B7
OEBA
2
13
OEAB
EBA
23
11
LEBA
1
EAB
14
LEAB
SA00171
1998 Sep 24
3
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
FUNCTION TABLE
INPUTS
OEXX
H
X
L
L
L
L
L
L
L
H =
h =
L =
l =
X =
↑
=
NC=
Z =
EXX
X
H
↑
↑
L
L
L
L
LEXX
X
X
L
L
↑
↑
L
L
An or Bn
X
X
h
l
h
l
H
L
OUTPUTS
Bn or An
Z
Z
Z
Z
H
L
H
L
Disabled
Disabled
Disabled + Latch
Latch + Display
Transparent
STATUS
L
H
X
NC
Hold
High voltage level
High voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
Low voltage level
Low voltage level one set-up time prior to the Low-to-High transition of LEXX or EXX (XX = AB or BA)
Don’t care
Low-to-High transition of LEXX or EXX (XX = AB or BA)
No change
High impedance or “off” state
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
Storage temperature range
V
O
< 0
output in Off or High state
output in Low state
V
I
< 0
CONDITIONS
RATING
–0.5 to +7.0
–18
–1.2 to +7.0
–50
–0.5 to +5.5
128
–65 to 150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
Min
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature range
0
–40
4.5
0
2.0
0.8
–32
64
10
+85
LIMITS
Max
5.5
V
CC
V
V
V
V
mA
mA
ns/V
°C
UNIT
1998 Sep 24
4
Philips Semiconductors
Product specification
Octal latched transceiver with dual enable
(3-State)
74ABT543A
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
T
amb
= +25°C
Min
V
IK
Input clamp voltage
V
CC
= 4.5V; I
IK
= –18mA
V
CC
= 4.5V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
OH
High-level output voltage
V
CC
= 5.0V; I
OH
= –3mA; V
I
= V
IL
or V
IH
V
CC
= 4.5V; I
OH
= –32mA; V
I
= V
IL
or V
IH
V
OL
V
RST
I
I
Low-level output voltage
Power-up output low
voltage
3
Input leakage
current
I
OFF
I
PU/PD
I
IH
+ I
OZH
I
IL
+ I
OZL
I
CEX
I
O
I
CCH
I
CCL
I
CCZ
∆I
CC
Additional supply current per
input pin
2
Quiescent supply current
Control pins
Data pins
V
CC
= 4.5V; I
OL
= 64mA; V
I
= V
IL
or V
IH
V
CC
= 5.5V; I
O
= 1mA; VI = GND or V
CC
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 5.5V; V
I
= GND or 5.5V
V
CC
= 0.0V; V
O
or V
I
≤
4.5V
V
CC
= 2.1V; V
O
= 0.5V; V
I
= GND or V
CC
;
V
OE
= Don’t care
V
CC
= 5.5V; V
O
= 2.7V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 5.5V; V
O
= 5.5V; V
I
= GND or V
CC
V
CC
= 5.5V; V
O
= 2.5V
V
CC
= 5.5V; Outputs High, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs Low, V
I
= GND or V
CC
V
CC
= 5.5V; Outputs 3-State;
V
I
= GND or V
CC
V
CC
= 5.5V; one input at 3.4V,
other inputs at V
CC
or GND; V
CC
= 5.5V
–40
2.5
3.0
2.0
Typ
–0.9
3.2
3.7
2.3
0.3
0.13
±0.01
±5
±5.0
±5.0
5.0
–5.0
5.0
–65
110
20
110
0.3
0.55
.55
±1.0
±100
±100
±50
50
–50
50
–180
250
30
250
1.5
–40
Max
–1.2
2.5
3.0
2.0
0.55
.55
±1.0
±100
±100
±50
50
–50
50
–180
250
30
250
1.5
T
amb
= –40°C
to +85°C
Min
Max
–1.2
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
mA
µA
mA
µA
mA
UNIT
Power-off leakage current
Power-up/down 3-State
output current
4
3-State output High current
3-State output Low current
Output high leakage current
Output current
1
NOTES:
1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2. This is the increase in supply current for each input at 3.4V.
3. For valid test results, data must not be loaded into the flip-flops (or latches) after applying the power.
4. This parameter is valid for any V
CC
between 0V and 2.1V, with a transition time of up to 10msec. From V
CC
= 2.1V to V
CC
= 5V
±
10%, a
transition time of up to 100µsec is permitted.
1998 Sep 24
5
