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74AC521SJ

AC SERIES, 8-BIT IDENTITY COMPARATOR, INVERTED OUTPUT, PDSO20, 5.30 MM, EIAJ TYPE2, SOP-20

器件类别:逻辑    逻辑   

厂商名称:Rochester Electronics

厂商官网:https://www.rocelec.com/

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Rochester Electronics
零件包装代码
SOIC
包装说明
SOP,
针数
20
Reach Compliance Code
unknown
其他特性
CASCADABLE
系列
AC
JESD-30 代码
R-PDSO-G20
JESD-609代码
e3
长度
12.6 mm
逻辑集成电路类型
IDENTITY COMPARATOR
湿度敏感等级
1
位数
8
功能数量
1
端子数量
20
最高工作温度
85 °C
最低工作温度
-40 °C
输出极性
INVERTED
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度(摄氏度)
260
传播延迟(tpd)
12.5 ns
认证状态
COMMERCIAL
座面最大高度
2.1 mm
最大供电电压 (Vsup)
6 V
最小供电电压 (Vsup)
2 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
MATTE TIN
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
5.3 mm
Base Number Matches
1
文档预览
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74AC521 • 74ACT521 8-Bit Identity Comparator
November 1988
Revised March 2005
74AC521 • 74ACT521
8-Bit Identity Comparator
General Description
The AC/ACT521 is an expandable 8-bit comparator. It com-
pares two words of up to eight bits each and provides a
LOW output when the two words match bit for bit. The
expansion input I
A B
also serves as an active LOW enable
input.
Features
s
I
CC
reduced by 50%
s
Compares two 8-bit words in 6.5 ns typ
s
Expandable to any word length
s
20-pin package
s
Outputs source/sink 24 mA
s
ACT521 has TTL-compatible inputs
Ordering Code:
Order Number
74AC521SC
74AC521SJ
74AC521MTC
74AC521PC
74ACT521SC
74ACT521SJ
74ACT521MTC
74ACT521PC
Package Number
M20B
M20D
MTC20
N20A
M20B
M20D
MTC20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.
Pb-Free package per JEDEC J-STD-020B.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
A
0
–A
7
B
0
–B
7
T
A
O
A
B
B
Description
Word A Inputs
Word B Inputs
Expansion or Enable Input
Identity Output
FACT
¥
is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation
DS009964
www.fairchildsemi.com
74AC521 • 74ACT521
Truth Table
Inputs
I
A
L
L
H
H
H HIGH Voltage Level
L LOW Voltage Level
Note 1:
A
0
B
0
, A
1
B
1
, A
2
B
2
, etc.
Logic Diagram
Outputs
A, B
A
2
B (Note 1)
A
zÃ7
A
2
B (Note 1)
A
zÃ7
O
A
L
H
H
H
B
B
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Applications
Ripple Expansion
Parallel Expansion
www.fairchildsemi.com
2
74AC521 • 74ACT521
Absolute Maximum Ratings
(Note 2)
Supply Voltage (V
CC
)
DC Input Diode Current (I
IK
)
V
I
2 
0.5V
V
I
2
V
CC

0.5V
DC Input Voltage (V
I
)
DC Output Diode Current (I
OK
)
V
O
2 
0.5V
V
O
2
V
CC

0.5V
DC Output Voltage (V
O
)
DC Output Source
or Sink Current (I
O
)
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
)
Storage Temperature (T
STG
)
Junction Temperature (T
J
)
PDIP
140
q
C

r
r







0.5V to

7.0V
20 mA
20 mA
Recommended Operating
Conditions
Supply Voltage (V
CC
)
AC
ACT
Input Voltage (V
I
)
Output Voltage (V
O
)
Operating Temperature (T
A
)
Minimum Input Edge Rate (
9
V/
9
t)
AC Devices
V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
Minimum Input Edge Rate (
9
V/
9
t)
ACT Devices
V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
125 mV/ns
Note 2:
Absolute maximum ratings are those values beyond which damage
to the device may occur. The databook specifications should be met, with-
out exception, to ensure that the system design is reliable over its power
supply, temperature, output/input loading variables. Fairchild does not rec-
ommend operation of FACT
¥
circuits outside databook specifications.

2.0V to 6.0V
4.5V to 5.5V
0V to V
CC
0V to V
CC
40
q
C to

85
q
C
0.5V to V
CC

0.5V
20 mA
20 mA
0.5V to V
CC

0.5V
50 mA
50 mA
125 mV/ns
65
q
C to

150
q
C
DC Electrical Characteristics for AC
Symbol
V
IH
Parameter
Minimum HIGH Level
Input Voltage
V
IL
Maximum LOW Level
Input Voltage
V
OH
Minimum HIGH Level
Output Voltage
V
CC
(V)
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
3.0
4.5
5.5
3.0
4.5
5.5
I
IN
(Note 5)
I
OLD
I
OHD
I
CC
(Note 5)
Maximum Input
Leakage Current
Minimum Dynamic
Output Current (Note 4)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
4.0
0.002
0.001
0.001
T
A
Typ
1.5
2.25
2.75
1.5
2.25
2.75
2.99
4.49
5.49
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36

25
q
C
T
A

40
q
C to

85
q
C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
Guaranteed Limits
Units
V
OUT
V
Conditions
0.1V
or V
CC

0.1V
V
OUT
0.1V
V
or V
CC

0.1V
V
I
OUT
V
IN

50
P
A
V
IL
or V
IH
2.46
3.76
4.76
0.1
0.1
0.1
V
V
I
OH
=

12 mA
I
OH
=

24 mA
I
OH
=

24 mA (Note 3)
I
OUT
V
IN
50
P
A
V
IL
or V
IH
0.44
0.44
0.44
V
I
OL
= 12 mA
I
OL
= 24 mA
I
OL
= 24 mA (Note 3)
r
0.1
r
1.0
75
P
A
mA
mA
V
I
V
CC
, GND
1.65V Max
3.85V Min
V
CC
V
OLD
V
OHD
V
IN
or GND

75
40.0
P
A
Note 3:
All outputs loaded; thresholds on input associated with output under test.
Note 4:
Maximum test duration 2.0 ms, one output loaded at a time.
Note 5:
I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
3
www.fairchildsemi.com
74AC521 • 74ACT521
DC Electrical Characteristics for ACT
Symbol
V
IH
V
IL
V
OH
Parameter
Minimum HIGH Level
Input Voltage
Maximum LOW Level
Input Voltage
Minimum HIGH Level
Output Voltage
V
CC
(V)
4.5
5.5
4.5
5.5
4.5
5.5
4.5
5.5
V
OL
Maximum LOW Level
Output Voltage
4.5
5.5
4.5
5.5
I
IN
I
CCT
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
Maximum
I
CC
/Input
Minimum Dynamic
Output Current (Note 7)
Maximum Quiescent
Supply Current
5.5
5.5
5.5
5.5
5.5
4.0
0.6
0.001
0.001
T
A
Typ
1.5
1.5
1.5
1.5
4.49
5.49
2.0
2.0
0.8
0.8
4.4
5.4
3.86
4.86
0.1
0.1
0.36
0.36

25
q
C
T
A

40
q
C to

85
q
C
2.0
2.0
0.8
0.8
4.4
5.4
3.76
4.76
0.1
0.1
0.44
0.44
Units
V
OUT
V
OUT
Conditions
0.1V
0.1V
Guaranteed Limits
V
V
V
or V
CC

0.1V
or V
CC

0.1V
I
OUT
V
IN
V

50
P
A
V
IL
or V
IH
I
OH
=

24 mA
I
OH
=

24 mA (Note 6)
V
I
OUT
V
IN
50
P
A
V
IL
or V
IH
V
I
OL
= 24 mA
I
OL
= 24 mA (Note 6)
r
0.1
r
1.0
1.5
75
P
A
mA
mA
mA
V
I
V
I
V
CC
, GND
V
CC

2.1V
1.65V Max
3.85V Min
V
CC
V
OLD
V
OHD
V
IN
or GND

75
40.0
P
A
Note 6:
All outputs loaded; thresholds on input associated with output under test.
Note 7:
Maximum test duration 2.0 ms, one output loaded at a time.
AC Electrical Characteristics for AC
V
CC
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
A
n
or B
n
to O
A B
Propagation Delay
A
n
or B
n
to O
A B
Propagation Delay
I
A B
to O
A B
Propagation Delay
I
A B
to O
A B
Note 8:
Voltage Range 3.3 is 3.3V
r
0.3V
Voltage Range 5.0 is 5.0V
r
0.5V
T
A
C
L
Min
3.5
2.5
4.5
3.0
3.0
2.5
3.0
2.0

25
q
C
50 pF
Typ
7.0
5.0
7.5
5.5
5.5
4.0
5.5
4.0
Max
11.0
8.0
11.5
8.5
8.0
6.0
8.0
6.0
T
A

40
q
C to

85
q
C
C
L
50 pF
Max
12.0
9.0
12.5
9.0
9.0
7.0
9.0
7.0
ns
ns
ns
ns
Units
(V)
(Note 8)
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Min
3.0
2.0
3.5
2.5
2.5
2.0
2.5
2.0
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