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74ACT16244DGGRE4

ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48
ACT系列, 四 4位 驱动, 实输出, PDSO48

器件类别:半导体    逻辑   

厂商名称:TAOS INC (ams)

厂商官网:http://www.taosinc.com/

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器件参数
参数名称
属性值
功能数量
4
端子数量
48
最大工作温度
85 Cel
最小工作温度
-40 Cel
最大供电/工作电压
5.5 V
最小供电/工作电压
4.5 V
额定供电电压
5 V
端口数
2
加工封装描述
GREEN, PLASTIC, TSSOP-48
无铅
Yes
欧盟RoHS规范
Yes
中国RoHS规范
Yes
状态
ACTIVE
工艺
CMOS
包装形状
RECTANGULAR
包装尺寸
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
表面贴装
Yes
端子形式
GULL WING
端子间距
0.5000 mm
端子涂层
NICKEL PALLADIUM GOLD
端子位置
DUAL
包装材料
PLASTIC/EPOXY
温度等级
INDUSTRIAL
系列
ACT
输出特性
3-ST
逻辑IC类型
DRIVER
位数
4
输出极性
TRUE
传播延迟TPD
9.5 ns
文档预览
SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
D
D
D
D
D
D
D
D
Members of the Texas Instruments
Widebus
Family
Inputs Are TTL-Voltage Compatible
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Flow-Through Architecture Optimizes
PCB Layout
Distributed V
CC
and GND Pin
Configurations Minimize High-Speed
Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity at
125°C
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages, and 380-mil
Fine-Pitch Ceramic Flat (WD) Packages
Using 25-mil Center-to-Center Pin Spacings
SN54ACT16244 . . . WD PACKAGE
74ACT16244 . . . DGG OR DL PACKAGE
(TOP VIEW)
description
The SN54ACT16244 and 74ACT16244 are 16-bit
buffers/line drivers designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
They can be used as four 4-bit buffers, two 8-bit
buffers, or one 16-bit buffer. The devices provide
true outputs and symmetrical OE (active-low)
output-enable inputs.
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
The 74ACT16244 is packaged in TI’s shrink small-outline package, which provides twice the I/O pin count and
functionality of standard small-outline packages in the same printed-circuit-board area.
The SN54ACT16244 is characterized for operation over the full military temperature range of –55°C to 125°C.
The 74ACT16244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each driver)
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
1
SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
logic symbol
1OE
2OE
3OE
4OE
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
3A1
3A2
3A3
3A4
4A1
4A2
4A3
4A4
1
48
25
24
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
1
4
1
3
1
2
EN1
EN2
EN3
EN4
1
1
2
3
5
6
8
9
11
12
13
14
16
17
19
20
22
23
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
logic diagram (positive logic)
1OE
1
3OE
2
25
1A1
47
1Y1
3A1
36
13
3Y1
1A2
46
3
1Y2
3A2
35
14
3Y2
44
1A3
43
5
1Y3
3A3
33
16
3Y3
1A4
6
1Y4
3A4
32
17
3Y4
2OE
48
4OE
8
24
2A1
41
2Y1
4A1
30
19
4Y1
2A2
40
9
2Y2
4A2
29
20
4Y2
2A3
38
11
2Y3
4A3
27
22
4Y3
37
2A4
12
2Y4
4A4
26
23
4Y4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, V
I
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
+ 0.5 V
Output voltage range, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
CC
+ 0.5 V
Input clamp current, I
IK
(V
I
< 0 or V
I
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±20
mA
Output clamp current, I
OK
(V
O
< 0 or V
O
> V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±50
mA
Continuous output current, I
O
(V
O
= 0 to V
CC
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±50
mA
Continuous current through V
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±400
mA
Maximum power dissipation at T
A
= 55°C (in still air) (see Note 2): DGG package . . . . . . . . . . . . . . . . 0.85 W
DL package . . . . . . . . . . . . . . . . . . . 1.2 W
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150
_
C and a board trace length of 750 mils.
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3
SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
recommended operating conditions (see Note 3)
SN54ACT16244
MIN
VCC
VIH
VIL
VI
VO
IOH
IOL
∆t/∆v
Supply voltage (see Note 4)
High-level input voltage
Low-level input voltage
Input voltage
Output voltage
High-level output current
Low-level output current
Input transition rise or fall rate
0
–55
0
0
4.5
2
0.8
VCC
VCC
–24
24
10
125
0
–40
0
0
MAX
5.5
74ACT16244
MIN
4.5
2
0.8
VCC
VCC
–24
24
10
85
MAX
5.5
UNIT
V
V
V
V
V
mA
mA
ns/V
°C
TA
Operating free-air temperature
NOTES: 3. Unused inputs should be tied to VCC through a pullup resistor of approximately 5 k
4. All VCC and GND pins must be connected to the proper voltage supply.
W
or greater to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –50 A
50
VOH
IOH = –24 mA
24
IOH = –50 mA
{
IOH = –75 mA
{
IOL = 50 A
VOL
IOL = 24 mA
IOL = 50 mA
{
IOL = 75 mA
{
II
IOZ
ICC
∆I
CC
}
Ci
Co
VI = VCC or GND
VO = VCC or GND
VI = VCC or GND, IO = 0
One input at 3.4 V,
Other inputs at GND or VCC
VI = VCC or GND
VO = VCC or GND
VCC
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5V
5V
4.5
13.5
±0.1
±0.5
8
0.9
±1
±10
160
1
0.1
0.1
0.36
0.36
0.1
0.1
0.5
0.5
1.65
1.65
±1
±5
80
1
TA = 25°C
MIN
TYP
MAX
4.4
5.4
3.94
4.94
SN54ACT16244
MIN
4.4
5.4
3.7
4.7
3.85
3.85
0.1
0.1
0.44
0.44
V
MAX
74ACT16244
MIN
4.4
5.4
3.8
4.8
V
MAX
UNIT
m
m
m
A
m
A
m
A
mA
pF
pF
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
‡ This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
SN54ACT16244, 74ACT16244
16-BIT BUFFERS/LINE DRIVERS
WITH 3-STATE OUTPUTS
SCAS116B – MARCH 1990 – REVISED APRIL 1996
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ACT16244
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
MIN
TYP
MAX
4
3.4
3
3.7
5.4
5
6.5
6.3
5.8
6.7
8.1
7.5
8.5
8.7
8.1
9.3
11.5
9.5
MIN
3
3.4
3
3.7
5.4
5
MAX
10.3
10.1
10.5
11
13
10.9
UNIT
A
Y
Y
Y
ns
ns
ns
OE
OE
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
74ACT16244
PARAMETER
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
FROM
(INPUT)
TO
(OUTPUT)
TA = 25°C
MIN
TYP
MAX
4
3.4
3
3.7
5.4
5
6.5
6.3
5.8
6.7
8.1
7.5
8.5
8.7
8.1
9.3
10.3
9.5
MIN
4
3.4
3
3.7
5.4
5
MAX
9.4
9.5
8.9
10.3
11.3
10.3
UNIT
A
Y
Y
Y
ns
ns
ns
OE
OE
operating characteristics, V
CC
= 5 V, T
A
= 25°C
PARAMETER
Cpd
d
Power dissipation capacitance
Outputs enabled
Outputs disabled
TEST CONDITIONS
CL = 50 pF
pF,
f = 1 MHz
TYP
39
11
UNIT
pF
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
5
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参数对比
与74ACT16244DGGRE4相近的元器件有:5962-9202201MXA、74ACT16244、74ACT16244DGGR、74ACT16244DGGRG4、74ACT16244DL、74ACT16244DLG4、74ACT16244DLR、74ACT16244DLRG4、SNJ54ACT16244WD。描述及对比如下:
型号 74ACT16244DGGRE4 5962-9202201MXA 74ACT16244 74ACT16244DGGR 74ACT16244DGGRG4 74ACT16244DL 74ACT16244DLG4 74ACT16244DLR 74ACT16244DLRG4 SNJ54ACT16244WD
描述 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, CDFP48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, CDFP48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 Inputs Are TTL-Voltage Compatible, 500-mA Typical Latch-Up Immunity at 125°C ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48 ACT SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, CDFP48
功能数量 4 4 4 4 4 4 4 - 4 4
端子数量 48 48 48 48 48 48 48 - 48 48
最大工作温度 85 Cel 125 Cel 125 Cel 85 Cel 85 Cel 85 Cel 85 Cel - 85 Cel 125 Cel
最小工作温度 -40 Cel -55 Cel -55 Cel -40 Cel -40 Cel -40 Cel -40 Cel - -40 Cel -55 Cel
最大供电/工作电压 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V - 5.5 V 5.5 V
最小供电/工作电压 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V - 4.5 V 4.5 V
额定供电电压 5 V 5 V 5 V 5 V 5 V 5 V 5 V - 5 V 5 V
端口数 2 2 2 2 2 2 2 - 2 2
加工封装描述 GREEN, PLASTIC, TSSOP-48 0.380 INCH, CERAMIC, DFP-48 0.380 INCH, CERAMIC, DFP-48 GREEN, PLASTIC, TSSOP-48 GREEN, PLASTIC, TSSOP-48 GREEN, PLASTIC, SSOP-48 GREEN, PLASTIC, SSOP-48 - 绿色, 塑料, SSOP-48 0.380 INCH, CERAMIC, DFP-48
无铅 Yes - - Yes Yes Yes Yes - Yes -
欧盟RoHS规范 Yes - - Yes Yes Yes Yes - Yes -
中国RoHS规范 Yes - - Yes Yes Yes Yes - Yes -
状态 ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE - ACTIVE ACTIVE
工艺 CMOS CMOS CMOS CMOS CMOS CMOS CMOS - CMOS CMOS
包装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR - 矩形的 RECTANGULAR
包装尺寸 SMALL OUTLINE, THIN PROFILE, SHRINK PITCH FLATPACK FLATPACK SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH - SMALL OUTLINE, SHRINK PITCH FLATPACK
表面贴装 Yes Yes Yes Yes Yes Yes Yes - Yes Yes
端子形式 GULL WING FLAT FLAT GULL WING GULL WING GULL WING GULL WING - GULL WING FLAT
端子间距 0.5000 mm 0.6350 mm 0.6350 mm 0.5000 mm 0.5000 mm 0.6350 mm 0.6350 mm - 0.6350 mm 0.6350 mm
端子涂层 NICKEL PALLADIUM GOLD NOT SPECIFIED NOT SPECIFIED NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD - 镍 钯 金 NOT SPECIFIED
端子位置 DUAL DUAL DUAL DUAL DUAL DUAL DUAL - DUAL
包装材料 PLASTIC/EPOXY CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - 塑料/环氧树脂 CERAMIC, GLASS-SEALED
温度等级 INDUSTRIAL MILITARY MILITARY INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL - INDUSTRIAL MILITARY
系列 ACT ACT ACT ACT ACT ACT ACT - ACT ACT
输出特性 3-ST 3-ST 3-ST 3-ST 3-ST 3-ST 3-ST - 3-ST 3-ST
逻辑IC类型 DRIVER DRIVER DRIVER DRIVER DRIVER DRIVER DRIVER - 驱动 DRIVER
位数 4 4 4 4 4 4 4 - 4 4
输出极性 TRUE TRUE TRUE TRUE TRUE TRUE TRUE - TRUE TRUE
传播延迟TPD 9.5 ns 10.3 ns 10.3 ns 9.5 ns 9.5 ns 9.5 ns 9.5 ns - 9.5 ns 10.3 ns
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