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74AUP2G126GXX

74AUP2G126 - Low-power dual buffer/line driver; 3-state

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厂商名称:Nexperia

厂商官网:https://www.nexperia.com

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器件参数
参数名称
属性值
Brand Name
Nexperia
包装说明
HVBCC,
制造商包装代码
SOT1233
Reach Compliance Code
compliant
系列
AUP/ULP/V
JESD-30 代码
R-PBCC-B8
长度
1.35 mm
逻辑集成电路类型
BUS DRIVER
位数
1
功能数量
2
端口数量
2
端子数量
8
最高工作温度
125 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
HVBCC
封装形状
RECTANGULAR
封装形式
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度)
NOT SPECIFIED
传播延迟(tpd)
24 ns
座面最大高度
0.35 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
0.8 V
标称供电电压 (Vsup)
1.1 V
表面贴装
YES
技术
CMOS
温度等级
AUTOMOTIVE
端子形式
BUTT
端子位置
BOTTOM
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
0.8 mm
Base Number Matches
1
文档预览
74AUP2G126
Rev. 11 — 3 July 2017
Low-power dual buffer/line driver; 3-state
Product data sheet
1
General description
The 74AUP2G126 provides the dual non-inverting buffer/line driver with 3-state output.
The 3-state output is controlled by the output enable input (nOE). A LOW level at pin
nOE causes the output to assume a high-impedance OFF-state. This device has the
input-disable feature, which allows floating input signals. The inputs are disabled when
the output enable input nOE is LOW.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V. This device ensures a very low
static and dynamic power consumption across the entire V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2
Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Low static power consumption; I
CC
= 0.9 μA (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of V
CC
Input-disable feature allows floating input conditions
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia
Low-power dual buffer/line driver; 3-state
74AUP2G126
3
Ordering information
Package
Temperature
range
Name
Description
Version
SOT765-1
SOT833-1
SOT1089
SOT902-2
SOT1116
SOT1203
Table 1. Ordering information
Type number
74AUP2G126DC
74AUP2G126GT
74AUP2G126GF
74AUP2G126GM
74AUP2G126GN
74AUP2G126GS
74AUP2G126GX
-40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
-40 °C to +125 °C XSON8
-40 °C to +125 °C XSON8
-40 °C to +125 °C XQFN8
-40 °C to +125 °C XSON8
-40 °C to +125 °C XSON8
plastic extremely thin small outline package; no leads;
8 terminals; body 1 x 1.95 x 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1 x 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 x 1.6 x 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2 x 1.0 x 0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 x 1.0 x 0.35 mm
-40 °C to +125 °C X2SON8 plastic thermal enhanced extremely thin small outline
SOT1233
package; no leads; 8 terminals; body 1.35 x 0.8 x 0.35 mm
4
Marking
Marking code
p26
p26
pN
p26
pN
pN
pN
[1]
Table 2. Marking codes
Type number
74AUP2G126DC
74AUP2G126GT
74AUP2G126GF
74AUP2G126GM
74AUP2G126GN
74AUP2G126GS
74AUP2G126GX
[1]
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
74AUP2G126
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 11 — 3 July 2017
2 / 26
Nexperia
Low-power dual buffer/line driver; 3-state
74AUP2G126
5
Functional diagram
1A
1OE
2A
2OE
001aah787
1Y
2Y
nA
nY
nOE
mna234
Figure 1.  Logic symbol
Figure 2.  Logic diagram (one gate)
6
Pinning information
6.1 Pinning
74AUP2G126
1OE
1
8
V
CC
1A
2
7
2OE
74AUP2G126
1OE
1A
2Y
GND
1
2
3
4
001aae997
2Y
8
7
6
5
V
CC
2OE
1Y
2A
3
6
1Y
GND
4
5
2A
001aae998
Transparent top view
Figure 3.  Pin configuration SOT765-1
74AUP2G126
terminal 1
index area
2OE
1
V
CC
Figure 4.  Pin configuration SOT833-1,
SOT1089,SOT1116 and SOT1203
7
1OE
74AUP2G126
1OE 1
7
8
V
CC
1A
2
4
GND
2Y
3
5
aaa-023986
8
2OE
1Y
2
6
1A
6
1Y
4
2A
3
5
2Y
GND
2A
001aae999
Transparent top view
Transparent top view
Figure 5.  Pin configuration SOT902-2
Figure 6.  Pin configuration SOT1233
74AUP2G126
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 11 — 3 July 2017
3 / 26
Nexperia
Low-power dual buffer/line driver; 3-state
74AUP2G126
6.2 Pin description
Table 3. Pin description
Symbol
Pin
SOT765-1, SOT833-1, SOT1089, SOT1116,
SOT1203 and SOT1233
SOT902-2
7, 1
6, 3
2, 5
4
8
Description
1OE, 2OE
1A, 2A
1Y, 2Y
GND
V
CC
1, 7
2, 5
6, 3
4
8
output enable input (active HIGH)
data input
data output
ground (0 V)
supply voltage
7
Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Input
nOE
H
H
L
Output
nA
L
H
X
nY
L
H
Z
74AUP2G126
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 11 — 3 July 2017
4 / 26
Nexperia
Low-power dual buffer/line driver; 3-state
74AUP2G126
8
Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
V
I
< 0 V
[1]
Min
-0.5
-50
-0.5
-50
[1]
Max
+4.6
-
+4.6
-
+4.6
±20
50
-
+150
250
Unit
V
mA
V
mA
V
mA
mA
mA
°C
mW
V
O
< 0 V
Active mode and Power-down mode
V
O
= 0 V to V
CC
-0.5
-
-
-50
-65
T
amb
= -40 °C to +125 °C
[2]
-
The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
For VSSOP8 packages: above 110 °C the value of P
tot
derates linearly with 8.0 mW/K.
For XSON8 and XQFN8 packages: above 118 °C the value of P
tot
derates linearly with 7.8 mW/K.
For X2SON8 package: above 118 °C the value of P
tot
derates linearly with 7.7 mW/K.
9
Recommended operating conditions
Parameter
supply voltage
input voltage
output voltage
Active mode
Power-down mode; V
CC
= 0 V
Table 6. Operating conditions
Symbol
V
CC
V
I
V
O
Conditions
Min
0.8
0
0
0
-40
Max
3.6
3.6
V
CC
3.6
+125
200
Unit
V
V
V
V
°C
ns/V
T
amb
Δt/ΔV
ambient temperature
input transition rise and fall rate
V
CC
= 0.8 V to 3.6 V
0
74AUP2G126
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 11 — 3 July 2017
5 / 26
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参数对比
与74AUP2G126GXX相近的元器件有:74AUP2G126GN,115、74AUP2G126GD,125、74AUP2G126GT,115、74AUP2G126GF,115、74AUP2G126DC,125、74AUP2G126GM,125、74AUP2G126GS,115。描述及对比如下:
型号 74AUP2G126GXX 74AUP2G126GN,115 74AUP2G126GD,125 74AUP2G126GT,115 74AUP2G126GF,115 74AUP2G126DC,125 74AUP2G126GM,125 74AUP2G126GS,115
描述 74AUP2G126 - Low-power dual buffer/line driver; 3-state IC BUFFER NON-INVERT 3.6V 8XSON IC BUFFER NON-INVERT 3.6V 8XSON IC BUFFER NON-INVERT 3.6V 8XSON IC BUFFER NON-INVERT 3.6V 8XSON IC BUF NON-INVERT 3.6V 8VSSOP IC BUFFER NON-INVERT 3.6V 8XQFN
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
包装说明 HVBCC, VSON, 3 X 2 MM, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8 VSON, VSON, VSSOP, VBCC, SON,
制造商包装代码 SOT1233 SOT1116 SOT996-2 SOT833-1 SOT1089 SOT765-1 SOT902-2 SOT1203
Reach Compliance Code compliant compliant compliant compliant compliant compliant compliant compliant
系列 AUP/ULP/V AUP/ULP/V - AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V AUP/ULP/V
JESD-30 代码 R-PBCC-B8 R-PDSO-N8 - R-PDSO-N8 R-PDSO-N8 R-PDSO-G8 S-PBCC-B8 R-PDSO-N8
长度 1.35 mm 1.2 mm - 1.95 mm 1.35 mm 2.3 mm 1.6 mm 1.35 mm
逻辑集成电路类型 BUS DRIVER BUS DRIVER - BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER BUS DRIVER
位数 1 1 - 1 1 1 1 1
功能数量 2 2 - 2 2 2 2 2
端口数量 2 2 - 2 2 2 2 2
端子数量 8 8 - 8 8 8 8 8
最高工作温度 125 °C 125 °C - 125 °C 125 °C 125 °C 125 °C 125 °C
最低工作温度 -40 °C -40 °C - -40 °C -40 °C -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE - 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE - TRUE TRUE TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 HVBCC VSON - VSON VSON VSSOP VBCC SON
封装形状 RECTANGULAR RECTANGULAR - RECTANGULAR RECTANGULAR RECTANGULAR SQUARE RECTANGULAR
封装形式 CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE - SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH CHIP CARRIER, VERY THIN PROFILE SMALL OUTLINE
传播延迟(tpd) 24 ns 24 ns - 24 ns 24 ns 24 ns 24 ns 24 ns
座面最大高度 0.35 mm 0.35 mm - 0.5 mm 0.5 mm 1 mm 0.5 mm 0.35 mm
最大供电电压 (Vsup) 3.6 V 3.6 V - 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 0.8 V 0.8 V - 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
标称供电电压 (Vsup) 1.1 V 1.1 V - 1.1 V 1.1 V 1.1 V 1.1 V 1.1 V
表面贴装 YES YES - YES YES YES YES YES
技术 CMOS CMOS - CMOS CMOS CMOS CMOS CMOS
温度等级 AUTOMOTIVE AUTOMOTIVE - AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
端子形式 BUTT NO LEAD - NO LEAD NO LEAD GULL WING BUTT NO LEAD
端子位置 BOTTOM DUAL - DUAL DUAL DUAL BOTTOM DUAL
宽度 0.8 mm 1 mm - 1 mm 1 mm 2 mm 1.6 mm 1 mm
厂商名称 - Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
零件包装代码 - SON SON SON SON SSOP QFN SON
针数 - 8 8 8 8 8 8 8
Samacsys Description - 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us - 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us 74AUP2G126 - Low-power dual buffer/line driver; 3-state@en-us
JESD-609代码 - e3 - e3 e3 e4 e4 e3
湿度敏感等级 - 1 - 1 1 1 1 1
端子面层 - Tin (Sn) - Tin (Sn) Tin (Sn) Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) Tin (Sn)
端子节距 - 0.35 mm - 0.5 mm 0.35 mm 0.5 mm 0.5 mm 0.3 mm
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