74AVCH4T245-Q100
Rev. 3 — 12 March 2020
4-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Product data sheet
1. General description
The 74AVCH4T245-Q100 is a 4-bit, dual supply transceiver that enables bidirectional level
translation. The device can be used as two 2-bit transceivers or as a 4-bit transceiver. It features
two 2-bit input-output ports (nAn and nBn), a direction control input (nDIR), an output enable input
(nOE) and dual supply pins (V
CC(A)
and V
CC(B)
). Both V
CC(A)
and V
CC(B)
can be supplied with any
voltage between 0.8 V and 3.6 V. This feature makes the device suitable for translating between
any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nAn, nOE and
nDIR are referenced to V
CC(A)
and pins nBn are referenced to V
CC(B)
. A HIGH on nDIR allows
transmission from nAn to nBn and a LOW on nDIR allows transmission from nBn to nAn. The
output enable input (nOE) can be used to disable the outputs so the buses are effectively isolated.
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at GND level, both nAn and
nBn outputs are in the high-impedance OFF-state. The bus hold circuitry on the powered-up side
always stays active.
The 74AVCH4T245-Q100 has active bus hold circuitry which is provided to hold unused or floating
data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down
resistors.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
•
•
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
Wide supply voltage range:
•
V
CC(A)
: 0.8 V to 3.6 V
•
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
•
JESD8-12 (0.8 V to 1.3 V)
•
JESD8-11 (0.9 V to 1.65 V)
•
JESD8-7 (1.2 V to 1.95 V)
•
JESD8-5 (1.8 V to 2.7 V)
•
JESD8-B (2.7 V to 3.6 V)
ESD protection:
•
MIL-STD-883, method 3015 Class 3B exceeds 8000 V
•
HBM JESD22-A114E Class 3B exceeds 8000 V
•
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 Ω)
Maximum data rates:
•
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
•
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
•
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
•
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
•
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
•
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
•
•
•
Nexperia
74AVCH4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
•
•
•
•
•
•
•
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
I
OFF
circuitry provides partial Power-down mode operation
Multiple package options
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of
solder joints
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range
74AVCH4T245D-Q100
74AVCH4T245PW-Q100
74AVCH4T245BQ-Q100
-40 °C to +125 °C
-40 °C to +125 °C
-40 °C to +125 °C
Name
SO16
TSSOP16
DHVQFN16
Description
plastic small outline package; 16 leads;
body width 3.9 mm
plastic thin shrink small outline package;
16 leads; body width 4.4 mm
plastic dual in-line compatible
thermal enhanced very thin quad
flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
Version
SOT109-1
SOT403-1
SOT763-1
4. Marking
Table 2. Marking codes
Type number
74AVCH4T245D-Q100
74AVCH4T245PW-Q100
74AVCH4T245BQ-Q100
Marking code
74AVCH4T245D
CH4T245
H4T245
5. Functional diagram
13
1B1
V
CC(A)
V
CC(B)
12
1B2
11
2B1
10
2B2
15
1OE
2OE
14
2
1DIR
2DIR
3
1A1
4
5
1A2
6
2A1
7
2A2
001aak280
Fig. 1.
Logic symbol
74AVCH4T245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 3 — 12 March 2020
2 / 25
Nexperia
74AVCH4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
DIR
OE
A1
B1
A2
B2
V
CC(A)
V
CC(B)
001aak281
Fig. 2.
Logic diagram (one 2-bit transceiver)
6. Pinning information
6.1. Pinning
74AVCH4T245-Q100
V
CC(A)
1DIR
2DIR
1A1
1A2
2A1
2A2
GND
1
2
3
4
5
6
7
8
16 V
CC(B)
15 1OE
14 2OE
13 1B1
12 1B2
11 2B1
10 2B2
9
GND
V
CC(A)
1
1DIR 2
2DIR 3
1A1 4
1A2 5
2A1 6
2A2 7
GND 8
74AVCH4T245-Q100
16 V
CC(B)
15 1OE
14 2OE
13 1B1
12 1B2
11 2B1
10 2B2
9
GND
aaa-003608
aaa-003609
Fig. 3.
Pin configuration SOT109-1 (SO16)
Fig. 4.
Pin configuration SOT403-1 (TSSOP16)
74AVCH4T245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 3 — 12 March 2020
3 / 25
Nexperia
74AVCH4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
74AVCH4T245-Q100
V
CC(A)
2
3
4
5
6
7
GND
(1)
terminal 1
index area
1DIR
2DIR
1A1
1A2
2A1
2A2
16 V
CC(B)
15 1OE
14 2OE
13 1B1
12 1B2
11 2B1
10 2B2
8
GND
1
Transparent top view
aaa-003610
(1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered,
the solder land should remain floating or connected to GND.
Fig. 5.
Pin configuration SOT763-1 (DHVQFN16)
6.2. Pin description
Table 3. Pin description
Symbol
Pin
V
CC(A)
1DIR, 2DIR
1A1, 1A2
2A1, 2A2
GND
[1]
2B2, 2B1
1B2, 1B1
2OE, 1OE
V
CC(B)
[1]
Description
supply voltage A (nAn, nOE and nDIR inputs arereferenced to V
CC(A)
)
direction control
data input or output
data input or output
ground (0 V)
data input or output
data input or output
output enable input (active LOW)
supply voltage B (nBn inputs are referenced to V
CC(B)
)
1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16
All GND pins must be connected to ground (0 V).
7. Functional description
Table 4. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
Supply voltage
V
CC(A)
, V
CC(B)
0.8 V to 3.6 V
0.8 V to 3.6 V
0.8 V to 3.6 V
GND
[1]
[1]
[2]
Input
nOE
[2]
L
L
H
X
nDIR
[2]
L
H
X
X
GND
9
Input/output
[1]
nAn
[2]
nAn = nBn
input
Z
Z
nBn
[2]
input
nBn = nAn
Z
Z
If at least one of V
CC(A)
or V
CC(B)
is at GND level, the device goes into suspend mode.
The nAn, nDIR and nOE input circuit is referenced to V
CC(A)
; The nBn input circuit is referenced to V
CC(B)
.
74AVCH4T245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 3 — 12 March 2020
4 / 25
Nexperia
74AVCH4T245-Q100
4-bit dual supply translating transceiver with configurable voltage translation; 3-state
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC(A)
V
CC(B)
I
IK
V
I
I
OK
V
O
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Conditions
Min
-0.5
-0.5
Max
+4.6
+4.6
-
+4.6
-
+4.6
±50
100
-
+150
500
Unit
V
V
mA
V
mA
V
mA
mA
mA
°C
mW
supply voltage A
supply voltage B
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[4]
V
O
< 0 V
Active mode
Suspend or 3-state mode
V
O
= 0 V to V
CCO
per V
CC(A)
or V
CC(B)
pin
per GND pin
[1] [2] [3]
[1]
[2]
V
I
< 0 V
[1]
-50
-0.5
-50
-0.5
-0.5
-
-
-100
-65
-
V
CCO
+ 0.5 V
The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed.
V
CCO
is the supply voltage associated with the output port.
V
CCO
+ 0.5 V should not exceed 4.6 V.
For SOT109-1 (SO16) package: P
tot
derates linearly with 12.4 mW/K above 110 °C.
For SOT403-1 (TSSOP16) package: P
tot
derates linearly with 8.5 mW/K above 91 °C.
For SOT763-1 (DHVQFN16) package: P
tot
derates linearly with 11.2 mW/K above 106 °C.
9. Recommended operating conditions
Table 6. Recommended operating conditions
Symbol Parameter
V
CC(A)
V
CC(B)
V
I
V
O
T
amb
Δt/ΔV
[1]
[2]
Conditions
Min
0.8
0.8
0
Max
3.6
3.6
3.6
V
CCO
3.6
+125
5
Unit
V
V
V
V
V
°C
ns/V
supply voltage A
supply voltage B
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CCI
= 0.8 V to 3.6 V
[2]
Active mode
Suspend or 3-state mode
[1]
0
0
-40
-
V
CCO
is the supply voltage associated with the output port.
V
CCI
is the supply voltage associated with the input port.
74AVCH4T245_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2020. All rights reserved
Product data sheet
Rev. 3 — 12 March 2020
5 / 25
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