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74F657SPC

Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs

器件类别:逻辑    逻辑   

厂商名称:Fairchild

厂商官网:http://www.fairchildsemi.com/

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器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
Fairchild
零件包装代码
DIP
包装说明
DIP, DIP24,.3
针数
24
Reach Compliance Code
unknow
其他特性
WITH DIRECTION CONTROL
控制类型
COMMON CONTROL
计数方向
BIDIRECTIONAL
系列
F/FAST
JESD-30 代码
R-PDIP-T24
JESD-609代码
e0
长度
31.915 mm
逻辑集成电路类型
BUS TRANSCEIVER
最大I(ol)
0.064 A
位数
8
功能数量
1
端口数量
2
端子数量
24
最高工作温度
70 °C
最低工作温度
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP24,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
5 V
最大电源电流(ICC)
150 mA
Prop。Delay @ Nom-Su
9 ns
传播延迟(tpd)
9 ns
认证状态
Not Qualified
座面最大高度
5.08 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
TTL
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
翻译
N/A
宽度
7.62 mm
Base Number Matches
1
文档预览
74F657 Octal Bidirectional Transceiver with
March 1988
Revised August 1999
74F657
Octal Bidirectional Transceiver with
8-Bit Parity Generator/Checker and 3-STATE Outputs
General Description
The 74F657 contains eight non-inverting buffers with 3-
STATE outputs and an 8-bit parity generator/checker. It is
intended for bus-oriented applications. The buffers have a
guaranteed current sinking capability of 24 mA at the A
Port and 64 mA at the B Port.
Features
s
300 Mil 24-pin slimline DIP
s
Combines 74F245 and 74F280A functions in one
package
s
3-STATE outputs
s
B Outputs sink 64 mA
s
12 mA source current, B side
s
Input diodes for termination effects
Ordering Code:
Order Number
75F657SC
74F657SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
© 1999 Fairchild Semiconductor Corporation
DS009584
www.fairchildsemi.com
74F657
Unit Loading/Fan Out
U.L.
Pin Names
A
0
–A
7
Description
HIGH/LOW
Data Inputs/
3-STATE Outputs
B
0
–B
7
Data Inputs/
3-STATE Outputs
T/R
OE
PARITY
Transmit/Receive Input
Enable Input
Parity Input/
3-STATE Output
ODD/EVEN
ERROR
ODD/EVEN Parity Input
Error Output
4.5/0.15
150/40 (33.3)
3.5/0.117
600/106.6 (80)
2.0/0.067
2.0/0.067
3.5/0.117
600/106.6 (80)
1.0/0.033
600/106.6 (80)
Input I
IH
/I
IL
Output I
OH
/I
OL
90
µA/−
90
µA
−3
mA/24 mA (20 mA)
70
µA/−70 µA
−12
mA/64 mA (48 mA)
40
µA/−40 µA
40
µA/−40 µA
70
µA/−70µA
−12
mA/64 mA (48 mA)
20
µA/−20 µA
−12
mA/64 mA (48 mA)
Functional Description
The Transmit/Receive (T/R) input determines the direction
of the data flow through the bidirectional transceivers.
Transmit (active HIGH) enables data from the A Port to the
B Port; Receive (active LOW) enables data from the B Port
to the A Port.
The Output Enable (OE) input disables the parity and
ERROR outputs and both the A and B Ports by placing
them in a HIGH-Z condition when the Output Enable input
is HIGH.
When transmitting (T/R HIGH), the parity generator detects
whether an even or odd number of bits on the A Port are
HIGH and compares these with the condition of the parity
select (ODD/EVEN). If the Parity Select is HIGH and an
even number of A inputs are HIGH, the Parity output is
HIGH.
In receiving mode (T/R LOW), the parity select and number
of HIGH inputs on port B are compared to the condition of
the Parity input. If an even number of bits on the B Port are
HIGH, the parity select is HIGH, and the PARITY input is
HIGH, then ERROR will be HIGH to indicate no error. If an
odd number of bits on the B Port are HIGH, the parity
select is HIGH, and the PARITY input is HIGH, the ERROR
will be LOW indicating an error.
Function Table
Number of
Inputs that
are HIGH
0, 2, 4, 6, 8
Inputs
OE T/R
L
L
L
L
L
L
1, 3, 5, 7
L
L
L
L
L
L
Immaterial
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Z
=
High Impedance
Function Table
Input/
Output
Outputs
OE
Outputs
Mode
Transmit
Transmit
Receive
Receive
Receive
Receive
Transmit
Transmit
Receive
Receive
Receive
Receive
Z
L
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
Inputs
Outputs
T/R
L
H
X
Bus B Data to Bus A
Bus A Data to Bus B
High-Z State
ODD/
EVEN
H
L
H
H
L
L
H
L
H
H
L
L
X
Parity ERROR
H
L
H
L
H
L
L
H
H
L
H
L
Z
Z
Z
H
L
L
H
Z
Z
L
H
H
L
Z
H
H
L
L
L
L
H
H
L
L
L
L
X
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2
74F657
Functional Block Diagram
3
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74F657
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 2)
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
twice the rated I
OL
(mA)
−0.5V
to V
CC
−0.5V
to
+5.5V
−65°C
to
+150°C
−55°C
to
+125°C
−55°C
to
+150°C
−0.5V
to
+7.0V
−0.5V
to
+7.0V
−30
mA to
+5.0
mA
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0°C to
+70°C
+4.5V
to
+5.5V
Note 1:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH
Voltage
10% V
CC
10% V
CC
10% V
CC
5% V
CC
5% V
CC
V
OL
Output LOW
Voltage
I
IH
Input HIGH
Current
I
BVI
I
BVIT
I
IL
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown Test (I/O)
Input LOW
Current
I
OZH
I
OZL
I
IH
+
I
OZH
I
IL
+
I
OZL
I
OS
Output Leakage Current
Output Leakage Current
Output Leakage
Current
Output Leakage
Current
Output Short-Circuit
Current
I
CEX
Output HIGH Leakage
Current
−60
−100
10% V
CC
10% V
CC
2.5
2.4
2.0
2.7
2.7
0.5
0.55
20
40
100
1.0
2.0
−20
−40
50
−50
70
90
−70
−90
−150
−225
250
1.0
2.0
I
ZZ
I
CCH
I
CCL
I
CCZ
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
101
112
109
500
125
150
145
V
µA
µA
mA
µA
µA
µA
µA
µA
mA
µA
mA
mA
µA
mA
mA
mA
Min
V
Min
Min
2.0
0.8
−1.2
Typ
Max
Units
V
V
V
Min
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −1
mA (A
n
)
I
OH
= −3
mA (A
n
B
n
, Parity, ERROR)
I
OH
= −15
mA (B
n
, Parity, ERROR)
I
OH
= −1
mA (A
n
)
I
OH
= −3
mA (A
n
, B
n
, Parity, ERROR)
I
OL
=
24 mA (A
n
)
I
OL
=
64 mA (B
n
Parity, ERROR)
V
IN
=
2.7V (ODD/EVEN)
V
IN
2.7V (T/R, OE)
V
IN
=
7.0V (T/R, OE, ODD/EVEN)
V
IN
=
5.5V (Parity, B
n
)
V
IN
=
5.5V (A
n
)
V
IN
=
0.5V (ODD/EVEN)
V
IN
=
0.5V (T/R, OE)
V
OUT
=
2.7V (ERROR)
V
OUT
=
0.5V (ERROR)
V
I/O
=
2.7V (B
n
, Parity)
V
I/O
=
2.7V (A
n
)
V
I/O
=
0.5V (B
n
, Parity)
V
I/O
=
0.5V (A
n
)
V
OUT
=
0V (A
n
)
V
OUT
=
0V (B
n
, Parity, ERROR)
V
OUT
=
V
CC
(ERROR)
V
OUT
=
V
CC
(B
n
, Parity)
V
OUT
=
V
CC
(A
n
)
V
OUT
=
5.25V (A
n
, B
n
, Parity, ERROR)
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
Max
V
CC
=
0
Max
Max
Max
Max
Max
Max
Max
Max
Max
Max
0.0V
Max
Max
Max
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4
74F657
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation Delay
A
n
to B
n
, B
n
to A
n
Propagation Delay
A
n
to Parity
Propagation Delay
ODD/EVEN to PARITY
Propagation Delay
ODD/EVEN to ERROR
Propagation Delay
B
n
to ERROR
Propagation Delay
PARITY to ERROR
Output Enable Time
OE to A
n
/B
n
Output Disable Time
OE to A
n
/B
n
Output Enable Time
OE to ERROR (Note 3)
Output Disable Time
OE to ERROR
Output Enable Time
OE to PARITY
Output Disable Time
OE to PARITY
2.5
3.0
6.5
7.0
4.5
4.5
4.5
4.5
8.0
8.0
7.0
7.5
3.0
4.0
1.0
1.0
3.0
4.0
1.0
1.0
3.0
4.0
1.0
1.0
V
CC
= +5.0V
C
L
=
50 pF
Typ
4.5
4.9
10.1
10.9
7.8
8.8
7.5
8.2
14.0
15.0
10.8
11.8
5.0
6.5
4.5
4.9
5.0
7.7
4.5
4.9
5.0
7.7
4.6
5.1
Max
8.0
7.5
14.0
15.0
11.0
12.0
11.0
12.0
20.5
21.5
15.5
16.5
8.0
10.0
8.0
7.5
8.0
10.0
8.0
7.5
8.0
10.0
8.0
7.5
T
A
= −55°C
to
+125°C
V
CC
= +5.0V
C
L
=
50 pF
Min
2.5
3.0
5.5
5.5
4.0
4.5
4.0
4.5
7.5
7.5
6.0
6.5
2.5
3.5
1.0
1.0
2.5
3.5
1.0
1.0
2.5
3.5
1.0
1.0
Max
9.5
8.5
18.0
20.5
14.0
16.5
14.0
16.5
27.0
28.5
20.0
22.0
11.0
13.5
9.5
8.5
11.0
13.5
9.5
8.5
11.0
13.5
9.5
8.5
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
2.5
3.0
6.0
6.0
4.0
4.5
4.0
4.5
7.5
7.5
6.0
7.5
2.5
3.5
1.0
1.0
2.5
3.5
1.0
1.0
2.5
3.5
1.0
1.0
Max
9.0
8.0
16.0
16.5
13.0
13.5
13.0
13.5
23.0
23.5
17.0
18.5
9.5
11.0
9.0
8.0
9.5
11.0
9.0
8.0
9.5
11.0
9.0
8.0
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 3:
These delay times reflect the 3-STATE recovery time only and not the signal time through the buffers or the parity check circuity. To assure VALID
information at the ERROR pin, time must be allowed for the signal to propagate through the drivers (B to A), through the parity check circuitry (same as A to
PARITY), and to the ERROR output after the ERROR pin has been enabled (Output Enable times). VALID data at the ERROR pin
(A to PARITY)
+
(Output
Enable Time).
5
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参数对比
与74F657SPC相近的元器件有:75F657SC、74F657。描述及对比如下:
型号 74F657SPC 75F657SC 74F657
描述 Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs Octal Bidirectional Transceiver with 8-Bit Parity Generator/Checker and 3-STATE Outputs
厂商名称 Fairchild Fairchild -
零件包装代码 DIP SOIC -
包装说明 DIP, DIP24,.3 SOP, -
针数 24 24 -
Reach Compliance Code unknow unknow -
其他特性 WITH DIRECTION CONTROL WITH DIRECTION CONTROL -
系列 F/FAST F/FAST -
JESD-30 代码 R-PDIP-T24 R-PDSO-G24 -
长度 31.915 mm 15.4 mm -
逻辑集成电路类型 BUS TRANSCEIVER BUS TRANSCEIVER -
位数 8 8 -
功能数量 1 1 -
端口数量 2 2 -
端子数量 24 24 -
最高工作温度 70 °C 70 °C -
输出特性 3-STATE 3-STATE -
输出极性 TRUE TRUE -
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY -
封装代码 DIP SOP -
封装形状 RECTANGULAR RECTANGULAR -
封装形式 IN-LINE SMALL OUTLINE -
传播延迟(tpd) 9 ns 9 ns -
认证状态 Not Qualified Not Qualified -
座面最大高度 5.08 mm 2.65 mm -
最大供电电压 (Vsup) 5.5 V 5.5 V -
最小供电电压 (Vsup) 4.5 V 4.5 V -
标称供电电压 (Vsup) 5 V 5 V -
表面贴装 NO YES -
技术 TTL TTL -
温度等级 COMMERCIAL COMMERCIAL -
端子形式 THROUGH-HOLE GULL WING -
端子节距 2.54 mm 1.27 mm -
端子位置 DUAL DUAL -
宽度 7.62 mm 7.5 mm -
Base Number Matches 1 1 -
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